sound/pci/azt3328.c

   1 /*
   2  *  azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168).
   3  *  Copyright (C) 2002 by Andreas Mohr <hw7oshyuv3001@sneakemail.com>
   4  *
   5  *  Framework borrowed from Bart Hartgers's als4000.c.
   6  *  Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801),
   7  *  found in a Fujitsu-Siemens PC ("Cordant", aluminum case).
   8  *  Other versions are:
   9  *  PCI168 A(W), sub ID 1800
  10  *  PCI168 A/AP, sub ID 8000
  11  *  Please give me feedback in case you try my driver with one of these!!
  12  *
  13  * GPL LICENSE
  14  *  This program is free software; you can redistribute it and/or modify
  15  *  it under the terms of the GNU General Public License as published by
  16  *  the Free Software Foundation; either version 2 of the License, or
  17  *  (at your option) any later version.
  18  *
  19  *  This program is distributed in the hope that it will be useful,
  20  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  *  GNU General Public License for more details.
  23
  24  *  You should have received a copy of the GNU General Public License
  25  *  along with this program; if not, write to the Free Software
  26  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  27  *
  28  * NOTES
  29  *  Since Aztech does not provide any chipset documentation,
  30  *  even on repeated request to various addresses,
  31  *  and the answer that was finally given was negative
  32  *  (and I was stupid enough to manage to get hold of a PCI168 soundcard
  33  *  in the first place >:-P}),
  34  *  I was forced to base this driver on reverse engineering
  35  *  (3 weeks' worth of evenings filled with driver work).
  36  *  (and no, I did NOT go the easy way: to pick up a PCI128 for 9 Euros)
  37  *
  38  *  The AZF3328 chip (note: AZF3328, *not* AZT3328, that's just the driver name
  39  *  for compatibility reasons) has the following features:
  40  *
  41  *  - builtin AC97 conformant codec (SNR over 80dB)
  42  *    (really AC97 compliant?? I really doubt it when looking
  43  *    at the mixer register layout)
  44  *  - builtin genuine OPL3
  45  *  - full duplex 16bit playback/record at independent sampling rate
  46  *  - MPU401 (+ legacy address support) FIXME: how to enable legacy addr??
  47  *  - game port (legacy address support)
  48  *  - built-in General DirectX timer having a 20 bits counter
  49  *    with 1us resolution (FIXME: where is it?)
  50  *  - I2S serial port for external DAC
  51  *  - supports 33MHz PCI spec 2.1, PCI power management 1.0, compliant with ACPI
  52  *  - supports hardware volume control
  53  *  - single chip low cost solution (128 pin QFP)
  54  *  - supports programmable Sub-vendor and Sub-system ID
  55  *    required for Microsoft's logo compliance (FIXME: where?)
  56  *  - PCI168 AP(W) card: power amplifier with 4 Watts/channel at 4 Ohms
  57  *
  58  *  Certain PCI versions of this card are susceptible to DMA traffic underruns
  59  *  in some systems (resulting in sound crackling/clicking/popping),
  60  *  probably because they don't have a DMA FIFO buffer or so.
  61  *  Overview (PCI ID/PCI subID/PCI rev.):
  62  *  - no DMA crackling on SiS735: 0x50DC/0x1801/16
  63  *  - unknown performance: 0x50DC/0x1801/10
  64  *
  65  *  Crackling happens with VIA chipsets or, in my case, an SiS735, which is
  66  *  supposed to be very fast and supposed to get rid of crackling much
  67  *  better than a VIA, yet ironically I still get crackling, like many other
  68  *  people with the same chipset.
  69  *  Possible remedies:
  70  *  - plug card into a different PCI slot, preferrably one that isn't shared
  71  *    too much (this helps a lot, but not completely!)
  72  *  - get rid of PCI VGA card, use AGP instead
  73  *  - upgrade or downgrade BIOS
  74  *  - fiddle with PCI latency settings (setpci -v -s BUSID latency_timer=XX)
  75  *    Not too helpful.
  76  *  - Disable ACPI/power management/"Auto Detect RAM/PCI Clk" in BIOS
  77  *
  78  * BUGS
  79  *  - when Ctrl-C'ing mpg321, the playback loops a bit
  80  *    (premature DMA playback reset?)
  81  *  - full-duplex sometimes breaks (IRQ management issues?).
  82  *    Once even a spontaneous REBOOT happened!!!
  83  *
  84  * TODO
  85  *  - test MPU401 MIDI playback etc.
  86  *  - power management (CONFIG_PM). See e.g. intel8x0 or cs4281.
  87  *    This would be nice since the chip runs a bit hot, and it's *required*
  88  *    anyway for proper ACPI power management. In other words: rest
  89  *    assured that I *will* implement this very soon; as soon as Linux 2.5.x
  90  *    has power management that's bugfree enough to work properly on my desktop.
  91  *  - figure out what all unknown port bits are responsible for
  92  */
  93
  94 #include <sound/driver.h>
  95 #include <asm/io.h>
  96 #include <linux/init.h>
  97 #include <linux/pci.h>
  98 #include <linux/delay.h>
  99 #include <linux/slab.h>
 100 #include <linux/gameport.h>
 101 #include <linux/moduleparam.h>
 102 #include <sound/core.h>
 103 #include <sound/control.h>
 104 #include <sound/pcm.h>
 105 #include <sound/rawmidi.h>
 106 #include <sound/mpu401.h>
 107 #include <sound/opl3.h>
 108 #include <sound/initval.h>
 109 #include "azt3328.h"
 110
 111 MODULE_AUTHOR("Andreas Mohr <hw7oshyuv3001@sneakemail.com>");
 112 MODULE_DESCRIPTION("Aztech AZF3328 (PCI168)");
 113 MODULE_LICENSE("GPL");
 114 MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}");
 115
 116 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
 117 #define SUPPORT_JOYSTICK 1
 118 #endif
 119
 120 #define DEBUG_MISC      0
 121 #define DEBUG_CALLS     0
 122 #define DEBUG_MIXER     0
 123 #define DEBUG_PLAY_REC  0
 124 #define DEBUG_IO        0
 125 #define MIXER_TESTING   0
 126
 127 #if DEBUG_MISC
 128 #define snd_azf3328_dbgmisc(format, args...) printk(KERN_ERR format, ##args)
 129 #else
 130 #define snd_azf3328_dbgmisc(format, args...)
 131 #endif
 132
 133 #if DEBUG_CALLS
 134 #define snd_azf3328_dbgcalls(format, args...) printk(format, ##args)
 135 #define snd_azf3328_dbgcallenter() printk(KERN_ERR "entering %s\n", __FUNCTION__)
 136 #define snd_azf3328_dbgcallleave() printk(KERN_ERR "leaving %s\n", __FUNCTION__)
 137 #else
 138 #define snd_azf3328_dbgcalls(format, args...)
 139 #define snd_azf3328_dbgcallenter()
 140 #define snd_azf3328_dbgcallleave()
 141 #endif
 142
 143 #if DEBUG_MIXER
 144 #define snd_azf3328_dbgmixer(format, args...) printk(format, ##args)
 145 #else
 146 #define snd_azf3328_dbgmixer(format, args...)
 147 #endif
 148
 149 #if DEBUG_PLAY_REC
 150 #define snd_azf3328_dbgplay(format, args...) printk(KERN_ERR format, ##args)
 151 #else
 152 #define snd_azf3328_dbgplay(format, args...)
 153 #endif
 154
 155 #if DEBUG_IO
 156 #define snd_azf3328_dbgio(chip, where) \
 157             printk(KERN_ERR "%s: IDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQMASK %04x, IDX_IO_IRQSTATUS %04x\n", where, inw(chip->codec_port+IDX_IO_PLAY_FLAGS), inw(chip->codec_port+IDX_IO_PLAY_IRQMASK), inw(chip->codec_port+IDX_IO_IRQSTATUS))
 158 #else
 159 #define snd_azf3328_dbgio(chip, where)
 160 #endif
 161
 162 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
 163 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
 164 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
 165 #ifdef SUPPORT_JOYSTICK
 166 static int joystick[SNDRV_CARDS];
 167 #endif
 168
 169 module_param_array(index, int, NULL, 0444);
 170 MODULE_PARM_DESC(index, "Index value for AZF3328 soundcard.");
 171 module_param_array(id, charp, NULL, 0444);
 172 MODULE_PARM_DESC(id, "ID string for AZF3328 soundcard.");
 173 module_param_array(enable, bool, NULL, 0444);
 174 MODULE_PARM_DESC(enable, "Enable AZF3328 soundcard.");
 175 #ifdef SUPPORT_JOYSTICK
 176 module_param_array(joystick, bool, NULL, 0444);
 177 MODULE_PARM_DESC(joystick, "Enable joystick for AZF3328 soundcard.");
 178 #endif
 179
 180 typedef struct _snd_azf3328 azf3328_t;
 181
 182 struct _snd_azf3328 {
 183         int irq;
 184
 185         unsigned long codec_port;
 186         unsigned long io2_port;
 187         unsigned long mpu_port;
 188         unsigned long synth_port;
 189         unsigned long mixer_port;
 190
 191 #ifdef SUPPORT_JOYSTICK
 192         struct gameport gameport;
 193         struct resource *res_joystick;
 194 #endif
 195
 196         struct pci_dev *pci;
 197         snd_card_t *card;
 198
 199         snd_pcm_t *pcm;
 200         snd_rawmidi_t *rmidi;
 201         snd_pcm_substream_t *playback_substream;
 202         snd_pcm_substream_t *capture_substream;
 203         unsigned int is_playing;
 204         unsigned int is_recording;
 205
 206         spinlock_t reg_lock;
 207 };
 208
 209 static struct pci_device_id snd_azf3328_ids[] = {
 210         { 0x122D, 0x50DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },   /* PCI168/3328 */
 211         { 0x122D, 0x80DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },   /* 3328 */
 212         { 0, }
 213 };
 214
 215 MODULE_DEVICE_TABLE(pci, snd_azf3328_ids);
 216
 217 void snd_azf3328_io2_write(azf3328_t *chip, int reg, unsigned char value)
 218 {
 219         outb(value, chip->io2_port + reg);
 220 }
 221
 222 unsigned char snd_azf3328_io2_read(azf3328_t *chip, int reg)
 223 {
 224         return inb(chip->io2_port + reg);
 225 }
 226
 227 void snd_azf3328_mixer_write(azf3328_t *chip, int reg, unsigned long value, int type)
 228 {
 229         switch(type) {
 230         case WORD_VALUE:
 231                 outw(value, chip->mixer_port + reg);
 232                 break;
 233         case DWORD_VALUE:
 234                 outl(value, chip->mixer_port + reg);
 235                 break;
 236         case BYTE_VALUE:
 237                 outb(value, chip->mixer_port + reg);
 238                 break;
 239         }
 240 }
 241
 242 unsigned long snd_azf3328_mixer_read(azf3328_t *chip, int reg, int type)
 243 {
 244         unsigned long res = 0;
 245
 246         switch(type) {
 247         case WORD_VALUE:
 248                 res = (unsigned long)inw(chip->mixer_port + reg);
 249                 break;
 250         case DWORD_VALUE:
 251                 res = (unsigned long)inl(chip->mixer_port + reg);
 252                 break;
 253         case BYTE_VALUE:
 254                 res = (unsigned long)inb(chip->mixer_port + reg);
 255                 break;
 256         }
 257
 258         return res;
 259 }
 260
 261 void snd_azf3328_mixer_set_mute(azf3328_t *chip, int reg, int do_mute)
 262 {
 263         unsigned char oldval;
 264
 265         /* the mute bit is on the *second* (i.e. right) register of a
 266          * left/right channel setting */
 267         oldval = inb(chip->mixer_port + reg + 1);
 268         if (do_mute)
 269                 oldval |= 0x80;
 270         else
 271                 oldval &= ~0x80;
 272         outb(oldval, chip->mixer_port + reg + 1);
 273 }
 274
 275 void snd_azf3328_mixer_write_volume_gradually(azf3328_t *chip, int reg, unsigned char dst_vol_left, unsigned char dst_vol_right, int chan_sel, int delay)
 276 {
 277         unsigned char curr_vol_left = 0, curr_vol_right = 0;
 278         int left_done = 0, right_done = 0;
 279
 280         snd_azf3328_dbgcallenter();
 281         if (chan_sel & SET_CHAN_LEFT)
 282                 curr_vol_left  = inb(chip->mixer_port + reg + 1);
 283         else
 284                 left_done = 1;
 285         if (chan_sel & SET_CHAN_RIGHT)
 286                 curr_vol_right = inb(chip->mixer_port + reg + 0);
 287         else
 288                 right_done = 1;
 289
 290         /* take care of muting flag (0x80) contained in left channel */
 291         if (curr_vol_left & 0x80)
 292                 dst_vol_left |= 0x80;
 293         else
 294                 dst_vol_left &= ~0x80;
 295
 296         do
 297         {
 298                 if (!left_done)
 299                 {
 300                         if (curr_vol_left > dst_vol_left)
 301                                 curr_vol_left--;
 302                         else
 303                         if (curr_vol_left < dst_vol_left)
 304                                 curr_vol_left++;
 305                         else
 306                             left_done = 1;
 307                         outb(curr_vol_left, chip->mixer_port + reg + 1);
 308                 }
 309                 if (!right_done)
 310                 {
 311                         if (curr_vol_right > dst_vol_right)
 312                                 curr_vol_right--;
 313                         else
 314                         if (curr_vol_right < dst_vol_right)
 315                                 curr_vol_right++;
 316                         else
 317                             right_done = 1;
 318                         /* during volume change, the right channel is crackling
 319                          * somewhat more than the left channel, unfortunately.
 320                          * This seems to be a hardware issue. */
 321                         outb(curr_vol_right, chip->mixer_port + reg + 0);
 322                 }
 323                 if (delay)
 324                         mdelay(delay);
 325         }
 326         while ((!left_done) || (!right_done));
 327         snd_azf3328_dbgcallleave();
 328 }
 329
 330 /*
 331  * general mixer element
 332  */
 333 typedef struct azf3328_mixer_reg {
 334         unsigned int reg;
 335         unsigned int lchan_shift, rchan_shift;
 336         unsigned int mask;
 337         unsigned int invert: 1;
 338         unsigned int stereo: 1;
 339         unsigned int enum_c: 4;
 340 } azf3328_mixer_reg_t;
 341
 342 #define COMPOSE_MIXER_REG(reg,lchan_shift,rchan_shift,mask,invert,stereo,enum_c) \
 343  ((reg) | (lchan_shift << 8) | (rchan_shift << 12) | (mask << 16) | (invert << 24) | (stereo << 25) | (enum_c << 26))
 344
 345 static void snd_azf3328_mixer_reg_decode(azf3328_mixer_reg_t *r, unsigned long val)
 346 {
 347         r->reg = val & 0xff;
 348         r->lchan_shift = (val >> 8) & 0x0f;
 349         r->rchan_shift = (val >> 12) & 0x0f;
 350         r->mask = (val >> 16) & 0xff;
 351         r->invert = (val >> 24) & 1;
 352         r->stereo = (val >> 25) & 1;
 353         r->enum_c = (val >> 26) & 0x0f;
 354 }
 355
 356 /*
 357  * mixer switches/volumes
 358  */
 359
 360 #define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \
 361 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 362   .info = snd_azf3328_info_mixer, \
 363   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 364   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \
 365 }
 366
 367 #define AZF3328_MIXER_VOL_STEREO(xname, reg, mask, invert) \
 368 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 369   .info = snd_azf3328_info_mixer, \
 370   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 371   .private_value = COMPOSE_MIXER_REG(reg, 8, 0, mask, invert, 1, 0), \
 372 }
 373
 374 #define AZF3328_MIXER_VOL_MONO(xname, reg, mask, is_right_chan) \
 375 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 376   .info = snd_azf3328_info_mixer, \
 377   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 378   .private_value = COMPOSE_MIXER_REG(reg, is_right_chan ? 0 : 8, 0, mask, 1, 0, 0), \
 379 }
 380
 381 #define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \
 382 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 383   .info = snd_azf3328_info_mixer, \
 384   .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
 385   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \
 386 }
 387
 388 #define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \
 389 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 390   .info = snd_azf3328_info_mixer_enum, \
 391   .get = snd_azf3328_get_mixer_enum, .put = snd_azf3328_put_mixer_enum, \
 392   .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \
 393 }
 394
 395 static int snd_azf3328_info_mixer(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
 396 {
 397         azf3328_mixer_reg_t reg;
 398
 399         snd_azf3328_dbgcallenter();
 400         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 401         uinfo->type = reg.mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
 402         uinfo->count = reg.stereo + 1;
 403         uinfo->value.integer.min = 0;
 404         uinfo->value.integer.max = reg.mask;
 405         snd_azf3328_dbgcallleave();
 406         return 0;
 407 }
 408
 409 static int snd_azf3328_get_mixer(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 410 {
 411         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
 412         azf3328_mixer_reg_t reg;
 413         unsigned int oreg, val;
 414
 415         snd_azf3328_dbgcallenter();
 416         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 417
 418         oreg = inw(chip->mixer_port + reg.reg);
 419         val = (oreg >> reg.lchan_shift) & reg.mask;
 420         if (reg.invert)
 421                 val = reg.mask - val;
 422         ucontrol->value.integer.value[0] = val;
 423         if (reg.stereo) {
 424                 val = (oreg >> reg.rchan_shift) & reg.mask;
 425                 if (reg.invert)
 426                         val = reg.mask - val;
 427                 ucontrol->value.integer.value[1] = val;
 428         }
 429         snd_azf3328_dbgmixer("get: %02x is %04x -> vol %02lx|%02lx (shift %02d|%02d, mask %02x, inv. %d, stereo %d)\n", reg.reg, oreg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], reg.lchan_shift, reg.rchan_shift, reg.mask, reg.invert, reg.stereo);
 430         snd_azf3328_dbgcallleave();
 431         return 0;
 432 }
 433
 434 static int snd_azf3328_put_mixer(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 435 {
 436         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
 437         azf3328_mixer_reg_t reg;
 438         unsigned int oreg, nreg, val;
 439
 440         snd_azf3328_dbgcallenter();
 441         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 442         oreg = inw(chip->mixer_port + reg.reg);
 443         val = ucontrol->value.integer.value[0] & reg.mask;
 444         if (reg.invert)
 445                 val = reg.mask - val;
 446         nreg = oreg & ~(reg.mask << reg.lchan_shift);
 447         nreg |= (val << reg.lchan_shift);
 448         if (reg.stereo) {
 449                 val = ucontrol->value.integer.value[1] & reg.mask;
 450                 if (reg.invert)
 451                         val = reg.mask - val;
 452                 nreg &= ~(reg.mask << reg.rchan_shift);
 453                 nreg |= (val << reg.rchan_shift);
 454         }
 455         if (reg.mask >= 0x07) /* it's a volume control, so better take care */
 456                 snd_azf3328_mixer_write_volume_gradually(chip, reg.reg, nreg >> 8, nreg & 0xff, SET_CHAN_LEFT|SET_CHAN_RIGHT, 0); /* just set both channels, doesn't matter */
 457         else
 458                 outw(nreg, chip->mixer_port + reg.reg);
 459
 460         snd_azf3328_dbgmixer("put: %02x to %02lx|%02lx, oreg %04x; shift %02d|%02d -> nreg %04x; after: %04x\n", reg.reg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], oreg, reg.lchan_shift, reg.rchan_shift, nreg, inw(chip->mixer_port + reg.reg));
 461         snd_azf3328_dbgcallleave();
 462         return (nreg != oreg);
 463 }
 464
 465 static int snd_azf3328_info_mixer_enum(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
 466 {
 467         azf3328_mixer_reg_t reg;
 468         static char *texts1[2] = { "ModemOut1", "ModemOut2" };
 469         static char *texts2[2] = { "MonoSelectSource1", "MonoSelectSource2" };
 470         static char *texts3[8] = {
 471                 "Mic", "CD", "Video", "Aux", "Line",
 472                 "Mix", "Mix Mono", "Phone"
 473         };
 474
 475         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 476         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
 477         uinfo->count = (reg.reg == IDX_MIXER_REC_SELECT) ? 2 : 1;
 478         uinfo->value.enumerated.items = reg.enum_c;
 479         if (uinfo->value.enumerated.item > reg.enum_c - 1U)
 480                 uinfo->value.enumerated.item = reg.enum_c - 1U;
 481         if (reg.reg == IDX_MIXER_ADVCTL2)
 482         {
 483                 if (reg.lchan_shift == 8) /* modem out sel */
 484                         strcpy(uinfo->value.enumerated.name, texts1[uinfo->value.enumerated.item]);
 485                 else /* mono sel source */
 486                         strcpy(uinfo->value.enumerated.name, texts2[uinfo->value.enumerated.item]);
 487         }
 488         else
 489                 strcpy(uinfo->value.enumerated.name, texts3[uinfo->value.enumerated.item]
 490 );
 491         return 0;
 492 }
 493
 494 static int snd_azf3328_get_mixer_enum(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 495 {
 496         azf3328_mixer_reg_t reg;
 497         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
 498         unsigned short val;
 499
 500         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 501         val = inw(chip->mixer_port + reg.reg);
 502         if (reg.reg == IDX_MIXER_REC_SELECT)
 503         {
 504                 ucontrol->value.enumerated.item[0] = (val >> 8) & (reg.enum_c - 1);
 505                 ucontrol->value.enumerated.item[1] = (val >> 0) & (reg.enum_c - 1);
 506         }
 507         else
 508                 ucontrol->value.enumerated.item[0] = (val >> reg.lchan_shift) & (reg.enum_c - 1);
 509         snd_azf3328_dbgmixer("get_enum: %02x is %04x -> %d|%d (shift %02d, enum_c %d)\n", reg.reg, val, ucontrol->value.enumerated.item[0], ucontrol->value.enumerated.item[1], reg.lchan_shift, reg.enum_c);
 510         return 0;
 511 }
 512
 513 static int snd_azf3328_put_mixer_enum(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
 514 {
 515         azf3328_mixer_reg_t reg;
 516         azf3328_t *chip = snd_kcontrol_chip(kcontrol);
 517         unsigned int oreg, nreg, val;
 518
 519         snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
 520         oreg = inw(chip->mixer_port + reg.reg);
 521         val = oreg;
 522         if (reg.reg == IDX_MIXER_REC_SELECT)
 523         {
 524                 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U ||
 525                 ucontrol->value.enumerated.item[1] > reg.enum_c - 1U)
 526                         return -EINVAL;
 527                 val = (ucontrol->value.enumerated.item[0] << 8) |
 528                       (ucontrol->value.enumerated.item[1] << 0);
 529         }
 530         else
 531         {
 532                 if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U)
 533                         return -EINVAL;
 534                 val &= ~((reg.enum_c - 1) << reg.lchan_shift);
 535                 val |= (ucontrol->value.enumerated.item[0] << reg.lchan_shift);
 536         }
 537         outw(val, chip->mixer_port + reg.reg);
 538         nreg = val;
 539
 540         snd_azf3328_dbgmixer("put_enum: %02x to %04x, oreg %04x\n", reg.reg, val, oreg);
 541         return (nreg != oreg);
 542 }
 543
 544 static snd_kcontrol_new_t snd_azf3328_mixer_controls[] __devinitdata = {
 545         AZF3328_MIXER_SWITCH("Master Playback Switch", IDX_MIXER_PLAY_MASTER, 15, 1),
 546         AZF3328_MIXER_VOL_STEREO("Master Playback Volume", IDX_MIXER_PLAY_MASTER, 0x1f, 1),
 547         AZF3328_MIXER_SWITCH("Wave Playback Switch", IDX_MIXER_WAVEOUT, 15, 1),
 548         AZF3328_MIXER_VOL_STEREO("Wave Playback Volume", IDX_MIXER_WAVEOUT, 0x1f, 1),
 549         AZF3328_MIXER_SWITCH("Wave Playback 3D Bypass", IDX_MIXER_ADVCTL2, 7, 1),
 550         AZF3328_MIXER_SWITCH("FM Playback Switch", IDX_MIXER_FMSYNTH, 15, 1),
 551         AZF3328_MIXER_VOL_STEREO("FM Playback Volume", IDX_MIXER_FMSYNTH, 0x1f, 1),
 552         AZF3328_MIXER_SWITCH("CD Playback Switch", IDX_MIXER_CDAUDIO, 15, 1),
 553         AZF3328_MIXER_VOL_STEREO("CD Playback Volume", IDX_MIXER_CDAUDIO, 0x1f, 1),
 554         AZF3328_MIXER_SWITCH("Capture Switch", IDX_MIXER_REC_VOLUME, 15, 1),
 555         AZF3328_MIXER_VOL_STEREO("Capture Volume", IDX_MIXER_REC_VOLUME, 0x0f, 0),
 556         AZF3328_MIXER_ENUM("Capture Source", IDX_MIXER_REC_SELECT, 8, 0),
 557         AZF3328_MIXER_SWITCH("Mic Playback Switch", IDX_MIXER_MIC, 15, 1),
 558         AZF3328_MIXER_VOL_MONO("Mic Playback Volume", IDX_MIXER_MIC, 0x1f, 1),
 559         AZF3328_MIXER_SWITCH("Mic Boost (+20dB)", IDX_MIXER_MIC, 6, 0),
 560         AZF3328_MIXER_SWITCH("Line Playback Switch", IDX_MIXER_LINEIN, 15, 1),
 561         AZF3328_MIXER_VOL_STEREO("Line Playback Volume", IDX_MIXER_LINEIN, 0x1f, 1),
 562         AZF3328_MIXER_SWITCH("PCBeep Playback Switch", IDX_MIXER_PCBEEP, 15, 1),
 563         AZF3328_MIXER_VOL_SPECIAL("PCBeep Playback Volume", IDX_MIXER_PCBEEP, 0x0f, 1, 1),
 564         AZF3328_MIXER_SWITCH("Video Playback Switch", IDX_MIXER_VIDEO, 15, 1),
 565         AZF3328_MIXER_VOL_STEREO("Video Playback Volume", IDX_MIXER_VIDEO, 0x1f, 1),
 566         AZF3328_MIXER_SWITCH("Aux Playback Switch", IDX_MIXER_AUX, 15, 1),
 567         AZF3328_MIXER_VOL_STEREO("Aux Playback Volume", IDX_MIXER_AUX, 0x1f, 1),
 568         AZF3328_MIXER_SWITCH("Modem Playback Switch", IDX_MIXER_MODEMOUT, 15, 1),
 569         AZF3328_MIXER_VOL_MONO("Modem Playback Volume", IDX_MIXER_MODEMOUT, 0x1f, 1),
 570         AZF3328_MIXER_SWITCH("Modem Capture Switch", IDX_MIXER_MODEMIN, 15, 1),
 571         AZF3328_MIXER_VOL_MONO("Modem Capture Volume", IDX_MIXER_MODEMIN, 0x1f, 1),
 572         AZF3328_MIXER_ENUM("Modem Out Select", IDX_MIXER_ADVCTL2, 2, 8),
 573         AZF3328_MIXER_ENUM("Mono Select Source", IDX_MIXER_ADVCTL2, 2, 9),
 574         AZF3328_MIXER_VOL_SPECIAL("Tone Control - Treble", IDX_MIXER_BASSTREBLE, 0x07, 1, 0),
 575         AZF3328_MIXER_VOL_SPECIAL("Tone Control - Bass", IDX_MIXER_BASSTREBLE, 0x07, 9, 0),
 576         AZF3328_MIXER_SWITCH("3D Control - Toggle", IDX_MIXER_ADVCTL2, 13, 0),
 577         AZF3328_MIXER_VOL_SPECIAL("3D Control - Volume", IDX_MIXER_ADVCTL1, 0x07, 1, 0), /* "3D Width" */
 578         AZF3328_MIXER_VOL_SPECIAL("3D Control - Space", IDX_MIXER_ADVCTL1, 0x03, 8, 0), /* "Hifi 3D" */
 579 #if MIXER_TESTING
 580         AZF3328_MIXER_SWITCH("0", IDX_MIXER_ADVCTL2, 0, 0),
 581         AZF3328_MIXER_SWITCH("1", IDX_MIXER_ADVCTL2, 1, 0),
 582         AZF3328_MIXER_SWITCH("2", IDX_MIXER_ADVCTL2, 2, 0),
 583         AZF3328_MIXER_SWITCH("3", IDX_MIXER_ADVCTL2, 3, 0),
 584         AZF3328_MIXER_SWITCH("4", IDX_MIXER_ADVCTL2, 4, 0),
 585         AZF3328_MIXER_SWITCH("5", IDX_MIXER_ADVCTL2, 5, 0),
 586         AZF3328_MIXER_SWITCH("6", IDX_MIXER_ADVCTL2, 6, 0),
 587         AZF3328_MIXER_SWITCH("7", IDX_MIXER_ADVCTL2, 7, 0),
 588         AZF3328_MIXER_SWITCH("8", IDX_MIXER_ADVCTL2, 8, 0),
 589         AZF3328_MIXER_SWITCH("9", IDX_MIXER_ADVCTL2, 9, 0),
 590         AZF3328_MIXER_SWITCH("10", IDX_MIXER_ADVCTL2, 10, 0),
 591         AZF3328_MIXER_SWITCH("11", IDX_MIXER_ADVCTL2, 11, 0),
 592         AZF3328_MIXER_SWITCH("12", IDX_MIXER_ADVCTL2, 12, 0),
 593         AZF3328_MIXER_SWITCH("13", IDX_MIXER_ADVCTL2, 13, 0),
 594         AZF3328_MIXER_SWITCH("14", IDX_MIXER_ADVCTL2, 14, 0),
 595         AZF3328_MIXER_SWITCH("15", IDX_MIXER_ADVCTL2, 15, 0),
 596 #endif
 597 };
 598
 599 #define AZF3328_INIT_VALUES (sizeof(snd_azf3328_init_values)/sizeof(unsigned int)/2)
 600
 601 static unsigned int snd_azf3328_init_values[][2] = {
 602         { IDX_MIXER_PLAY_MASTER,        MIXER_MUTE_MASK|0x1f1f },
 603         { IDX_MIXER_MODEMOUT,           MIXER_MUTE_MASK|0x1f1f },
 604         { IDX_MIXER_BASSTREBLE,         0x0000 },
 605         { IDX_MIXER_PCBEEP,             MIXER_MUTE_MASK|0x1f1f },
 606         { IDX_MIXER_MODEMIN,            MIXER_MUTE_MASK|0x1f1f },
 607         { IDX_MIXER_MIC,                MIXER_MUTE_MASK|0x001f },
 608         { IDX_MIXER_LINEIN,             MIXER_MUTE_MASK|0x1f1f },
 609         { IDX_MIXER_CDAUDIO,            MIXER_MUTE_MASK|0x1f1f },
 610         { IDX_MIXER_VIDEO,              MIXER_MUTE_MASK|0x1f1f },
 611         { IDX_MIXER_AUX,                MIXER_MUTE_MASK|0x1f1f },
 612         { IDX_MIXER_WAVEOUT,            MIXER_MUTE_MASK|0x1f1f },
 613         { IDX_MIXER_FMSYNTH,            MIXER_MUTE_MASK|0x1f1f },
 614         { IDX_MIXER_REC_VOLUME,         MIXER_MUTE_MASK|0x0707 },
 615 };
 616
 617 static int __devinit snd_azf3328_mixer_new(azf3328_t *chip)
 618 {
 619         snd_card_t *card;
 620         snd_kcontrol_new_t *sw;
 621         unsigned int idx;
 622         int err;
 623
 624         snd_azf3328_dbgcallenter();
 625         snd_assert(chip != NULL && chip->card != NULL, return -EINVAL);
 626
 627         card = chip->card;
 628
 629         /* mixer reset */
 630         snd_azf3328_mixer_write(chip, IDX_MIXER_RESET, 0x0, WORD_VALUE);
 631
 632         /* mute and zero volume channels */
 633         for (idx = 0; idx < AZF3328_INIT_VALUES; idx++) {
 634                 snd_azf3328_mixer_write(chip, snd_azf3328_init_values[idx][0], snd_azf3328_init_values[idx][1], WORD_VALUE);
 635         }
 636
 637         /* add mixer controls */
 638         sw = snd_azf3328_mixer_controls;
 639         for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_mixer_controls); idx++, sw++) {
 640                 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(sw, chip))) < 0)
 641                         return err;
 642         }
 643         snd_component_add(card, "AZF3328 mixer");
 644         strcpy(card->mixername, "AZF3328 mixer");
 645
 646         snd_azf3328_dbgcallleave();
 647         return 0;
 648 }
 649
 650 static int snd_azf3328_hw_params(snd_pcm_substream_t * substream,
 651                                  snd_pcm_hw_params_t * hw_params)
 652 {
 653         int res;
 654         snd_azf3328_dbgcallenter();
 655         res = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
 656         snd_azf3328_dbgcallleave();
 657         return res;
 658 }
 659
 660 static int snd_azf3328_hw_free(snd_pcm_substream_t * substream)
 661 {
 662         snd_azf3328_dbgcallenter();
 663         snd_pcm_lib_free_pages(substream);
 664         snd_azf3328_dbgcallleave();
 665         return 0;
 666 }
 667
 668 static void snd_azf3328_setfmt(azf3328_t *chip,
 669                                unsigned int reg,
 670                                unsigned int bitrate,
 671                                unsigned int format_width,
 672                                unsigned int channels
 673 )
 674 {
 675         unsigned int val = 0xff00;
 676         unsigned long flags;
 677
 678         snd_azf3328_dbgcallenter();
 679         switch (bitrate) {
 680         case  5512: val |= 0x0d; break; /* the AZF3328 names it "5510" for some strange reason */
 681         case  6620: val |= 0x0b; break;
 682         case  8000: val |= 0x00; break;
 683         case  9600: val |= 0x08; break;
 684         case 11025: val |= 0x01; break;
 685         case 16000: val |= 0x02; break;
 686         case 22050: val |= 0x03; break;
 687         case 32000: val |= 0x04; break;
 688         case 44100: val |= 0x05; break;
 689         case 48000: val |= 0x06; break;
 690         case 64000: val |= 0x07; break;
 691         default:
 692                 snd_printk("unknown bitrate %d, assuming 44.1kHz!\n", bitrate);
 693                 val |= 0x05; /* 44100 */
 694                 break;
 695         }
 696         /* val = 0xff07; 3m27.993s (65301Hz; -> 64000Hz???) */
 697         /* val = 0xff09; 17m15.098s (13123,478Hz; -> 12000Hz???) */
 698         /* val = 0xff0a; 47m30.599s (4764,891Hz; -> 4800Hz???) */
 699         /* val = 0xff0c; 57m0.510s (4010,263Hz; -> 4000Hz???) */
 700         /* val = 0xff05; 5m11.556s (... -> 44100Hz) */
 701         /* val = 0xff03; 10m21.529s (21872,463Hz; -> 22050Hz???) */
 702         /* val = 0xff0f; 20m41.883s (10937,993Hz; -> 11025Hz???) */
 703         /* val = 0xff0d; 41m23.135s (5523,600Hz; -> 5512Hz???) */
 704         /* val = 0xff0e; 28m30.777s (8017Hz; -> 8000Hz???) */
 705         if (channels == 2)
 706                 val |= SOUNDFORMAT_FLAG_2CHANNELS;
 707
 708         if (format_width == 16)
 709                 val |= SOUNDFORMAT_FLAG_16BIT;
 710
 711         spin_lock_irqsave(&chip->reg_lock, flags);
 712
 713         /* set bitrate/format */
 714         outw(val, chip->codec_port+reg);
 715
 716         /* changing the bitrate/format settings switches off the
 717          * audio output with an annoying click in case of 8/16bit format change
 718          * (maybe shutting down DAC/ADC?), thus immediately
 719          * do some tweaking to reenable it and get rid of the clicking
 720          * (FIXME: yes, it works, but what exactly am I doing here?? :)
 721          * FIXME: does this have some side effects for full-duplex
 722          * or other dramatic side effects? */
 723         if (reg == IDX_IO_PLAY_SOUNDFORMAT) /* only do it for playback */
 724                 outw(inw(chip->codec_port + IDX_IO_PLAY_FLAGS)|DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_PLAY_FLAGS);
 725
 726         spin_unlock_irqrestore(&chip->reg_lock, flags);
 727         snd_azf3328_dbgcallleave();
 728 }
 729
 730 static void snd_azf3328_setdmaa(azf3328_t *chip,
 731                                 long unsigned int addr,
 732                                 unsigned int count,
 733                                 unsigned int size,
 734                                 int do_recording)
 735 {
 736         long unsigned int addr1;
 737         long unsigned int addr2;
 738         unsigned int count1;
 739         unsigned int count2;
 740         unsigned long flags;
 741         int reg_offs = do_recording ? 0x20 : 0x00;
 742
 743         snd_azf3328_dbgcallenter();
 744         /* AZF3328 uses a two buffer pointer DMA playback approach */
 745         if (!chip->is_playing)
 746         {
 747                 addr1 = addr;
 748                 addr2 = addr+(size/2);
 749                 count1 = (size/2)-1;
 750                 count2 = (size/2)-1;
 751 #if DEBUG_PLAY_REC
 752                 snd_azf3328_dbgplay("setting dma: buf1 %08lx[%d], buf2 %08lx[%d]\n", addr1, count1, addr2, count2);
 753 #endif
 754                 spin_lock_irqsave(&chip->reg_lock, flags);
 755                 outl(addr1, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_START_1);
 756                 outl(addr2, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_START_2);
 757                 outw(count1, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_LEN_1);
 758                 outw(count2, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_LEN_2);
 759                 spin_unlock_irqrestore(&chip->reg_lock, flags);
 760         }
 761         snd_azf3328_dbgcallleave();
 762 }
 763
 764 static int snd_azf3328_playback_prepare(snd_pcm_substream_t *substream)
 765 {
 766 #if 0
 767         azf3328_t *chip = snd_pcm_substream_chip(substream);
 768         snd_pcm_runtime_t *runtime = substream->runtime;
 769         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
 770         unsigned int count = snd_pcm_lib_period_bytes(substream);
 771 #endif
 772
 773         snd_azf3328_dbgcallenter();
 774 #if 0
 775         snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
 776         snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 0);
 777 #endif
 778         snd_azf3328_dbgcallleave();
 779         return 0;
 780 }
 781
 782 static int snd_azf3328_capture_prepare(snd_pcm_substream_t * substream)
 783 {
 784 #if 0
 785         azf3328_t *chip = snd_pcm_substream_chip(substream);
 786         snd_pcm_runtime_t *runtime = substream->runtime;
 787         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
 788         unsigned int count = snd_pcm_lib_period_bytes(substream);
 789 #endif
 790
 791         snd_azf3328_dbgcallenter();
 792 #if 0
 793         snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
 794         snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 1);
 795 #endif
 796         snd_azf3328_dbgcallleave();
 797         return 0;
 798 }
 799
 800 static int snd_azf3328_playback_trigger(snd_pcm_substream_t * substream, int cmd)
 801 {
 802         azf3328_t *chip = snd_pcm_substream_chip(substream);
 803         snd_pcm_runtime_t *runtime = substream->runtime;
 804         int result = 0;
 805         unsigned int status1;
 806
 807         snd_azf3328_dbgcalls("snd_azf3328_playback_trigger cmd %d\n", cmd);
 808         switch (cmd) {
 809         case SNDRV_PCM_TRIGGER_START:
 810
 811                 snd_azf3328_dbgio(chip, "trigger1");
 812
 813                 /* mute WaveOut */
 814                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
 815
 816                 snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
 817
 818                 spin_lock(&chip->reg_lock);
 819                 /* stop playback */
 820                 status1 = inw(chip->codec_port+IDX_IO_PLAY_FLAGS);
 821                 status1 &= ~DMA_RESUME;
 822                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 823
 824                 /* FIXME: clear interrupts or what??? */
 825                 outw(0xffff, chip->codec_port+IDX_IO_PLAY_IRQMASK);
 826                 spin_unlock(&chip->reg_lock);
 827
 828                 snd_azf3328_setdmaa(chip, runtime->dma_addr, snd_pcm_lib_period_bytes(substream), snd_pcm_lib_buffer_bytes(substream), 0);
 829
 830                 spin_lock(&chip->reg_lock);
 831 #ifdef WIN9X
 832                 /* FIXME: enable playback/recording??? */
 833                 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
 834                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 835
 836                 /* start playback again */
 837                 /* FIXME: what is this value (0x0010)??? */
 838                 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
 839                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 840 #else /* NT4 */
 841                 outw(0x00, chip->codec_port+IDX_IO_PLAY_FLAGS);
 842                 outw(DMA_PLAY_SOMETHING1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 843                 outw(DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2, chip->codec_port+IDX_IO_PLAY_FLAGS);
 844                 outw(DMA_RESUME|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port+IDX_IO_PLAY_FLAGS);
 845 #endif
 846                 spin_unlock(&chip->reg_lock);
 847
 848                 /* now unmute WaveOut */
 849                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
 850
 851                 snd_azf3328_dbgio(chip, "trigger2");
 852                 chip->is_playing = 1;
 853                 break;
 854         case SNDRV_PCM_TRIGGER_STOP:
 855                 /* mute WaveOut */
 856                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
 857
 858                 spin_lock(&chip->reg_lock);
 859                 /* stop playback */
 860                 status1 = inw(chip->codec_port+IDX_IO_PLAY_FLAGS);
 861
 862                 status1 &= ~DMA_RESUME;
 863                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 864
 865                 status1 |= DMA_PLAY_SOMETHING1;
 866                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 867
 868                 status1 &= ~DMA_PLAY_SOMETHING1;
 869                 outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
 870                 spin_unlock(&chip->reg_lock);
 871
 872                 /* now unmute WaveOut */
 873                 snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
 874                 chip->is_playing = 0;
 875                 break;
 876         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 877                 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
 878                 break;
 879         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 880                 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
 881                 break;
 882         default:
 883                 return -EINVAL;
 884         }
 885
 886         snd_azf3328_dbgcallleave();
 887         return result;
 888 }
 889
 890 /* this is just analogous to playback; I'm not quite sure whether recording
 891  * should actually be triggered like that */
 892 static int snd_azf3328_capture_trigger(snd_pcm_substream_t * substream, int cmd)
 893 {
 894         azf3328_t *chip = snd_pcm_substream_chip(substream);
 895         snd_pcm_runtime_t *runtime = substream->runtime;
 896         int result = 0;
 897         unsigned int status1;
 898
 899         snd_azf3328_dbgcalls("snd_azf3328_capture_trigger cmd %d\n", cmd);
 900         switch (cmd) {
 901         case SNDRV_PCM_TRIGGER_START:
 902
 903                 snd_azf3328_dbgio(chip, "trigger1");
 904
 905                 snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
 906
 907                 spin_lock(&chip->reg_lock);
 908                 /* stop recording */
 909                 status1 = inw(chip->codec_port+IDX_IO_REC_FLAGS);
 910                 status1 &= ~DMA_RESUME;
 911                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 912
 913                 /* FIXME: clear interrupts or what??? */
 914                 outw(0xffff, chip->codec_port+IDX_IO_REC_IRQMASK);
 915                 spin_unlock(&chip->reg_lock);
 916
 917                 snd_azf3328_setdmaa(chip, runtime->dma_addr, snd_pcm_lib_period_bytes(substream), snd_pcm_lib_buffer_bytes(substream), 1);
 918
 919                 spin_lock(&chip->reg_lock);
 920 #ifdef WIN9X
 921                 /* FIXME: enable playback/recording??? */
 922                 status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
 923                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 924
 925                 /* start playback again */
 926                 /* FIXME: what is this value (0x0010)??? */
 927                 status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
 928                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 929 #else
 930                 outw(0x00, chip->codec_port+IDX_IO_REC_FLAGS);
 931                 outw(DMA_PLAY_SOMETHING1, chip->codec_port+IDX_IO_REC_FLAGS);
 932                 outw(DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2, chip->codec_port+IDX_IO_REC_FLAGS);
 933                 outw(DMA_RESUME|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port+IDX_IO_REC_FLAGS);
 934 #endif
 935                 spin_unlock(&chip->reg_lock);
 936
 937                 snd_azf3328_dbgio(chip, "trigger2");
 938                 chip->is_playing = 1;
 939                 break;
 940         case SNDRV_PCM_TRIGGER_STOP:
 941                 spin_lock(&chip->reg_lock);
 942                 /* stop recording */
 943                 status1 = inw(chip->codec_port+IDX_IO_REC_FLAGS);
 944
 945                 status1 &= ~DMA_RESUME;
 946                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 947
 948                 status1 |= DMA_PLAY_SOMETHING1;
 949                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 950
 951                 status1 &= ~DMA_PLAY_SOMETHING1;
 952                 outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
 953                 spin_unlock(&chip->reg_lock);
 954
 955                 chip->is_playing = 0;
 956                 break;
 957         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 958                 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
 959                 break;
 960         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 961                 snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
 962                 break;
 963         default:
 964                 return -EINVAL;
 965         }
 966
 967         snd_azf3328_dbgcallleave();
 968         return result;
 969 }
 970
 971 static snd_pcm_uframes_t snd_azf3328_playback_pointer(snd_pcm_substream_t * substream)
 972 {
 973         azf3328_t *chip = snd_pcm_substream_chip(substream);
 974         unsigned long bufptr, playptr;
 975         unsigned long result;
 976         snd_pcm_uframes_t frmres;
 977
 978 #ifdef QUERY_HARDWARE
 979         bufptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_START_1);
 980 #else
 981         bufptr = substream->runtime->dma_addr;
 982 #endif
 983         playptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS);
 984
 985         result = playptr - bufptr;
 986         frmres = bytes_to_frames( substream->runtime, result );
 987         snd_azf3328_dbgplay("result %lx, playptr %lx (base %x), frames %ld\n", result, playptr, substream->runtime->dma_addr, frmres);
 988         return frmres;
 989 }
 990
 991 static snd_pcm_uframes_t snd_azf3328_capture_pointer(snd_pcm_substream_t * substream)
 992 {
 993         azf3328_t *chip = snd_pcm_substream_chip(substream);
 994         unsigned long bufptr, recptr;
 995         unsigned long result;
 996         snd_pcm_uframes_t frmres;
 997
 998 #ifdef QUERY_HARDWARE
 999         bufptr = inl(chip->codec_port+IDX_IO_REC_DMA_START_1);
1000 #else
1001         bufptr = substream->runtime->dma_addr;
1002 #endif
1003         recptr = inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS);
1004
1005         result = recptr - bufptr;
1006         frmres = bytes_to_frames( substream->runtime, result );
1007         snd_azf3328_dbgplay("result %lx, rec ptr %lx (base %x), frames %ld\n", result, recptr, substream->runtime->dma_addr, frmres);
1008         return frmres;
1009 }
1010
1011 static irqreturn_t snd_azf3328_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1012 {
1013         azf3328_t *chip = dev_id;
1014         unsigned int status, which;
1015         static unsigned long count;
1016
1017         status  = inw(chip->codec_port+IDX_IO_IRQSTATUS);
1018
1019         /* fast path out, to ease interrupt sharing */
1020         if (!(status & (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_MPU401|IRQ_SOMEIRQ)))
1021                 return IRQ_NONE; /* must be interrupt for another device */
1022
1023         snd_azf3328_dbgplay("Interrupt %ld!\nIDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQMASK %04x, IDX_IO_IRQSTATUS %04x\n", count, inw(chip->codec_port+IDX_IO_PLAY_FLAGS), inw(chip->codec_port+IDX_IO_PLAY_IRQMASK), inw(chip->codec_port+IDX_IO_IRQSTATUS));
1024
1025         if (status & IRQ_PLAYBACK)
1026         {
1027                 spin_lock(&chip->reg_lock);
1028                 which = inw(chip->codec_port+IDX_IO_PLAY_IRQMASK);
1029                 if (which & IRQ_FINISHED_PLAYBUF_1)
1030                         /* ack IRQ */
1031                         outw(which | IRQ_FINISHED_PLAYBUF_1, chip->codec_port+IDX_IO_PLAY_IRQMASK);
1032                 if (which & IRQ_FINISHED_PLAYBUF_2)
1033                         /* ack IRQ */
1034                         outw(which | IRQ_FINISHED_PLAYBUF_2, chip->codec_port+IDX_IO_PLAY_IRQMASK);
1035                 if (which & IRQ_PLAY_SOMETHING)
1036                 {
1037                         snd_azf3328_dbgplay("azt3328: unknown play IRQ type occurred, please report!\n");
1038                 }
1039                 if (chip->pcm && chip->playback_substream)
1040                 {
1041                         snd_azf3328_dbgplay("which %x, playptr %lx\n", which, inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS));
1042                         snd_pcm_period_elapsed(chip->playback_substream);
1043                         snd_azf3328_dbgplay("period done, playptr %lx.\n", inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS));
1044                 }
1045                 else
1046                         snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n");
1047                 spin_unlock(&chip->reg_lock);
1048         }
1049         if (status & IRQ_RECORDING)
1050         {
1051                 spin_lock(&chip->reg_lock);
1052                 which = inw(chip->codec_port+IDX_IO_REC_IRQMASK);
1053                 if (which & IRQ_FINISHED_RECBUF_1)
1054                         /* ack interrupt */
1055                         outw(which | IRQ_FINISHED_RECBUF_1, chip->codec_port+IDX_IO_REC_IRQMASK);
1056                 if (which & IRQ_FINISHED_RECBUF_2)
1057                         /* ack interrupt */
1058                         outw(which | IRQ_FINISHED_RECBUF_2, chip->codec_port+IDX_IO_REC_IRQMASK);
1059                 if (which & IRQ_REC_SOMETHING)
1060                 {
1061                         snd_azf3328_dbgplay("azt3328: unknown rec IRQ type occurred, please report!\n");
1062                 }
1063                 if (chip->pcm && chip->capture_substream)
1064                 {
1065                         snd_azf3328_dbgplay("which %x, recptr %lx\n", which, inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS));
1066                         spin_unlock(&chip->reg_lock);
1067                         snd_pcm_period_elapsed(chip->capture_substream);
1068                         spin_lock(&chip->reg_lock);
1069                         snd_azf3328_dbgplay("period done, recptr %lx.\n", inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS));
1070                 }
1071                 spin_unlock(&chip->reg_lock);
1072         }
1073         if (status & IRQ_MPU401)
1074                 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
1075         if (status & IRQ_SOMEIRQ)
1076                 snd_azf3328_dbgplay("azt3328: unknown IRQ type occurred, please report!\n");
1077         count++;
1078         return IRQ_HANDLED;
1079 }
1080
1081 /*****************************************************************/
1082
1083 static snd_pcm_hardware_t snd_azf3328_playback =
1084 {
1085         /* FIXME!! Correct? */
1086         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1087                                  SNDRV_PCM_INFO_MMAP_VALID),
1088         .formats =              SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
1089                                 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,
1090         .rates =                SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_KNOT,
1091         .rate_min =             5512,
1092         .rate_max =             64000,
1093         .channels_min =         1,
1094         .channels_max =         2,
1095         .buffer_bytes_max =     65536,
1096         .period_bytes_min =     64,
1097         .period_bytes_max =     65536,
1098         .periods_min =          1,
1099         .periods_max =          1024,
1100         /* FIXME: maybe that card actually has a FIFO?
1101          * Hmm, it seems newer revisions do have one, but we still don't know
1102          * its size... */
1103         .fifo_size =            0,
1104 };
1105
1106 static snd_pcm_hardware_t snd_azf3328_capture =
1107 {
1108         /* FIXME */
1109         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1110                                  SNDRV_PCM_INFO_MMAP_VALID),
1111         .formats =              SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
1112                                 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,
1113         .rates =                SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_KNOT,
1114         .rate_min =             5512,
1115         .rate_max =             64000,
1116         .channels_min =         1,
1117         .channels_max =         2,
1118         .buffer_bytes_max =     65536,
1119         .period_bytes_min =     64,
1120         .period_bytes_max =     65536,
1121         .periods_min =          1,
1122         .periods_max =          1024,
1123         .fifo_size =            0,
1124 };
1125
1126
1127 static unsigned int snd_azf3328_fixed_rates[] = {
1128         5512, 6620, 8000, 9600, 11025, 16000, 22050, 32000, 44100, 48000, 64000
1129 };
1130 static snd_pcm_hw_constraint_list_t snd_azf3328_hw_constraints_rates = {
1131         .count = ARRAY_SIZE(snd_azf3328_fixed_rates),
1132         .list = snd_azf3328_fixed_rates,
1133         .mask = 0,
1134 };
1135
1136 /*****************************************************************/
1137
1138 static int snd_azf3328_playback_open(snd_pcm_substream_t * substream)
1139 {
1140         azf3328_t *chip = snd_pcm_substream_chip(substream);
1141         snd_pcm_runtime_t *runtime = substream->runtime;
1142
1143         snd_azf3328_dbgcallenter();
1144         chip->playback_substream = substream;
1145         runtime->hw = snd_azf3328_playback;
1146         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1147                                    &snd_azf3328_hw_constraints_rates);
1148         snd_azf3328_dbgcallleave();
1149         return 0;
1150 }
1151
1152 static int snd_azf3328_capture_open(snd_pcm_substream_t * substream)
1153 {
1154         azf3328_t *chip = snd_pcm_substream_chip(substream);
1155         snd_pcm_runtime_t *runtime = substream->runtime;
1156
1157         snd_azf3328_dbgcallenter();
1158         chip->capture_substream = substream;
1159         runtime->hw = snd_azf3328_capture;
1160         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1161                                    &snd_azf3328_hw_constraints_rates);
1162         snd_azf3328_dbgcallleave();
1163         return 0;
1164 }
1165
1166 static int snd_azf3328_playback_close(snd_pcm_substream_t * substream)
1167 {
1168         azf3328_t *chip = snd_pcm_substream_chip(substream);
1169
1170         snd_azf3328_dbgcallenter();
1171
1172         chip->playback_substream = NULL;
1173         snd_azf3328_dbgcallleave();
1174         return 0;
1175 }
1176
1177 static int snd_azf3328_capture_close(snd_pcm_substream_t * substream)
1178 {
1179         azf3328_t *chip = snd_pcm_substream_chip(substream);
1180
1181         snd_azf3328_dbgcallenter();
1182         chip->capture_substream = NULL;
1183         snd_azf3328_dbgcallleave();
1184         return 0;
1185 }
1186
1187 /******************************************************************/
1188
1189 static snd_pcm_ops_t snd_azf3328_playback_ops = {
1190         .open =         snd_azf3328_playback_open,
1191         .close =        snd_azf3328_playback_close,
1192         .ioctl =        snd_pcm_lib_ioctl,
1193         .hw_params =    snd_azf3328_hw_params,
1194         .hw_free =      snd_azf3328_hw_free,
1195         .prepare =      snd_azf3328_playback_prepare,
1196         .trigger =      snd_azf3328_playback_trigger,
1197         .pointer =      snd_azf3328_playback_pointer
1198 };
1199
1200 static snd_pcm_ops_t snd_azf3328_capture_ops = {
1201         .open =         snd_azf3328_capture_open,
1202         .close =        snd_azf3328_capture_close,
1203         .ioctl =        snd_pcm_lib_ioctl,
1204         .hw_params =    snd_azf3328_hw_params,
1205         .hw_free =      snd_azf3328_hw_free,
1206         .prepare =      snd_azf3328_capture_prepare,
1207         .trigger =      snd_azf3328_capture_trigger,
1208         .pointer =      snd_azf3328_capture_pointer
1209 };
1210
1211 static void snd_azf3328_pcm_free(snd_pcm_t *pcm)
1212 {
1213         azf3328_t *chip = pcm->private_data;
1214         chip->pcm = NULL;
1215         snd_pcm_lib_preallocate_free_for_all(pcm);
1216 }
1217
1218 static int __devinit snd_azf3328_pcm(azf3328_t *chip, int device)
1219 {
1220         snd_pcm_t *pcm;
1221         int err;
1222
1223         snd_azf3328_dbgcallenter();
1224         if ((err = snd_pcm_new(chip->card, "AZF3328 DSP", device, 1, 1, &pcm)) < 0)
1225                 return err;
1226         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_azf3328_playback_ops);
1227         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_azf3328_capture_ops);
1228
1229         pcm->private_data = chip;
1230         pcm->private_free = snd_azf3328_pcm_free;
1231         pcm->info_flags = 0;
1232         strcpy(pcm->name, chip->card->shortname);
1233         chip->pcm = pcm;
1234
1235         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1236                                               snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
1237
1238         snd_azf3328_dbgcallleave();
1239         return 0;
1240 }
1241
1242 /******************************************************************/
1243
1244 static int snd_azf3328_free(azf3328_t *chip)
1245 {
1246         if (chip->irq < 0)
1247                 goto __end_hw;
1248
1249         /* reset (close) mixer */
1250         snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); /* first mute master volume */
1251         snd_azf3328_mixer_write(chip, IDX_MIXER_RESET, 0x0, WORD_VALUE);
1252
1253         /* interrupt setup - mask everything */
1254         /* FIXME */
1255
1256         synchronize_irq(chip->irq);
1257       __end_hw:
1258 #ifdef SUPPORT_JOYSTICK
1259         if (chip->res_joystick) {
1260                 gameport_unregister_port(&chip->gameport);
1261                 /* disable gameport */
1262                 snd_azf3328_io2_write(chip, IDX_IO2_LEGACY_ADDR,
1263                                       snd_azf3328_io2_read(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY);
1264                 release_resource(chip->res_joystick);
1265                 kfree_nocheck(chip->res_joystick);
1266         }
1267 #endif
1268         if (chip->irq >= 0)
1269                 free_irq(chip->irq, (void *)chip);
1270         pci_release_regions(chip->pci);
1271         pci_disable_device(chip->pci);
1272
1273         kfree(chip);
1274         return 0;
1275 }
1276
1277 static int snd_azf3328_dev_free(snd_device_t *device)
1278 {
1279         azf3328_t *chip = device->device_data;
1280         return snd_azf3328_free(chip);
1281 }
1282
1283 #if 0
1284 /* check whether a bit can be modified */
1285 static void snd_azf3328_test_bit(unsigned int reg, int bit)
1286 {
1287         unsigned char val, valoff, valon;
1288
1289         val = inb(reg);
1290
1291         outb(val & ~(1 << bit), reg);
1292         valoff = inb(reg);
1293
1294         outb(val|(1 << bit), reg);
1295         valon = inb(reg);
1296
1297         outb(val, reg);
1298
1299         printk(KERN_ERR "reg %04x bit %d: %02x %02x %02x\n", reg, bit, val, valoff, valon);
1300 }
1301 #endif
1302
1303 static int __devinit snd_azf3328_create(snd_card_t * card,
1304                                          struct pci_dev *pci,
1305                                          unsigned long device_type,
1306                                          azf3328_t ** rchip)
1307 {
1308         azf3328_t *chip;
1309         int err;
1310         static snd_device_ops_t ops = {
1311                 .dev_free =     snd_azf3328_dev_free,
1312         };
1313         u16 tmp;
1314
1315         *rchip = NULL;
1316
1317         if ((err = pci_enable_device(pci)) < 0)
1318                 return err;
1319
1320         chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1321         if (chip == NULL) {
1322                 pci_disable_device(pci);
1323                 return -ENOMEM;
1324         }
1325         spin_lock_init(&chip->reg_lock);
1326         chip->card = card;
1327         chip->pci = pci;
1328         chip->irq = -1;
1329
1330         /* check if we can restrict PCI DMA transfers to 24 bits */
1331         if (pci_set_dma_mask(pci, 0x00ffffff) < 0 ||
1332             pci_set_consistent_dma_mask(pci, 0x00ffffff) < 0) {
1333                 snd_printk("architecture does not support 24bit PCI busmaster DMA\n");
1334                 pci_disable_device(pci);
1335                 return -ENXIO;
1336         }
1337
1338         if ((err = pci_request_regions(pci, "Aztech AZF3328")) < 0) {
1339                 kfree(chip);
1340                 pci_disable_device(pci);
1341                 return err;
1342         }
1343
1344         chip->codec_port = pci_resource_start(pci, 0);
1345         chip->io2_port = pci_resource_start(pci, 1);
1346         chip->mpu_port = pci_resource_start(pci, 2);
1347         chip->synth_port = pci_resource_start(pci, 3);
1348         chip->mixer_port = pci_resource_start(pci, 4);
1349
1350         if (request_irq(pci->irq, snd_azf3328_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1351                 snd_printk("unable to grab IRQ %d\n", pci->irq);
1352                 snd_azf3328_free(chip);
1353                 return -EBUSY;
1354         }
1355         chip->irq = pci->irq;
1356         pci_set_master(pci);
1357         synchronize_irq(chip->irq);
1358
1359         snd_azf3328_dbgmisc("codec_port 0x%lx, io2_port 0x%lx, mpu_port 0x%lx, synth_port 0x%lx, mixer_port 0x%lx, irq %d\n", chip->codec_port, chip->io2_port, chip->mpu_port, chip->synth_port, chip->mixer_port, chip->irq);
1360
1361         snd_azf3328_dbgmisc("io2 %02x %02x %02x %02x %02x %02x\n", snd_azf3328_io2_read(chip, 0), snd_azf3328_io2_read(chip, 1), snd_azf3328_io2_read(chip, 2), snd_azf3328_io2_read(chip, 3), snd_azf3328_io2_read(chip, 4), snd_azf3328_io2_read(chip, 5));
1362
1363         for (tmp=0; tmp <= 0x01; tmp += 1)
1364                 snd_azf3328_dbgmisc("0x%02x: opl 0x%04x, mpu300 0x%04x, mpu310 0x%04x, mpu320 0x%04x, mpu330 0x%04x\n", tmp, inb(0x388 + tmp), inb(0x300 + tmp), inb(0x310 + tmp), inb(0x320 + tmp), inb(0x330 + tmp));
1365
1366         /* create mixer interface & switches */
1367         if ((err = snd_azf3328_mixer_new(chip)) < 0)
1368                 return err;
1369
1370         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1371                 snd_azf3328_free(chip);
1372                 return err;
1373         }
1374
1375 #if 0
1376         /* set very low bitrate to reduce noise and power consumption? */
1377         snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 5512, 8, 1);
1378 #endif
1379
1380         /* standard chip init stuff */
1381         spin_lock_irq(&chip->reg_lock);
1382         outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_PLAY_FLAGS);
1383         outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_SOMETHING_FLAGS);
1384         outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_REC_FLAGS);
1385         outb(0x0, chip->codec_port + IDX_IO_IRQ63H);
1386
1387         spin_unlock_irq(&chip->reg_lock);
1388
1389         snd_card_set_dev(card, &pci->dev);
1390
1391         *rchip = chip;
1392         return 0;
1393 }
1394
1395 #ifdef SUPPORT_JOYSTICK
1396 static void __devinit snd_azf3328_config_joystick(azf3328_t *chip, int joystick)
1397 {
1398         unsigned char val;
1399
1400         if (joystick == 1) {
1401                 if ((chip->res_joystick = request_region(0x200, 8, "AZF3328 gameport")) != NULL)
1402                         chip->gameport.io = 0x200;
1403         }
1404
1405         val = inb(chip->io2_port + IDX_IO2_LEGACY_ADDR);
1406         if (chip->res_joystick)
1407                 val |= LEGACY_JOY;
1408         else
1409                 val &= ~LEGACY_JOY;
1410
1411         outb(val, chip->io2_port + IDX_IO2_LEGACY_ADDR);
1412         if (chip->res_joystick)
1413                 gameport_register_port(&chip->gameport);
1414 }
1415 #endif
1416
1417 static int __devinit snd_azf3328_probe(struct pci_dev *pci,
1418                                           const struct pci_device_id *pci_id)
1419 {
1420         static int dev;
1421         snd_card_t *card;
1422         azf3328_t *chip;
1423         opl3_t *opl3;
1424         int err;
1425
1426         snd_azf3328_dbgcallenter();
1427         if (dev >= SNDRV_CARDS)
1428                 return -ENODEV;
1429         if (!enable[dev]) {
1430                 dev++;
1431                 return -ENOENT;
1432         }
1433
1434         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0 );
1435         if (card == NULL)
1436                 return -ENOMEM;
1437
1438         strcpy(card->driver, "AZF3328");
1439         strcpy(card->shortname, "Aztech AZF3328 (PCI168)");
1440
1441         if ((err = snd_azf3328_create(card, pci, pci_id->driver_data, &chip)) < 0) {
1442                 snd_card_free(card);
1443                 return err;
1444         }
1445
1446         if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_MPU401,
1447                                         chip->mpu_port, 1, pci->irq, 0,
1448                                         &chip->rmidi)) < 0) {
1449                 snd_printk("azf3328: no MPU-401 device at 0x%lx?\n", chip->mpu_port);
1450                 snd_card_free(card);
1451                 return err;
1452         }
1453
1454         if ((err = snd_azf3328_pcm(chip, 0)) < 0) {
1455                 snd_card_free(card);
1456                 return err;
1457         }
1458
1459         if (snd_opl3_create(card, chip->synth_port, chip->synth_port+2,
1460                             OPL3_HW_AUTO, 1, &opl3) < 0) {
1461                 snd_printk("azf3328: no OPL3 device at 0x%lx-0x%lx?\n",
1462                            chip->synth_port, chip->synth_port+2 );
1463         } else {
1464                 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1465                         snd_card_free(card);
1466                         return err;
1467                 }
1468         }
1469
1470         snd_azf3328_dbgio(chip, "create");
1471
1472         sprintf(card->longname, "%s at 0x%lx, irq %i",
1473                 card->shortname, chip->codec_port, chip->irq);
1474
1475         if ((err = snd_card_register(card)) < 0) {
1476                 snd_card_free(card);
1477                 return err;
1478         }
1479
1480 #ifdef MODULE
1481         printk(
1482 "azt3328: Experimental driver for Aztech AZF3328-based soundcards such as PCI168.\n"
1483 "azt3328: ZERO support from Aztech: you might think hard about future purchase.\n"
1484 "azt3328: Feel free to contact hw7oshyuv3001@sneakemail.com for bug reports etc.!\n");
1485 #endif
1486
1487 #ifdef SUPPORT_JOYSTICK
1488         snd_azf3328_config_joystick(chip, joystick[dev]);
1489 #endif
1490
1491         pci_set_drvdata(pci, card);
1492         dev++;
1493
1494         snd_azf3328_dbgcallleave();
1495         return 0;
1496 }
1497
1498 static void __devexit snd_azf3328_remove(struct pci_dev *pci)
1499 {
1500         snd_azf3328_dbgcallenter();
1501         snd_card_free(pci_get_drvdata(pci));
1502         pci_set_drvdata(pci, NULL);
1503         snd_azf3328_dbgcallleave();
1504 }
1505
1506 static struct pci_driver driver = {
1507         .name = "AZF3328",
1508         .id_table = snd_azf3328_ids,
1509         .probe = snd_azf3328_probe,
1510         .remove = __devexit_p(snd_azf3328_remove),
1511 };
1512
1513 static int __init alsa_card_azf3328_init(void)
1514 {
1515         int err;
1516         snd_azf3328_dbgcallenter();
1517         err = pci_module_init(&driver);
1518         snd_azf3328_dbgcallleave();
1519         return err;
1520 }
1521
1522 static void __exit alsa_card_azf3328_exit(void)
1523 {
1524         snd_azf3328_dbgcallenter();
1525         pci_unregister_driver(&driver);
1526         snd_azf3328_dbgcallleave();
1527 }
1528
1529 module_init(alsa_card_azf3328_init)
1530 module_exit(alsa_card_azf3328_exit)