sound/pci/bt87x.c

   1 /*
   2  * bt87x.c - Brooktree Bt878/Bt879 driver for ALSA
   3  *
   4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
   5  *
   6  * based on btaudio.c by Gerd Knorr <kraxel@bytesex.org>
   7  *
   8  *
   9  *  This driver is free software; you can redistribute it and/or modify
  10  *  it under the terms of the GNU General Public License as published by
  11  *  the Free Software Foundation; either version 2 of the License, or
  12  *  (at your option) any later version.
  13  *
  14  *  This driver is distributed in the hope that it will be useful,
  15  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *  GNU General Public License for more details.
  18  *
  19  *  You should have received a copy of the GNU General Public License
  20  *  along with this program; if not, write to the Free Software
  21  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  22  */
  23
  24 #include <sound/driver.h>
  25 #include <linux/init.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/pci.h>
  28 #include <linux/slab.h>
  29 #include <linux/moduleparam.h>
  30 #include <linux/bitops.h>
  31 #include <asm/io.h>
  32 #include <sound/core.h>
  33 #include <sound/pcm.h>
  34 #include <sound/pcm_params.h>
  35 #include <sound/control.h>
  36 #include <sound/initval.h>
  37
  38 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
  39 MODULE_DESCRIPTION("Brooktree Bt87x audio driver");
  40 MODULE_LICENSE("GPL");
  41 MODULE_SUPPORTED_DEVICE("{{Brooktree,Bt878},"
  42                 "{Brooktree,Bt879}}");
  43
  44 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  45 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  46 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  47 static int digital_rate[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 }; /* digital input rate */
  48
  49 module_param_array(index, int, NULL, 0444);
  50 MODULE_PARM_DESC(index, "Index value for Bt87x soundcard");
  51 module_param_array(id, charp, NULL, 0444);
  52 MODULE_PARM_DESC(id, "ID string for Bt87x soundcard");
  53 module_param_array(enable, bool, NULL, 0444);
  54 MODULE_PARM_DESC(enable, "Enable Bt87x soundcard");
  55 module_param_array(digital_rate, int, NULL, 0444);
  56 MODULE_PARM_DESC(digital_rate, "Digital input rate for Bt87x soundcard");
  57
  58
  59 #ifndef PCI_VENDOR_ID_BROOKTREE
  60 #define PCI_VENDOR_ID_BROOKTREE 0x109e
  61 #endif
  62 #ifndef PCI_DEVICE_ID_BROOKTREE_878
  63 #define PCI_DEVICE_ID_BROOKTREE_878 0x0878
  64 #endif
  65 #ifndef PCI_DEVICE_ID_BROOKTREE_879
  66 #define PCI_DEVICE_ID_BROOKTREE_879 0x0879
  67 #endif
  68
  69 /* register offsets */
  70 #define REG_INT_STAT            0x100   /* interrupt status */
  71 #define REG_INT_MASK            0x104   /* interrupt mask */
  72 #define REG_GPIO_DMA_CTL        0x10c   /* audio control */
  73 #define REG_PACKET_LEN          0x110   /* audio packet lengths */
  74 #define REG_RISC_STRT_ADD       0x114   /* RISC program start address */
  75 #define REG_RISC_COUNT          0x120   /* RISC program counter */
  76
  77 /* interrupt bits */
  78 #define INT_OFLOW       (1 <<  3)       /* audio A/D overflow */
  79 #define INT_RISCI       (1 << 11)       /* RISC instruction IRQ bit set */
  80 #define INT_FBUS        (1 << 12)       /* FIFO overrun due to bus access latency */
  81 #define INT_FTRGT       (1 << 13)       /* FIFO overrun due to target latency */
  82 #define INT_FDSR        (1 << 14)       /* FIFO data stream resynchronization */
  83 #define INT_PPERR       (1 << 15)       /* PCI parity error */
  84 #define INT_RIPERR      (1 << 16)       /* RISC instruction parity error */
  85 #define INT_PABORT      (1 << 17)       /* PCI master or target abort */
  86 #define INT_OCERR       (1 << 18)       /* invalid opcode */
  87 #define INT_SCERR       (1 << 19)       /* sync counter overflow */
  88 #define INT_RISC_EN     (1 << 27)       /* DMA controller running */
  89 #define INT_RISCS_SHIFT       28        /* RISC status bits */
  90
  91 /* audio control bits */
  92 #define CTL_FIFO_ENABLE         (1 <<  0)       /* enable audio data FIFO */
  93 #define CTL_RISC_ENABLE         (1 <<  1)       /* enable audio DMA controller */
  94 #define CTL_PKTP_4              (0 <<  2)       /* packet mode FIFO trigger point - 4 DWORDs */
  95 #define CTL_PKTP_8              (1 <<  2)       /* 8 DWORDs */
  96 #define CTL_PKTP_16             (2 <<  2)       /* 16 DWORDs */
  97 #define CTL_ACAP_EN             (1 <<  4)       /* enable audio capture */
  98 #define CTL_DA_APP              (1 <<  5)       /* GPIO input */
  99 #define CTL_DA_IOM_AFE          (0 <<  6)       /* audio A/D input */
 100 #define CTL_DA_IOM_DA           (1 <<  6)       /* digital audio input */
 101 #define CTL_DA_SDR_SHIFT               8        /* DDF first stage decimation rate */
 102 #define CTL_DA_SDR_MASK         (0xf<< 8)
 103 #define CTL_DA_LMT              (1 << 12)       /* limit audio data values */
 104 #define CTL_DA_ES2              (1 << 13)       /* enable DDF stage 2 */
 105 #define CTL_DA_SBR              (1 << 14)       /* samples rounded to 8 bits */
 106 #define CTL_DA_DPM              (1 << 15)       /* data packet mode */
 107 #define CTL_DA_LRD_SHIFT              16        /* ALRCK delay */
 108 #define CTL_DA_MLB              (1 << 21)       /* MSB/LSB format */
 109 #define CTL_DA_LRI              (1 << 22)       /* left/right indication */
 110 #define CTL_DA_SCE              (1 << 23)       /* sample clock edge */
 111 #define CTL_A_SEL_STV           (0 << 24)       /* TV tuner audio input */
 112 #define CTL_A_SEL_SFM           (1 << 24)       /* FM audio input */
 113 #define CTL_A_SEL_SML           (2 << 24)       /* mic/line audio input */
 114 #define CTL_A_SEL_SMXC          (3 << 24)       /* MUX bypass */
 115 #define CTL_A_SEL_SHIFT               24
 116 #define CTL_A_SEL_MASK          (3 << 24)
 117 #define CTL_A_PWRDN             (1 << 26)       /* analog audio power-down */
 118 #define CTL_A_G2X               (1 << 27)       /* audio gain boost */
 119 #define CTL_A_GAIN_SHIFT              28        /* audio input gain */
 120 #define CTL_A_GAIN_MASK         (0xf<<28)
 121
 122 /* RISC instruction opcodes */
 123 #define RISC_WRITE      (0x1 << 28)     /* write FIFO data to memory at address */
 124 #define RISC_WRITEC     (0x5 << 28)     /* write FIFO data to memory at current address */
 125 #define RISC_SKIP       (0x2 << 28)     /* skip FIFO data */
 126 #define RISC_JUMP       (0x7 << 28)     /* jump to address */
 127 #define RISC_SYNC       (0x8 << 28)     /* synchronize with FIFO */
 128
 129 /* RISC instruction bits */
 130 #define RISC_BYTES_ENABLE       (0xf << 12)     /* byte enable bits */
 131 #define RISC_RESYNC             (  1 << 15)     /* disable FDSR errors */
 132 #define RISC_SET_STATUS_SHIFT           16      /* set status bits */
 133 #define RISC_RESET_STATUS_SHIFT         20      /* clear status bits */
 134 #define RISC_IRQ                (  1 << 24)     /* interrupt */
 135 #define RISC_EOL                (  1 << 26)     /* end of line */
 136 #define RISC_SOL                (  1 << 27)     /* start of line */
 137
 138 /* SYNC status bits values */
 139 #define RISC_SYNC_FM1   0x6
 140 #define RISC_SYNC_VRO   0xc
 141
 142 #define ANALOG_CLOCK 1792000
 143 #ifdef CONFIG_SND_BT87X_OVERCLOCK
 144 #define CLOCK_DIV_MIN 1
 145 #else
 146 #define CLOCK_DIV_MIN 4
 147 #endif
 148 #define CLOCK_DIV_MAX 15
 149
 150 #define ERROR_INTERRUPTS (INT_FBUS | INT_FTRGT | INT_PPERR | \
 151                           INT_RIPERR | INT_PABORT | INT_OCERR)
 152 #define MY_INTERRUPTS (INT_RISCI | ERROR_INTERRUPTS)
 153
 154 /* SYNC, one WRITE per line, one extra WRITE per page boundary, SYNC, JUMP */
 155 #define MAX_RISC_SIZE ((1 + 255 + (PAGE_ALIGN(255 * 4092) / PAGE_SIZE - 1) + 1 + 1) * 8)
 156
 157 typedef struct snd_bt87x bt87x_t;
 158 struct snd_bt87x {
 159         snd_card_t *card;
 160         struct pci_dev *pci;
 161
 162         void *mmio;
 163         int irq;
 164
 165         int dig_rate;
 166
 167         spinlock_t reg_lock;
 168         long opened;
 169         snd_pcm_substream_t *substream;
 170
 171         struct snd_dma_buffer dma_risc;
 172         unsigned int line_bytes;
 173         unsigned int lines;
 174
 175         u32 reg_control;
 176         int current_line;
 177 };
 178
 179 enum { DEVICE_DIGITAL, DEVICE_ANALOG };
 180
 181 static inline u32 snd_bt87x_readl(bt87x_t *chip, u32 reg)
 182 {
 183         return readl(chip->mmio + reg);
 184 }
 185
 186 static inline void snd_bt87x_writel(bt87x_t *chip, u32 reg, u32 value)
 187 {
 188         writel(value, chip->mmio + reg);
 189 }
 190
 191 static int snd_bt87x_create_risc(bt87x_t *chip, snd_pcm_substream_t *substream,
 192                                  unsigned int periods, unsigned int period_bytes)
 193 {
 194         struct snd_sg_buf *sgbuf = snd_pcm_substream_sgbuf(substream);
 195         unsigned int i, offset;
 196         u32 *risc;
 197
 198         if (chip->dma_risc.area == NULL) {
 199                 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
 200                                         PAGE_ALIGN(MAX_RISC_SIZE), &chip->dma_risc) < 0)
 201                         return -ENOMEM;
 202         }
 203         risc = (u32 *)chip->dma_risc.area;
 204         offset = 0;
 205         *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_FM1);
 206         *risc++ = cpu_to_le32(0);
 207         for (i = 0; i < periods; ++i) {
 208                 u32 rest;
 209
 210                 rest = period_bytes;
 211                 do {
 212                         u32 cmd, len;
 213
 214                         len = PAGE_SIZE - (offset % PAGE_SIZE);
 215                         if (len > rest)
 216                                 len = rest;
 217                         cmd = RISC_WRITE | len;
 218                         if (rest == period_bytes) {
 219                                 u32 block = i * 16 / periods;
 220                                 cmd |= RISC_SOL;
 221                                 cmd |= block << RISC_SET_STATUS_SHIFT;
 222                                 cmd |= (~block & 0xf) << RISC_RESET_STATUS_SHIFT;
 223                         }
 224                         if (len == rest)
 225                                 cmd |= RISC_EOL | RISC_IRQ;
 226                         *risc++ = cpu_to_le32(cmd);
 227                         *risc++ = cpu_to_le32((u32)snd_pcm_sgbuf_get_addr(sgbuf, offset));
 228                         offset += len;
 229                         rest -= len;
 230                 } while (rest > 0);
 231         }
 232         *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_VRO);
 233         *risc++ = cpu_to_le32(0);
 234         *risc++ = cpu_to_le32(RISC_JUMP);
 235         *risc++ = cpu_to_le32(chip->dma_risc.addr);
 236         chip->line_bytes = period_bytes;
 237         chip->lines = periods;
 238         return 0;
 239 }
 240
 241 static void snd_bt87x_free_risc(bt87x_t *chip)
 242 {
 243         if (chip->dma_risc.area) {
 244                 snd_dma_free_pages(&chip->dma_risc);
 245                 chip->dma_risc.area = NULL;
 246         }
 247 }
 248
 249 static irqreturn_t snd_bt87x_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 250 {
 251         bt87x_t *chip = dev_id;
 252         unsigned int status;
 253
 254         status = snd_bt87x_readl(chip, REG_INT_STAT);
 255         if (!(status & MY_INTERRUPTS))
 256                 return IRQ_NONE;
 257         snd_bt87x_writel(chip, REG_INT_STAT, status & MY_INTERRUPTS);
 258
 259         if (status & ERROR_INTERRUPTS) {
 260                 if (status & (INT_FBUS | INT_FTRGT))
 261                         snd_printk(KERN_WARNING "FIFO overrun, status %#08x\n", status);
 262                 if (status & INT_OCERR)
 263                         snd_printk(KERN_ERR "internal RISC error, status %#08x\n", status);
 264                 if (status & (INT_PPERR | INT_RIPERR | INT_PABORT)) {
 265                         u16 pci_status;
 266                         pci_read_config_word(chip->pci, PCI_STATUS, &pci_status);
 267                         pci_write_config_word(chip->pci, PCI_STATUS, pci_status &
 268                                               (PCI_STATUS_PARITY | PCI_STATUS_SIG_TARGET_ABORT |
 269                                                PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_REC_MASTER_ABORT |
 270                                                PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_DETECTED_PARITY));
 271                         snd_printk(KERN_ERR "Aieee - PCI error! status %#08x, PCI status %#04x\n",
 272                                    status, pci_status);
 273                 }
 274         }
 275         if ((status & INT_RISCI) && (chip->reg_control & CTL_ACAP_EN)) {
 276                 int current_block, irq_block;
 277
 278                 /* assume that exactly one line has been recorded */
 279                 chip->current_line = (chip->current_line + 1) % chip->lines;
 280                 /* but check if some interrupts have been skipped */
 281                 current_block = chip->current_line * 16 / chip->lines;
 282                 irq_block = status >> INT_RISCS_SHIFT;
 283                 if (current_block != irq_block)
 284                         chip->current_line = (irq_block * chip->lines + 15) / 16;
 285
 286                 snd_pcm_period_elapsed(chip->substream);
 287         }
 288         return IRQ_HANDLED;
 289 }
 290
 291 static snd_pcm_hardware_t snd_bt87x_digital_hw = {
 292         .info = SNDRV_PCM_INFO_MMAP |
 293                 SNDRV_PCM_INFO_INTERLEAVED |
 294                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
 295                 SNDRV_PCM_INFO_MMAP_VALID,
 296         .formats = SNDRV_PCM_FMTBIT_S16_LE,
 297         .rates = 0, /* set at runtime */
 298         .channels_min = 2,
 299         .channels_max = 2,
 300         .buffer_bytes_max = 255 * 4092,
 301         .period_bytes_min = 32,
 302         .period_bytes_max = 4092,
 303         .periods_min = 2,
 304         .periods_max = 255,
 305 };
 306
 307 static snd_pcm_hardware_t snd_bt87x_analog_hw = {
 308         .info = SNDRV_PCM_INFO_MMAP |
 309                 SNDRV_PCM_INFO_INTERLEAVED |
 310                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
 311                 SNDRV_PCM_INFO_MMAP_VALID,
 312         .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
 313         .rates = SNDRV_PCM_RATE_KNOT,
 314         .rate_min = ANALOG_CLOCK / CLOCK_DIV_MAX,
 315         .rate_max = ANALOG_CLOCK / CLOCK_DIV_MIN,
 316         .channels_min = 1,
 317         .channels_max = 1,
 318         .buffer_bytes_max = 255 * 4092,
 319         .period_bytes_min = 32,
 320         .period_bytes_max = 4092,
 321         .periods_min = 2,
 322         .periods_max = 255,
 323 };
 324
 325 static int snd_bt87x_set_digital_hw(bt87x_t *chip, snd_pcm_runtime_t *runtime)
 326 {
 327         static struct {
 328                 int rate;
 329                 unsigned int bit;
 330         } ratebits[] = {
 331                 {8000, SNDRV_PCM_RATE_8000},
 332                 {11025, SNDRV_PCM_RATE_11025},
 333                 {16000, SNDRV_PCM_RATE_16000},
 334                 {22050, SNDRV_PCM_RATE_22050},
 335                 {32000, SNDRV_PCM_RATE_32000},
 336                 {44100, SNDRV_PCM_RATE_44100},
 337                 {48000, SNDRV_PCM_RATE_48000}
 338         };
 339         int i;
 340
 341         chip->reg_control |= CTL_DA_IOM_DA;
 342         runtime->hw = snd_bt87x_digital_hw;
 343         runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
 344         for (i = 0; i < ARRAY_SIZE(ratebits); ++i)
 345                 if (chip->dig_rate == ratebits[i].rate) {
 346                         runtime->hw.rates = ratebits[i].bit;
 347                         break;
 348                 }
 349         runtime->hw.rate_min = chip->dig_rate;
 350         runtime->hw.rate_max = chip->dig_rate;
 351         return 0;
 352 }
 353
 354 static int snd_bt87x_set_analog_hw(bt87x_t *chip, snd_pcm_runtime_t *runtime)
 355 {
 356         static ratnum_t analog_clock = {
 357                 .num = ANALOG_CLOCK,
 358                 .den_min = CLOCK_DIV_MIN,
 359                 .den_max = CLOCK_DIV_MAX,
 360                 .den_step = 1
 361         };
 362         static snd_pcm_hw_constraint_ratnums_t constraint_rates = {
 363                 .nrats = 1,
 364                 .rats = &analog_clock
 365         };
 366
 367         chip->reg_control &= ~CTL_DA_IOM_DA;
 368         runtime->hw = snd_bt87x_analog_hw;
 369         return snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
 370                                              &constraint_rates);
 371 }
 372
 373 static int snd_bt87x_pcm_open(snd_pcm_substream_t *substream)
 374 {
 375         bt87x_t *chip = snd_pcm_substream_chip(substream);
 376         snd_pcm_runtime_t *runtime = substream->runtime;
 377         int err;
 378
 379         if (test_and_set_bit(0, &chip->opened))
 380                 return -EBUSY;
 381
 382         if (substream->pcm->device == DEVICE_DIGITAL)
 383                 err = snd_bt87x_set_digital_hw(chip, runtime);
 384         else
 385                 err = snd_bt87x_set_analog_hw(chip, runtime);
 386         if (err < 0)
 387                 goto _error;
 388
 389         err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
 390         if (err < 0)
 391                 goto _error;
 392
 393         chip->substream = substream;
 394         return 0;
 395
 396 _error:
 397         clear_bit(0, &chip->opened);
 398         smp_mb__after_clear_bit();
 399         return err;
 400 }
 401
 402 static int snd_bt87x_close(snd_pcm_substream_t *substream)
 403 {
 404         bt87x_t *chip = snd_pcm_substream_chip(substream);
 405
 406         chip->substream = NULL;
 407         clear_bit(0, &chip->opened);
 408         smp_mb__after_clear_bit();
 409         return 0;
 410 }
 411
 412 static int snd_bt87x_hw_params(snd_pcm_substream_t *substream,
 413                                snd_pcm_hw_params_t *hw_params)
 414 {
 415         bt87x_t *chip = snd_pcm_substream_chip(substream);
 416         int err;
 417
 418         err = snd_pcm_lib_malloc_pages(substream,
 419                                        params_buffer_bytes(hw_params));
 420         if (err < 0)
 421                 return err;
 422         return snd_bt87x_create_risc(chip, substream,
 423                                      params_periods(hw_params),
 424                                      params_period_bytes(hw_params));
 425 }
 426
 427 static int snd_bt87x_hw_free(snd_pcm_substream_t *substream)
 428 {
 429         bt87x_t *chip = snd_pcm_substream_chip(substream);
 430
 431         snd_bt87x_free_risc(chip);
 432         snd_pcm_lib_free_pages(substream);
 433         return 0;
 434 }
 435
 436 static int snd_bt87x_prepare(snd_pcm_substream_t *substream)
 437 {
 438         bt87x_t *chip = snd_pcm_substream_chip(substream);
 439         snd_pcm_runtime_t *runtime = substream->runtime;
 440         int decimation;
 441
 442         spin_lock_irq(&chip->reg_lock);
 443         chip->reg_control &= ~(CTL_DA_SDR_MASK | CTL_DA_SBR);
 444         decimation = (ANALOG_CLOCK + runtime->rate / 4) / runtime->rate;
 445         chip->reg_control |= decimation << CTL_DA_SDR_SHIFT;
 446         if (runtime->format == SNDRV_PCM_FORMAT_S8)
 447                 chip->reg_control |= CTL_DA_SBR;
 448         snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
 449         spin_unlock_irq(&chip->reg_lock);
 450         return 0;
 451 }
 452
 453 static int snd_bt87x_start(bt87x_t *chip)
 454 {
 455         spin_lock(&chip->reg_lock);
 456         chip->current_line = 0;
 457         chip->reg_control |= CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN;
 458         snd_bt87x_writel(chip, REG_RISC_STRT_ADD, chip->dma_risc.addr);
 459         snd_bt87x_writel(chip, REG_PACKET_LEN,
 460                          chip->line_bytes | (chip->lines << 16));
 461         snd_bt87x_writel(chip, REG_INT_MASK, MY_INTERRUPTS);
 462         snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
 463         spin_unlock(&chip->reg_lock);
 464         return 0;
 465 }
 466
 467 static int snd_bt87x_stop(bt87x_t *chip)
 468 {
 469         spin_lock(&chip->reg_lock);
 470         chip->reg_control &= ~(CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN);
 471         snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
 472         snd_bt87x_writel(chip, REG_INT_MASK, 0);
 473         snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
 474         spin_unlock(&chip->reg_lock);
 475         return 0;
 476 }
 477
 478 static int snd_bt87x_trigger(snd_pcm_substream_t *substream, int cmd)
 479 {
 480         bt87x_t *chip = snd_pcm_substream_chip(substream);
 481
 482         switch (cmd) {
 483         case SNDRV_PCM_TRIGGER_START:
 484                 return snd_bt87x_start(chip);
 485         case SNDRV_PCM_TRIGGER_STOP:
 486                 return snd_bt87x_stop(chip);
 487         default:
 488                 return -EINVAL;
 489         }
 490 }
 491
 492 static snd_pcm_uframes_t snd_bt87x_pointer(snd_pcm_substream_t *substream)
 493 {
 494         bt87x_t *chip = snd_pcm_substream_chip(substream);
 495         snd_pcm_runtime_t *runtime = substream->runtime;
 496
 497         return (snd_pcm_uframes_t)bytes_to_frames(runtime, chip->current_line * chip->line_bytes);
 498 }
 499
 500 static snd_pcm_ops_t snd_bt87x_pcm_ops = {
 501         .open = snd_bt87x_pcm_open,
 502         .close = snd_bt87x_close,
 503         .ioctl = snd_pcm_lib_ioctl,
 504         .hw_params = snd_bt87x_hw_params,
 505         .hw_free = snd_bt87x_hw_free,
 506         .prepare = snd_bt87x_prepare,
 507         .trigger = snd_bt87x_trigger,
 508         .pointer = snd_bt87x_pointer,
 509         .page = snd_pcm_sgbuf_ops_page,
 510 };
 511
 512 static int snd_bt87x_capture_volume_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info)
 513 {
 514         info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
 515         info->count = 1;
 516         info->value.integer.min = 0;
 517         info->value.integer.max = 15;
 518         return 0;
 519 }
 520
 521 static int snd_bt87x_capture_volume_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
 522 {
 523         bt87x_t *chip = snd_kcontrol_chip(kcontrol);
 524
 525         value->value.integer.value[0] = (chip->reg_control & CTL_A_GAIN_MASK) >> CTL_A_GAIN_SHIFT;
 526         return 0;
 527 }
 528
 529 static int snd_bt87x_capture_volume_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
 530 {
 531         bt87x_t *chip = snd_kcontrol_chip(kcontrol);
 532         u32 old_control;
 533         int changed;
 534
 535         spin_lock_irq(&chip->reg_lock);
 536         old_control = chip->reg_control;
 537         chip->reg_control = (chip->reg_control & ~CTL_A_GAIN_MASK)
 538                 | (value->value.integer.value[0] << CTL_A_GAIN_SHIFT);
 539         snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
 540         changed = old_control != chip->reg_control;
 541         spin_unlock_irq(&chip->reg_lock);
 542         return changed;
 543 }
 544
 545 static snd_kcontrol_new_t snd_bt87x_capture_volume = {
 546         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
 547         .name = "Capture Volume",
 548         .info = snd_bt87x_capture_volume_info,
 549         .get = snd_bt87x_capture_volume_get,
 550         .put = snd_bt87x_capture_volume_put,
 551 };
 552
 553 static int snd_bt87x_capture_boost_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info)
 554 {
 555         info->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
 556         info->count = 1;
 557         info->value.integer.min = 0;
 558         info->value.integer.max = 1;
 559         return 0;
 560 }
 561
 562 static int snd_bt87x_capture_boost_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
 563 {
 564         bt87x_t *chip = snd_kcontrol_chip(kcontrol);
 565
 566         value->value.integer.value[0] = !! (chip->reg_control & CTL_A_G2X);
 567         return 0;
 568 }
 569
 570 static int snd_bt87x_capture_boost_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
 571 {
 572         bt87x_t *chip = snd_kcontrol_chip(kcontrol);
 573         u32 old_control;
 574         int changed;
 575
 576         spin_lock_irq(&chip->reg_lock);
 577         old_control = chip->reg_control;
 578         chip->reg_control = (chip->reg_control & ~CTL_A_G2X)
 579                 | (value->value.integer.value[0] ? CTL_A_G2X : 0);
 580         snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
 581         changed = chip->reg_control != old_control;
 582         spin_unlock_irq(&chip->reg_lock);
 583         return changed;
 584 }
 585
 586 static snd_kcontrol_new_t snd_bt87x_capture_boost = {
 587         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
 588         .name = "Capture Boost",
 589         .info = snd_bt87x_capture_boost_info,
 590         .get = snd_bt87x_capture_boost_get,
 591         .put = snd_bt87x_capture_boost_put,
 592 };
 593
 594 static int snd_bt87x_capture_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info)
 595 {
 596         static char *texts[3] = {"TV Tuner", "FM", "Mic/Line"};
 597
 598         info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
 599         info->count = 1;
 600         info->value.enumerated.items = 3;
 601         if (info->value.enumerated.item > 2)
 602                 info->value.enumerated.item = 2;
 603         strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
 604         return 0;
 605 }
 606
 607 static int snd_bt87x_capture_source_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
 608 {
 609         bt87x_t *chip = snd_kcontrol_chip(kcontrol);
 610
 611         value->value.enumerated.item[0] = (chip->reg_control & CTL_A_SEL_MASK) >> CTL_A_SEL_SHIFT;
 612         return 0;
 613 }
 614
 615 static int snd_bt87x_capture_source_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
 616 {
 617         bt87x_t *chip = snd_kcontrol_chip(kcontrol);
 618         u32 old_control;
 619         int changed;
 620
 621         spin_lock_irq(&chip->reg_lock);
 622         old_control = chip->reg_control;
 623         chip->reg_control = (chip->reg_control & ~CTL_A_SEL_MASK)
 624                 | (value->value.enumerated.item[0] << CTL_A_SEL_SHIFT);
 625         snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
 626         changed = chip->reg_control != old_control;
 627         spin_unlock_irq(&chip->reg_lock);
 628         return changed;
 629 }
 630
 631 static snd_kcontrol_new_t snd_bt87x_capture_source = {
 632         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
 633         .name = "Capture Source",
 634         .info = snd_bt87x_capture_source_info,
 635         .get = snd_bt87x_capture_source_get,
 636         .put = snd_bt87x_capture_source_put,
 637 };
 638
 639 static int snd_bt87x_free(bt87x_t *chip)
 640 {
 641         if (chip->mmio) {
 642                 snd_bt87x_stop(chip);
 643                 if (chip->irq >= 0)
 644                         synchronize_irq(chip->irq);
 645
 646                 iounmap(chip->mmio);
 647         }
 648         if (chip->irq >= 0)
 649                 free_irq(chip->irq, chip);
 650         pci_release_regions(chip->pci);
 651         pci_disable_device(chip->pci);
 652         kfree(chip);
 653         return 0;
 654 }
 655
 656 static int snd_bt87x_dev_free(snd_device_t *device)
 657 {
 658         bt87x_t *chip = device->device_data;
 659         return snd_bt87x_free(chip);
 660 }
 661
 662 static int __devinit snd_bt87x_pcm(bt87x_t *chip, int device, char *name)
 663 {
 664         int err;
 665         snd_pcm_t *pcm;
 666
 667         err = snd_pcm_new(chip->card, name, device, 0, 1, &pcm);
 668         if (err < 0)
 669                 return err;
 670         pcm->private_data = chip;
 671         strcpy(pcm->name, name);
 672         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_bt87x_pcm_ops);
 673         return snd_pcm_lib_preallocate_pages_for_all(pcm,
 674                                                      SNDRV_DMA_TYPE_DEV_SG,
 675                                                      snd_dma_pci_data(chip->pci),
 676                                                         128 * 1024,
 677                                                         (255 * 4092 + 1023) & ~1023);
 678 }
 679
 680 static int __devinit snd_bt87x_create(snd_card_t *card,
 681                                       struct pci_dev *pci,
 682                                       bt87x_t **rchip)
 683 {
 684         bt87x_t *chip;
 685         int err;
 686         static snd_device_ops_t ops = {
 687                 .dev_free = snd_bt87x_dev_free
 688         };
 689
 690         *rchip = NULL;
 691
 692         err = pci_enable_device(pci);
 693         if (err < 0)
 694                 return err;
 695
 696         chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
 697         if (!chip) {
 698                 pci_disable_device(pci);
 699                 return -ENOMEM;
 700         }
 701         chip->card = card;
 702         chip->pci = pci;
 703         chip->irq = -1;
 704         spin_lock_init(&chip->reg_lock);
 705
 706         if ((err = pci_request_regions(pci, "Bt87x audio")) < 0) {
 707                 kfree(chip);
 708                 pci_disable_device(pci);
 709                 return err;
 710         }
 711         chip->mmio = ioremap_nocache(pci_resource_start(pci, 0),
 712                                      pci_resource_len(pci, 0));
 713         if (!chip->mmio) {
 714                 snd_bt87x_free(chip);
 715                 snd_printk(KERN_ERR "cannot remap io memory\n");
 716                 return -ENOMEM;
 717         }
 718
 719         chip->reg_control = CTL_DA_ES2 | CTL_PKTP_16 | (15 << CTL_DA_SDR_SHIFT);
 720         snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
 721         snd_bt87x_writel(chip, REG_INT_MASK, 0);
 722         snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
 723
 724         if (request_irq(pci->irq, snd_bt87x_interrupt, SA_INTERRUPT | SA_SHIRQ,
 725                         "Bt87x audio", chip)) {
 726                 snd_bt87x_free(chip);
 727                 snd_printk(KERN_ERR "cannot grab irq\n");
 728                 return -EBUSY;
 729         }
 730         chip->irq = pci->irq;
 731         pci_set_master(pci);
 732         synchronize_irq(chip->irq);
 733
 734         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
 735         if (err < 0) {
 736                 snd_bt87x_free(chip);
 737                 return err;
 738         }
 739         snd_card_set_dev(card, &pci->dev);
 740         *rchip = chip;
 741         return 0;
 742 }
 743
 744 static int __devinit snd_bt87x_probe(struct pci_dev *pci,
 745                                      const struct pci_device_id *pci_id)
 746 {
 747         static int dev;
 748         snd_card_t *card;
 749         bt87x_t *chip;
 750         int err;
 751
 752         if (dev >= SNDRV_CARDS)
 753                 return -ENODEV;
 754         if (!enable[dev]) {
 755                 ++dev;
 756                 return -ENOENT;
 757         }
 758
 759         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
 760         if (!card)
 761                 return -ENOMEM;
 762
 763         err = snd_bt87x_create(card, pci, &chip);
 764         if (err < 0)
 765                 goto _error;
 766
 767         if (digital_rate[dev] > 0)
 768                 chip->dig_rate = digital_rate[dev];
 769         else
 770                 chip->dig_rate = (int)pci_id->driver_data;
 771
 772         err = snd_bt87x_pcm(chip, DEVICE_DIGITAL, "Bt87x Digital");
 773         if (err < 0)
 774                 goto _error;
 775         err = snd_bt87x_pcm(chip, DEVICE_ANALOG, "Bt87x Analog");
 776         if (err < 0)
 777                 goto _error;
 778
 779         err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_volume, chip));
 780         if (err < 0)
 781                 goto _error;
 782         err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_boost, chip));
 783         if (err < 0)
 784                 goto _error;
 785         err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_source, chip));
 786         if (err < 0)
 787                 goto _error;
 788
 789         strcpy(card->driver, "Bt87x");
 790         sprintf(card->shortname, "Brooktree Bt%x", pci->device);
 791         sprintf(card->longname, "%s at %#lx, irq %i",
 792                 card->shortname, pci_resource_start(pci, 0), chip->irq);
 793         strcpy(card->mixername, "Bt87x");
 794
 795         err = snd_card_register(card);
 796         if (err < 0)
 797                 goto _error;
 798
 799         pci_set_drvdata(pci, card);
 800         ++dev;
 801         return 0;
 802
 803 _error:
 804         snd_card_free(card);
 805         return err;
 806 }
 807
 808 static void __devexit snd_bt87x_remove(struct pci_dev *pci)
 809 {
 810         snd_card_free(pci_get_drvdata(pci));
 811         pci_set_drvdata(pci, NULL);
 812 }
 813
 814 #define BT_DEVICE(chip, subvend, subdev, rate) \
 815         { .vendor = PCI_VENDOR_ID_BROOKTREE, \
 816           .device = PCI_DEVICE_ID_BROOKTREE_##chip, \
 817           .subvendor = subvend, .subdevice = subdev, \
 818           .driver_data = rate }
 819
 820 /* driver_data is the default digital_rate value for that device */
 821 static struct pci_device_id snd_bt87x_ids[] = {
 822         BT_DEVICE(878, 0x0070, 0xff01, 44100), /* Osprey 200 */
 823
 824         /* default entries for 32kHz and generic Bt87x cards */
 825         BT_DEVICE(878, PCI_ANY_ID, PCI_ANY_ID, 32000),
 826         BT_DEVICE(879, PCI_ANY_ID, PCI_ANY_ID, 32000),
 827         { }
 828 };
 829 MODULE_DEVICE_TABLE(pci, snd_bt87x_ids);
 830
 831 static struct pci_driver driver = {
 832         .name = "Bt87x",
 833         .id_table = snd_bt87x_ids,
 834         .probe = snd_bt87x_probe,
 835         .remove = __devexit_p(snd_bt87x_remove),
 836 };
 837
 838 static int __init alsa_card_bt87x_init(void)
 839 {
 840         return pci_module_init(&driver);
 841 }
 842
 843 static void __exit alsa_card_bt87x_exit(void)
 844 {
 845         pci_unregister_driver(&driver);
 846 }
 847
 848 module_init(alsa_card_bt87x_init)
 849 module_exit(alsa_card_bt87x_exit)