sound/pci/cs46xx/dsp_spos.c

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify
   3  *   it under the terms of the GNU General Public License as published by
   4  *   the Free Software Foundation; either version 2 of the License, or
   5  *   (at your option) any later version.
   6  *
   7  *   This program is distributed in the hope that it will be useful,
   8  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  *   GNU General Public License for more details.
  11  *
  12  *   You should have received a copy of the GNU General Public License
  13  *   along with this program; if not, write to the Free Software
  14  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  15  *
  16  */
  17
  18 /*
  19  * 2002-07 Benny Sjostrand benny@hostmobility.com
  20  */
  21
  22
  23 #include <sound/driver.h>
  24 #include <asm/io.h>
  25 #include <linux/delay.h>
  26 #include <linux/pci.h>
  27 #include <linux/pm.h>
  28 #include <linux/init.h>
  29 #include <linux/slab.h>
  30 #include <linux/vmalloc.h>
  31 #include <sound/core.h>
  32 #include <sound/control.h>
  33 #include <sound/info.h>
  34 #include <sound/asoundef.h>
  35 #include <sound/cs46xx.h>
  36
  37 #include "cs46xx_lib.h"
  38 #include "dsp_spos.h"
  39
  40 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
  41                                   struct dsp_scb_descriptor * fg_entry);
  42
  43 static enum wide_opcode wide_opcodes[] = {
  44         WIDE_FOR_BEGIN_LOOP,
  45         WIDE_FOR_BEGIN_LOOP2,
  46         WIDE_COND_GOTO_ADDR,
  47         WIDE_COND_GOTO_CALL,
  48         WIDE_TBEQ_COND_GOTO_ADDR,
  49         WIDE_TBEQ_COND_CALL_ADDR,
  50         WIDE_TBEQ_NCOND_GOTO_ADDR,
  51         WIDE_TBEQ_NCOND_CALL_ADDR,
  52         WIDE_TBEQ_COND_GOTO1_ADDR,
  53         WIDE_TBEQ_COND_CALL1_ADDR,
  54         WIDE_TBEQ_NCOND_GOTOI_ADDR,
  55         WIDE_TBEQ_NCOND_CALL1_ADDR
  56 };
  57
  58 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size,
  59                                        u32 overlay_begin_address)
  60 {
  61         unsigned int i = 0, j, nreallocated = 0;
  62         u32 hival,loval,address;
  63         u32 mop_operands,mop_type,wide_op;
  64         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
  65
  66         snd_assert( ((size % 2) == 0), return -EINVAL);
  67
  68         while (i < size) {
  69                 loval = data[i++];
  70                 hival = data[i++];
  71
  72                 if (ins->code.offset > 0) {
  73                         mop_operands = (hival >> 6) & 0x03fff;
  74                         mop_type = mop_operands >> 10;
  75
  76                         /* check for wide type instruction */
  77                         if (mop_type == 0 &&
  78                             (mop_operands & WIDE_LADD_INSTR_MASK) == 0 &&
  79                             (mop_operands & WIDE_INSTR_MASK) != 0) {
  80                                 wide_op = loval & 0x7f;
  81                                 for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) {
  82                                         if (wide_opcodes[j] == wide_op) {
  83                                                 /* need to reallocate instruction */
  84                                                 address  = (hival & 0x00FFF) << 5;
  85                                                 address |=  loval >> 15;
  86
  87                                                 snd_printdd("handle_wideop[1]: %05x:%05x addr %04x\n",hival,loval,address);
  88
  89                                                 if ( !(address & 0x8000) ) {
  90                                                         address += (ins->code.offset / 2) - overlay_begin_address;
  91                                                 } else {
  92                                                         snd_printdd("handle_wideop[1]: ROM symbol not reallocated\n");
  93                                                 }
  94
  95                                                 hival &= 0xFF000;
  96                                                 loval &= 0x07FFF;
  97
  98                                                 hival |= ( (address >> 5)  & 0x00FFF);
  99                                                 loval |= ( (address << 15) & 0xF8000);
 100
 101                                                 address  = (hival & 0x00FFF) << 5;
 102                                                 address |=  loval >> 15;
 103
 104                                                 snd_printdd("handle_wideop:[2] %05x:%05x addr %04x\n",hival,loval,address);
 105                                                 nreallocated ++;
 106                                         } /* wide_opcodes[j] == wide_op */
 107                                 } /* for */
 108                         } /* mod_type == 0 ... */
 109                 } /* ins->code.offset > 0 */
 110
 111                 ins->code.data[ins->code.size++] = loval;
 112                 ins->code.data[ins->code.size++] = hival;
 113         }
 114
 115         snd_printdd("dsp_spos: %d instructions reallocated\n",nreallocated);
 116         return nreallocated;
 117 }
 118
 119 static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type)
 120 {
 121         int i;
 122         for (i = 0;i < module->nsegments; ++i) {
 123                 if (module->segments[i].segment_type == seg_type) {
 124                         return (module->segments + i);
 125                 }
 126         }
 127
 128         return NULL;
 129 };
 130
 131 static int find_free_symbol_index (struct dsp_spos_instance * ins)
 132 {
 133         int index = ins->symbol_table.nsymbols,i;
 134
 135         for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) {
 136                 if (ins->symbol_table.symbols[i].deleted) {
 137                         index = i;
 138                         break;
 139                 }
 140         }
 141
 142         return index;
 143 }
 144
 145 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 146 {
 147         int i;
 148         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 149
 150         if (module->symbol_table.nsymbols > 0) {
 151                 if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") &&
 152                     module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) {
 153                         module->overlay_begin_address = module->symbol_table.symbols[0].address;
 154                 }
 155         }
 156
 157         for (i = 0;i < module->symbol_table.nsymbols; ++i) {
 158                 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 159                         snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
 160                         return -ENOMEM;
 161                 }
 162
 163
 164                 if (cs46xx_dsp_lookup_symbol(chip,
 165                                              module->symbol_table.symbols[i].symbol_name,
 166                                              module->symbol_table.symbols[i].symbol_type) == NULL) {
 167
 168                         ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i];
 169                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address);
 170                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module;
 171                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0;
 172
 173                         if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index)
 174                                 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;
 175
 176                         ins->symbol_table.nsymbols++;
 177                 } else {
 178           /* if (0) printk ("dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n",
 179                              module->symbol_table.symbols[i].symbol_name); */
 180                 }
 181         }
 182
 183         return 0;
 184 }
 185
 186 static struct dsp_symbol_entry *
 187 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type)
 188 {
 189         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 190         struct dsp_symbol_entry * symbol = NULL;
 191         int index;
 192
 193         if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 194                 snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
 195                 return NULL;
 196         }
 197
 198         if (cs46xx_dsp_lookup_symbol(chip,
 199                                      symbol_name,
 200                                      type) != NULL) {
 201                 snd_printk(KERN_ERR "dsp_spos: symbol <%s> duplicated\n", symbol_name);
 202                 return NULL;
 203         }
 204
 205         index = find_free_symbol_index (ins);
 206
 207         strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name);
 208         ins->symbol_table.symbols[index].address = address;
 209         ins->symbol_table.symbols[index].symbol_type = type;
 210         ins->symbol_table.symbols[index].module = NULL;
 211         ins->symbol_table.symbols[index].deleted = 0;
 212         symbol = (ins->symbol_table.symbols + index);
 213
 214         if (index > ins->symbol_table.highest_frag_index)
 215                 ins->symbol_table.highest_frag_index = index;
 216
 217         if (index == ins->symbol_table.nsymbols)
 218                 ins->symbol_table.nsymbols++; /* no frag. in list */
 219
 220         return symbol;
 221 }
 222
 223 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip)
 224 {
 225         struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL);
 226
 227         if (ins == NULL)
 228                 return NULL;
 229
 230         /* better to use vmalloc for this big table */
 231         ins->symbol_table.nsymbols = 0;
 232         ins->symbol_table.symbols = vmalloc(sizeof(struct dsp_symbol_entry) *
 233                                             DSP_MAX_SYMBOLS);
 234         ins->symbol_table.highest_frag_index = 0;
 235
 236         if (ins->symbol_table.symbols == NULL) {
 237                 cs46xx_dsp_spos_destroy(chip);
 238                 goto error;
 239         }
 240
 241         ins->code.offset = 0;
 242         ins->code.size = 0;
 243         ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL);
 244
 245         if (ins->code.data == NULL) {
 246                 cs46xx_dsp_spos_destroy(chip);
 247                 goto error;
 248         }
 249
 250         ins->nscb = 0;
 251         ins->ntask = 0;
 252
 253         ins->nmodules = 0;
 254         ins->modules = kmalloc(sizeof(struct dsp_module_desc) * DSP_MAX_MODULES, GFP_KERNEL);
 255
 256         if (ins->modules == NULL) {
 257                 cs46xx_dsp_spos_destroy(chip);
 258                 goto error;
 259         }
 260
 261         /* default SPDIF input sample rate
 262            to 48000 khz */
 263         ins->spdif_in_sample_rate = 48000;
 264
 265         /* maximize volume */
 266         ins->dac_volume_right = 0x8000;
 267         ins->dac_volume_left = 0x8000;
 268         ins->spdif_input_volume_right = 0x8000;
 269         ins->spdif_input_volume_left = 0x8000;
 270
 271         /* set left and right validity bits and
 272            default channel status */
 273         ins->spdif_csuv_default =
 274                 ins->spdif_csuv_stream =
 275          /* byte 0 */  ((unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF        & 0xff)) << 24) |
 276          /* byte 1 */  ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) |
 277          /* byte 3 */   (unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) |
 278          /* left and right validity bits */ (1 << 13) | (1 << 12);
 279
 280         return ins;
 281
 282 error:
 283         kfree(ins);
 284         return NULL;
 285 }
 286
 287 void  cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip)
 288 {
 289         int i;
 290         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 291
 292         snd_assert(ins != NULL, return);
 293
 294         down(&chip->spos_mutex);
 295         for (i = 0; i < ins->nscb; ++i) {
 296                 if (ins->scbs[i].deleted) continue;
 297
 298                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 299         }
 300
 301         kfree(ins->code.data);
 302         vfree(ins->symbol_table.symbols);
 303         kfree(ins->modules);
 304         kfree(ins);
 305         up(&chip->spos_mutex);
 306 }
 307
 308 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 309 {
 310         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 311         struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM);
 312         struct dsp_segment_desc * parameter = get_segment_desc (module,SEGTYPE_SP_PARAMETER);
 313         struct dsp_segment_desc * sample = get_segment_desc (module,SEGTYPE_SP_SAMPLE);
 314         u32 doffset, dsize;
 315
 316         if (ins->nmodules == DSP_MAX_MODULES - 1) {
 317                 snd_printk(KERN_ERR "dsp_spos: to many modules loaded into DSP\n");
 318                 return -ENOMEM;
 319         }
 320
 321         snd_printdd("dsp_spos: loading module %s into DSP\n", module->module_name);
 322
 323         if (ins->nmodules == 0) {
 324                 snd_printdd("dsp_spos: clearing parameter area\n");
 325                 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE);
 326         }
 327
 328         if (parameter == NULL) {
 329                 snd_printdd("dsp_spos: module got no parameter segment\n");
 330         } else {
 331                 if (ins->nmodules > 0) {
 332                         snd_printk(KERN_WARNING "dsp_spos: WARNING current parameter data may be overwriten!\n");
 333                 }
 334
 335                 doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET);
 336                 dsize   = parameter->size * 4;
 337
 338                 snd_printdd("dsp_spos: downloading parameter data to chip (%08x-%08x)\n",
 339                             doffset,doffset + dsize);
 340
 341                 if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) {
 342                         snd_printk(KERN_ERR "dsp_spos: failed to download parameter data to DSP\n");
 343                         return -EINVAL;
 344                 }
 345         }
 346
 347         if (ins->nmodules == 0) {
 348                 snd_printdd("dsp_spos: clearing sample area\n");
 349                 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE);
 350         }
 351
 352         if (sample == NULL) {
 353                 snd_printdd("dsp_spos: module got no sample segment\n");
 354         } else {
 355                 if (ins->nmodules > 0) {
 356                         snd_printk(KERN_WARNING "dsp_spos: WARNING current sample data may be overwriten\n");
 357                 }
 358
 359                 doffset = (sample->offset * 4  + DSP_SAMPLE_BYTE_OFFSET);
 360                 dsize   =  sample->size * 4;
 361
 362                 snd_printdd("dsp_spos: downloading sample data to chip (%08x-%08x)\n",
 363                             doffset,doffset + dsize);
 364
 365                 if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) {
 366                         snd_printk(KERN_ERR "dsp_spos: failed to sample data to DSP\n");
 367                         return -EINVAL;
 368                 }
 369         }
 370
 371
 372         if (ins->nmodules == 0) {
 373                 snd_printdd("dsp_spos: clearing code area\n");
 374                 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
 375         }
 376
 377         if (code == NULL) {
 378                 snd_printdd("dsp_spos: module got no code segment\n");
 379         } else {
 380                 if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) {
 381                         snd_printk(KERN_ERR "dsp_spos: no space available in DSP\n");
 382                         return -ENOMEM;
 383                 }
 384
 385                 module->load_address = ins->code.offset;
 386                 module->overlay_begin_address = 0x000;
 387
 388                 /* if module has a code segment it must have
 389                    symbol table */
 390                 snd_assert(module->symbol_table.symbols != NULL ,return -ENOMEM);
 391                 if (add_symbols(chip,module)) {
 392                         snd_printk(KERN_ERR "dsp_spos: failed to load symbol table\n");
 393                         return -ENOMEM;
 394                 }
 395
 396                 doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET);
 397                 dsize   = code->size * 4;
 398                 snd_printdd("dsp_spos: downloading code to chip (%08x-%08x)\n",
 399                             doffset,doffset + dsize);
 400
 401                 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address);
 402
 403                 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) {
 404                         snd_printk(KERN_ERR "dsp_spos: failed to download code to DSP\n");
 405                         return -EINVAL;
 406                 }
 407
 408                 ins->code.offset += code->size;
 409         }
 410
 411         /* NOTE: module segments and symbol table must be
 412            statically allocated. Case that module data is
 413            not generated by the ospparser */
 414         ins->modules[ins->nmodules] = *module;
 415         ins->nmodules++;
 416
 417         return 0;
 418 }
 419
 420 struct dsp_symbol_entry *
 421 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type)
 422 {
 423         int i;
 424         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 425
 426         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 427
 428                 if (ins->symbol_table.symbols[i].deleted)
 429                         continue;
 430
 431                 if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) &&
 432                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 433                         return (ins->symbol_table.symbols + i);
 434                 }
 435         }
 436
 437 #if 0
 438         printk ("dsp_spos: symbol <%s> type %02x not found\n",
 439                 symbol_name,symbol_type);
 440 #endif
 441
 442         return NULL;
 443 }
 444
 445
 446 #ifdef CONFIG_PROC_FS
 447 static struct dsp_symbol_entry *
 448 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type)
 449 {
 450         int i;
 451         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 452
 453         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 454
 455                 if (ins->symbol_table.symbols[i].deleted)
 456                         continue;
 457
 458                 if (ins->symbol_table.symbols[i].address == address &&
 459                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 460                         return (ins->symbol_table.symbols + i);
 461                 }
 462         }
 463
 464
 465         return NULL;
 466 }
 467
 468
 469 static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry,
 470                                                struct snd_info_buffer *buffer)
 471 {
 472         struct snd_cs46xx *chip = entry->private_data;
 473         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 474         int i;
 475
 476         snd_iprintf(buffer, "SYMBOLS:\n");
 477         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 478                 char *module_str = "system";
 479
 480                 if (ins->symbol_table.symbols[i].deleted)
 481                         continue;
 482
 483                 if (ins->symbol_table.symbols[i].module != NULL) {
 484                         module_str = ins->symbol_table.symbols[i].module->module_name;
 485                 }
 486
 487
 488                 snd_iprintf(buffer, "%04X <%02X> %s [%s]\n",
 489                             ins->symbol_table.symbols[i].address,
 490                             ins->symbol_table.symbols[i].symbol_type,
 491                             ins->symbol_table.symbols[i].symbol_name,
 492                             module_str);
 493         }
 494 }
 495
 496
 497 static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry,
 498                                           struct snd_info_buffer *buffer)
 499 {
 500         struct snd_cs46xx *chip = entry->private_data;
 501         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 502         int i,j;
 503
 504         down(&chip->spos_mutex);
 505         snd_iprintf(buffer, "MODULES:\n");
 506         for ( i = 0; i < ins->nmodules; ++i ) {
 507                 snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name);
 508                 snd_iprintf(buffer, "   %d symbols\n", ins->modules[i].symbol_table.nsymbols);
 509                 snd_iprintf(buffer, "   %d fixups\n", ins->modules[i].nfixups);
 510
 511                 for (j = 0; j < ins->modules[i].nsegments; ++ j) {
 512                         struct dsp_segment_desc * desc = (ins->modules[i].segments + j);
 513                         snd_iprintf(buffer, "   segment %02x offset %08x size %08x\n",
 514                                     desc->segment_type,desc->offset, desc->size);
 515                 }
 516         }
 517         up(&chip->spos_mutex);
 518 }
 519
 520 static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry,
 521                                             struct snd_info_buffer *buffer)
 522 {
 523         struct snd_cs46xx *chip = entry->private_data;
 524         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 525         int i, j, col;
 526         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 527
 528         down(&chip->spos_mutex);
 529         snd_iprintf(buffer, "TASK TREES:\n");
 530         for ( i = 0; i < ins->ntask; ++i) {
 531                 snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name);
 532
 533                 for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) {
 534                         u32 val;
 535                         if (col == 4) {
 536                                 snd_iprintf(buffer,"\n");
 537                                 col = 0;
 538                         }
 539                         val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32));
 540                         snd_iprintf(buffer,"%08x ",val);
 541                 }
 542         }
 543
 544         snd_iprintf(buffer,"\n");
 545         up(&chip->spos_mutex);
 546 }
 547
 548 static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry,
 549                                       struct snd_info_buffer *buffer)
 550 {
 551         struct snd_cs46xx *chip = entry->private_data;
 552         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 553         int i;
 554
 555         down(&chip->spos_mutex);
 556         snd_iprintf(buffer, "SCB's:\n");
 557         for ( i = 0; i < ins->nscb; ++i) {
 558                 if (ins->scbs[i].deleted)
 559                         continue;
 560                 snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name);
 561
 562                 if (ins->scbs[i].parent_scb_ptr != NULL) {
 563                         snd_iprintf(buffer,"parent [%s:%04x] ",
 564                                     ins->scbs[i].parent_scb_ptr->scb_name,
 565                                     ins->scbs[i].parent_scb_ptr->address);
 566                 } else snd_iprintf(buffer,"parent [none] ");
 567
 568                 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x]  task_entry [%s:%04x]\n",
 569                             ins->scbs[i].sub_list_ptr->scb_name,
 570                             ins->scbs[i].sub_list_ptr->address,
 571                             ins->scbs[i].next_scb_ptr->scb_name,
 572                             ins->scbs[i].next_scb_ptr->address,
 573                             ins->scbs[i].task_entry->symbol_name,
 574                             ins->scbs[i].task_entry->address);
 575         }
 576
 577         snd_iprintf(buffer,"\n");
 578         up(&chip->spos_mutex);
 579 }
 580
 581 static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry,
 582                                                  struct snd_info_buffer *buffer)
 583 {
 584         struct snd_cs46xx *chip = entry->private_data;
 585         /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */
 586         unsigned int i, col = 0;
 587         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 588         struct dsp_symbol_entry * symbol;
 589
 590         for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) {
 591                 if (col == 4) {
 592                         snd_iprintf(buffer,"\n");
 593                         col = 0;
 594                 }
 595
 596                 if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) {
 597                         col = 0;
 598                         snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name);
 599                 }
 600
 601                 if (col == 0) {
 602                         snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32));
 603                 }
 604
 605                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 606         }
 607 }
 608
 609 static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry,
 610                                               struct snd_info_buffer *buffer)
 611 {
 612         struct snd_cs46xx *chip = entry->private_data;
 613         int i,col = 0;
 614         void __iomem *dst = chip->region.idx[2].remap_addr;
 615
 616         snd_iprintf(buffer,"PCMREADER:\n");
 617         for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) {
 618                 if (col == 4) {
 619                         snd_iprintf(buffer,"\n");
 620                         col = 0;
 621                 }
 622
 623                 if (col == 0) {
 624                         snd_iprintf(buffer, "%04X ",i);
 625                 }
 626
 627                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 628         }
 629
 630         snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n");
 631
 632         col = 0;
 633         for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) {
 634                 if (col == 4) {
 635                         snd_iprintf(buffer,"\n");
 636                         col = 0;
 637                 }
 638
 639                 if (col == 0) {
 640                         snd_iprintf(buffer, "%04X ",i);
 641                 }
 642
 643                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 644         }
 645
 646         snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n");
 647         col = 0;
 648         for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) {
 649                 if (col == 4) {
 650                         snd_iprintf(buffer,"\n");
 651                         col = 0;
 652                 }
 653
 654                 if (col == 0) {
 655                         snd_iprintf(buffer, "%04X ",i);
 656                 }
 657
 658                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 659         }
 660
 661
 662         snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n");
 663         col = 0;
 664         for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) {
 665                 if (col == 4) {
 666                         snd_iprintf(buffer,"\n");
 667                         col = 0;
 668                 }
 669
 670                 if (col == 0) {
 671                         snd_iprintf(buffer, "%04X ",i);
 672                 }
 673
 674                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 675         }
 676
 677         snd_iprintf(buffer,"\n...\n");
 678         col = 0;
 679
 680         for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) {
 681                 if (col == 4) {
 682                         snd_iprintf(buffer,"\n");
 683                         col = 0;
 684                 }
 685
 686                 if (col == 0) {
 687                         snd_iprintf(buffer, "%04X ",i);
 688                 }
 689
 690                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 691         }
 692
 693
 694         snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n");
 695         col = 0;
 696         for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) {
 697                 if (col == 4) {
 698                         snd_iprintf(buffer,"\n");
 699                         col = 0;
 700                 }
 701
 702                 if (col == 0) {
 703                         snd_iprintf(buffer, "%04X ",i);
 704                 }
 705
 706                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 707         }
 708
 709         snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n");
 710         col = 0;
 711         for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) {
 712                 if (col == 4) {
 713                         snd_iprintf(buffer,"\n");
 714                         col = 0;
 715                 }
 716
 717                 if (col == 0) {
 718                         snd_iprintf(buffer, "%04X ",i);
 719                 }
 720
 721                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 722         }
 723 #if 0
 724         snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n");
 725         col = 0;
 726         for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) {
 727                 if (col == 4) {
 728                         snd_iprintf(buffer,"\n");
 729                         col = 0;
 730                 }
 731
 732                 if (col == 0) {
 733                         snd_iprintf(buffer, "%04X ",i);
 734                 }
 735
 736                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 737         }
 738 #endif
 739
 740         snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n");
 741         col = 0;
 742         for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) {
 743                 if (col == 4) {
 744                         snd_iprintf(buffer,"\n");
 745                         col = 0;
 746                 }
 747
 748                 if (col == 0) {
 749                         snd_iprintf(buffer, "%04X ",i);
 750                 }
 751
 752                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 753         }
 754         snd_iprintf(buffer,"\n");
 755 }
 756
 757 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip)
 758 {
 759         struct snd_info_entry *entry;
 760         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 761         int i;
 762
 763         ins->snd_card = card;
 764
 765         if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) {
 766                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 767                 entry->mode = S_IFDIR | S_IRUGO | S_IXUGO;
 768                 entry->c.text.read_size = 512;
 769
 770                 if (snd_info_register(entry) < 0) {
 771                         snd_info_free_entry(entry);
 772                         entry = NULL;
 773                 }
 774         }
 775
 776         ins->proc_dsp_dir = entry;
 777
 778         if (!ins->proc_dsp_dir)
 779                 return -ENOMEM;
 780
 781         if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) {
 782                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 783                 entry->private_data = chip;
 784                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 785                 entry->c.text.read_size = 512;
 786                 entry->c.text.read = cs46xx_dsp_proc_symbol_table_read;
 787                 if (snd_info_register(entry) < 0) {
 788                         snd_info_free_entry(entry);
 789                         entry = NULL;
 790                 }
 791         }
 792         ins->proc_sym_info_entry = entry;
 793
 794         if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) {
 795                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 796                 entry->private_data = chip;
 797                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 798                 entry->c.text.read_size = 512;
 799                 entry->c.text.read = cs46xx_dsp_proc_modules_read;
 800                 if (snd_info_register(entry) < 0) {
 801                         snd_info_free_entry(entry);
 802                         entry = NULL;
 803                 }
 804         }
 805         ins->proc_modules_info_entry = entry;
 806
 807         if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) {
 808                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 809                 entry->private_data = chip;
 810                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 811                 entry->c.text.read_size = 512;
 812                 entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read;
 813                 if (snd_info_register(entry) < 0) {
 814                         snd_info_free_entry(entry);
 815                         entry = NULL;
 816                 }
 817         }
 818         ins->proc_parameter_dump_info_entry = entry;
 819
 820         if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) {
 821                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 822                 entry->private_data = chip;
 823                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 824                 entry->c.text.read_size = 512;
 825                 entry->c.text.read = cs46xx_dsp_proc_sample_dump_read;
 826                 if (snd_info_register(entry) < 0) {
 827                         snd_info_free_entry(entry);
 828                         entry = NULL;
 829                 }
 830         }
 831         ins->proc_sample_dump_info_entry = entry;
 832
 833         if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) {
 834                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 835                 entry->private_data = chip;
 836                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 837                 entry->c.text.read_size = 512;
 838                 entry->c.text.read = cs46xx_dsp_proc_task_tree_read;
 839                 if (snd_info_register(entry) < 0) {
 840                         snd_info_free_entry(entry);
 841                         entry = NULL;
 842                 }
 843         }
 844         ins->proc_task_info_entry = entry;
 845
 846         if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) {
 847                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 848                 entry->private_data = chip;
 849                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 850                 entry->c.text.read_size = 1024;
 851                 entry->c.text.read = cs46xx_dsp_proc_scb_read;
 852                 if (snd_info_register(entry) < 0) {
 853                         snd_info_free_entry(entry);
 854                         entry = NULL;
 855                 }
 856         }
 857         ins->proc_scb_info_entry = entry;
 858
 859         down(&chip->spos_mutex);
 860         /* register/update SCB's entries on proc */
 861         for (i = 0; i < ins->nscb; ++i) {
 862                 if (ins->scbs[i].deleted) continue;
 863
 864                 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i));
 865         }
 866         up(&chip->spos_mutex);
 867
 868         return 0;
 869 }
 870
 871 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip)
 872 {
 873         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 874         int i;
 875
 876         if (ins->proc_sym_info_entry) {
 877                 snd_info_unregister(ins->proc_sym_info_entry);
 878                 ins->proc_sym_info_entry = NULL;
 879         }
 880
 881         if (ins->proc_modules_info_entry) {
 882                 snd_info_unregister(ins->proc_modules_info_entry);
 883                 ins->proc_modules_info_entry = NULL;
 884         }
 885
 886         if (ins->proc_parameter_dump_info_entry) {
 887                 snd_info_unregister(ins->proc_parameter_dump_info_entry);
 888                 ins->proc_parameter_dump_info_entry = NULL;
 889         }
 890
 891         if (ins->proc_sample_dump_info_entry) {
 892                 snd_info_unregister(ins->proc_sample_dump_info_entry);
 893                 ins->proc_sample_dump_info_entry = NULL;
 894         }
 895
 896         if (ins->proc_scb_info_entry) {
 897                 snd_info_unregister(ins->proc_scb_info_entry);
 898                 ins->proc_scb_info_entry = NULL;
 899         }
 900
 901         if (ins->proc_task_info_entry) {
 902                 snd_info_unregister(ins->proc_task_info_entry);
 903                 ins->proc_task_info_entry = NULL;
 904         }
 905
 906         down(&chip->spos_mutex);
 907         for (i = 0; i < ins->nscb; ++i) {
 908                 if (ins->scbs[i].deleted) continue;
 909                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 910         }
 911         up(&chip->spos_mutex);
 912
 913         if (ins->proc_dsp_dir) {
 914                 snd_info_unregister (ins->proc_dsp_dir);
 915                 ins->proc_dsp_dir = NULL;
 916         }
 917
 918         return 0;
 919 }
 920 #endif /* CONFIG_PROC_FS */
 921
 922 static int debug_tree;
 923 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data,
 924                                    u32  dest, int size)
 925 {
 926         void __iomem *spdst = chip->region.idx[1].remap_addr +
 927                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 928         int i;
 929
 930         for (i = 0; i < size; ++i) {
 931                 if (debug_tree) printk ("addr %p, val %08x\n",spdst,task_data[i]);
 932                 writel(task_data[i],spdst);
 933                 spdst += sizeof(u32);
 934         }
 935 }
 936
 937 static int debug_scb;
 938 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest)
 939 {
 940         void __iomem *spdst = chip->region.idx[1].remap_addr +
 941                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 942         int i;
 943
 944         for (i = 0; i < 0x10; ++i) {
 945                 if (debug_scb) printk ("addr %p, val %08x\n",spdst,scb_data[i]);
 946                 writel(scb_data[i],spdst);
 947                 spdst += sizeof(u32);
 948         }
 949 }
 950
 951 static int find_free_scb_index (struct dsp_spos_instance * ins)
 952 {
 953         int index = ins->nscb, i;
 954
 955         for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) {
 956                 if (ins->scbs[i].deleted) {
 957                         index = i;
 958                         break;
 959                 }
 960         }
 961
 962         return index;
 963 }
 964
 965 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest)
 966 {
 967         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 968         struct dsp_scb_descriptor * desc = NULL;
 969         int index;
 970
 971         if (ins->nscb == DSP_MAX_SCB_DESC - 1) {
 972                 snd_printk(KERN_ERR "dsp_spos: got no place for other SCB\n");
 973                 return NULL;
 974         }
 975
 976         index = find_free_scb_index (ins);
 977
 978         strcpy(ins->scbs[index].scb_name, name);
 979         ins->scbs[index].address = dest;
 980         ins->scbs[index].index = index;
 981         ins->scbs[index].proc_info = NULL;
 982         ins->scbs[index].ref_count = 1;
 983         ins->scbs[index].deleted = 0;
 984         spin_lock_init(&ins->scbs[index].lock);
 985
 986         desc = (ins->scbs + index);
 987         ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER);
 988
 989         if (index > ins->scb_highest_frag_index)
 990                 ins->scb_highest_frag_index = index;
 991
 992         if (index == ins->nscb)
 993                 ins->nscb++;
 994
 995         return desc;
 996 }
 997
 998 static struct dsp_task_descriptor *
 999 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size)
1000 {
1001         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1002         struct dsp_task_descriptor * desc = NULL;
1003
1004         if (ins->ntask == DSP_MAX_TASK_DESC - 1) {
1005                 snd_printk(KERN_ERR "dsp_spos: got no place for other TASK\n");
1006                 return NULL;
1007         }
1008
1009         strcpy(ins->tasks[ins->ntask].task_name,name);
1010         ins->tasks[ins->ntask].address = dest;
1011         ins->tasks[ins->ntask].size = size;
1012
1013         /* quick find in list */
1014         ins->tasks[ins->ntask].index = ins->ntask;
1015         desc = (ins->tasks + ins->ntask);
1016         ins->ntask++;
1017
1018         add_symbol (chip,name,dest,SYMBOL_PARAMETER);
1019         return desc;
1020 }
1021
1022 struct dsp_scb_descriptor *
1023 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest)
1024 {
1025         struct dsp_scb_descriptor * desc;
1026
1027         desc = _map_scb (chip,name,dest);
1028         if (desc) {
1029                 _dsp_create_scb(chip,scb_data,dest);
1030         } else {
1031                 snd_printk(KERN_ERR "dsp_spos: failed to map SCB\n");
1032         }
1033
1034         return desc;
1035 }
1036
1037
1038 static struct dsp_task_descriptor *
1039 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data,
1040                              u32 dest, int size)
1041 {
1042         struct dsp_task_descriptor * desc;
1043
1044         desc = _map_task_tree (chip,name,dest,size);
1045         if (desc) {
1046                 _dsp_create_task_tree(chip,task_data,dest,size);
1047         } else {
1048                 snd_printk(KERN_ERR "dsp_spos: failed to map TASK\n");
1049         }
1050
1051         return desc;
1052 }
1053
1054 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip)
1055 {
1056         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1057         struct dsp_symbol_entry * fg_task_tree_header_code;
1058         struct dsp_symbol_entry * task_tree_header_code;
1059         struct dsp_symbol_entry * task_tree_thread;
1060         struct dsp_symbol_entry * null_algorithm;
1061         struct dsp_symbol_entry * magic_snoop_task;
1062
1063         struct dsp_scb_descriptor * timing_master_scb;
1064         struct dsp_scb_descriptor * codec_out_scb;
1065         struct dsp_scb_descriptor * codec_in_scb;
1066         struct dsp_scb_descriptor * src_task_scb;
1067         struct dsp_scb_descriptor * master_mix_scb;
1068         struct dsp_scb_descriptor * rear_mix_scb;
1069         struct dsp_scb_descriptor * record_mix_scb;
1070         struct dsp_scb_descriptor * write_back_scb;
1071         struct dsp_scb_descriptor * vari_decimate_scb;
1072         struct dsp_scb_descriptor * rear_codec_out_scb;
1073         struct dsp_scb_descriptor * clfe_codec_out_scb;
1074         struct dsp_scb_descriptor * magic_snoop_scb;
1075
1076         int fifo_addr, fifo_span, valid_slots;
1077
1078         static struct dsp_spos_control_block sposcb = {
1079                 /* 0 */ HFG_TREE_SCB,HFG_STACK,
1080                 /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,
1081                 /* 2 */ DSP_SPOS_DC,0,
1082                 /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC,
1083                 /* 4 */ 0,0,
1084                 /* 5 */ DSP_SPOS_UU,0,
1085                 /* 6 */ FG_TASK_HEADER_ADDR,0,
1086                 /* 7 */ 0,0,
1087                 /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC,
1088                 /* 9 */ 0,
1089                 /* A */ 0,HFG_FIRST_EXECUTE_MODE,
1090                 /* B */ DSP_SPOS_UU,DSP_SPOS_UU,
1091                 /* C */ DSP_SPOS_DC_DC,
1092                 /* D */ DSP_SPOS_DC_DC,
1093                 /* E */ DSP_SPOS_DC_DC,
1094                 /* F */ DSP_SPOS_DC_DC
1095         };
1096
1097         cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10);
1098
1099         null_algorithm  = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE);
1100         if (null_algorithm == NULL) {
1101                 snd_printk(KERN_ERR "dsp_spos: symbol NULLALGORITHM not found\n");
1102                 return -EIO;
1103         }
1104
1105         fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE);
1106         if (fg_task_tree_header_code == NULL) {
1107                 snd_printk(KERN_ERR "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n");
1108                 return -EIO;
1109         }
1110
1111         task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE);
1112         if (task_tree_header_code == NULL) {
1113                 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREEHEADERCODE not found\n");
1114                 return -EIO;
1115         }
1116
1117         task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE);
1118         if (task_tree_thread == NULL) {
1119                 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREETHREAD not found\n");
1120                 return -EIO;
1121         }
1122
1123         magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE);
1124         if (magic_snoop_task == NULL) {
1125                 snd_printk(KERN_ERR "dsp_spos: symbol MAGICSNOOPTASK not found\n");
1126                 return -EIO;
1127         }
1128
1129         {
1130                 /* create the null SCB */
1131                 static struct dsp_generic_scb null_scb = {
1132                         { 0, 0, 0, 0 },
1133                         { 0, 0, 0, 0, 0 },
1134                         NULL_SCB_ADDR, NULL_SCB_ADDR,
1135                         0, 0, 0, 0, 0,
1136                         {
1137                                 0,0,
1138                                 0,0,
1139                         }
1140                 };
1141
1142                 null_scb.entry_point = null_algorithm->address;
1143                 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR);
1144                 ins->the_null_scb->task_entry = null_algorithm;
1145                 ins->the_null_scb->sub_list_ptr = ins->the_null_scb;
1146                 ins->the_null_scb->next_scb_ptr = ins->the_null_scb;
1147                 ins->the_null_scb->parent_scb_ptr = NULL;
1148                 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb);
1149         }
1150
1151         {
1152                 /* setup foreground task tree */
1153                 static struct dsp_task_tree_control_block fg_task_tree_hdr =  {
1154                         { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10),
1155                           DSP_SPOS_DC_DC,
1156                           DSP_SPOS_DC_DC,
1157                           0x0000,DSP_SPOS_DC,
1158                           DSP_SPOS_DC, DSP_SPOS_DC,
1159                           DSP_SPOS_DC_DC,
1160                           DSP_SPOS_DC_DC,
1161                           DSP_SPOS_DC_DC,
1162                           DSP_SPOS_DC,DSP_SPOS_DC },
1163
1164                         {
1165                                 BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR,
1166                                 0,
1167                                 FG_TASK_HEADER_ADDR + TCBData,
1168                         },
1169
1170                         {
1171                                 4,0,
1172                                 1,0,
1173                                 2,SPOSCB_ADDR + HFGFlags,
1174                                 0,0,
1175                                 FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK
1176                         },
1177
1178                         {
1179                                 DSP_SPOS_DC,0,
1180                                 DSP_SPOS_DC,DSP_SPOS_DC,
1181                                 DSP_SPOS_DC,DSP_SPOS_DC,
1182                                 DSP_SPOS_DC,DSP_SPOS_DC,
1183                                 DSP_SPOS_DC,DSP_SPOS_DC,
1184                                 DSP_SPOS_DCDC,
1185                                 DSP_SPOS_UU,1,
1186                                 DSP_SPOS_DCDC,
1187                                 DSP_SPOS_DCDC,
1188                                 DSP_SPOS_DCDC,
1189                                 DSP_SPOS_DCDC,
1190                                 DSP_SPOS_DCDC,
1191                                 DSP_SPOS_DCDC,
1192                                 DSP_SPOS_DCDC,
1193                                 DSP_SPOS_DCDC,
1194                                 DSP_SPOS_DCDC,
1195                                 DSP_SPOS_DCDC,
1196                                 DSP_SPOS_DCDC,
1197                                 DSP_SPOS_DCDC,
1198                                 DSP_SPOS_DCDC,
1199                                 DSP_SPOS_DCDC,
1200                                 DSP_SPOS_DCDC,
1201                                 DSP_SPOS_DCDC,
1202                                 DSP_SPOS_DCDC,
1203                                 DSP_SPOS_DCDC,
1204                                 DSP_SPOS_DCDC,
1205                                 DSP_SPOS_DCDC,
1206                                 DSP_SPOS_DCDC,
1207                                 DSP_SPOS_DCDC,
1208                                 DSP_SPOS_DCDC,
1209                                 DSP_SPOS_DCDC,
1210                                 DSP_SPOS_DCDC,
1211                                 DSP_SPOS_DCDC,
1212                                 DSP_SPOS_DCDC,
1213                                 DSP_SPOS_DCDC
1214                         },
1215                         {
1216                                 FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1217                                 0,0
1218                         }
1219                 };
1220
1221                 fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address;
1222                 fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1223                 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35);
1224         }
1225
1226
1227         {
1228                 /* setup foreground task tree */
1229                 static struct dsp_task_tree_control_block bg_task_tree_hdr =  {
1230                         { DSP_SPOS_DC_DC,
1231                           DSP_SPOS_DC_DC,
1232                           DSP_SPOS_DC_DC,
1233                           DSP_SPOS_DC, DSP_SPOS_DC,
1234                           DSP_SPOS_DC, DSP_SPOS_DC,
1235                           DSP_SPOS_DC_DC,
1236                           DSP_SPOS_DC_DC,
1237                           DSP_SPOS_DC_DC,
1238                           DSP_SPOS_DC,DSP_SPOS_DC },
1239
1240                         {
1241                                 NULL_SCB_ADDR,NULL_SCB_ADDR,  /* Set up the background to do nothing */
1242                                 0,
1243                                 BG_TREE_SCB_ADDR + TCBData,
1244                         },
1245
1246                         {
1247                                 9999,0,
1248                                 0,1,
1249                                 0,SPOSCB_ADDR + HFGFlags,
1250                                 0,0,
1251                                 BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK
1252                         },
1253
1254                         {
1255                                 DSP_SPOS_DC,0,
1256                                 DSP_SPOS_DC,DSP_SPOS_DC,
1257                                 DSP_SPOS_DC,DSP_SPOS_DC,
1258                                 DSP_SPOS_DC,DSP_SPOS_DC,
1259                                 DSP_SPOS_DC,DSP_SPOS_DC,
1260                                 DSP_SPOS_DCDC,
1261                                 DSP_SPOS_UU,1,
1262                                 DSP_SPOS_DCDC,
1263                                 DSP_SPOS_DCDC,
1264                                 DSP_SPOS_DCDC,
1265                                 DSP_SPOS_DCDC,
1266                                 DSP_SPOS_DCDC,
1267                                 DSP_SPOS_DCDC,
1268                                 DSP_SPOS_DCDC,
1269                                 DSP_SPOS_DCDC,
1270                                 DSP_SPOS_DCDC,
1271                                 DSP_SPOS_DCDC,
1272                                 DSP_SPOS_DCDC,
1273                                 DSP_SPOS_DCDC,
1274                                 DSP_SPOS_DCDC,
1275                                 DSP_SPOS_DCDC,
1276                                 DSP_SPOS_DCDC,
1277                                 DSP_SPOS_DCDC,
1278                                 DSP_SPOS_DCDC,
1279                                 DSP_SPOS_DCDC,
1280                                 DSP_SPOS_DCDC,
1281                                 DSP_SPOS_DCDC,
1282                                 DSP_SPOS_DCDC,
1283                                 DSP_SPOS_DCDC,
1284                                 DSP_SPOS_DCDC,
1285                                 DSP_SPOS_DCDC,
1286                                 DSP_SPOS_DCDC,
1287                                 DSP_SPOS_DCDC,
1288                                 DSP_SPOS_DCDC,
1289                                 DSP_SPOS_DCDC
1290                         },
1291                         {
1292                                 BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1293                                 0,0
1294                         }
1295                 };
1296
1297                 bg_task_tree_hdr.links.entry_point = task_tree_header_code->address;
1298                 bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1299                 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35);
1300         }
1301
1302         /* create timing master SCB */
1303         timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip);
1304
1305         /* create the CODEC output task */
1306         codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000,
1307                                                         MASTERMIX_SCB_ADDR,
1308                                                         CODECOUT_SCB_ADDR,timing_master_scb,
1309                                                         SCB_ON_PARENT_SUBLIST_SCB);
1310
1311         if (!codec_out_scb) goto _fail_end;
1312         /* create the master mix SCB */
1313         master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB",
1314                                                         MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR,
1315                                                         codec_out_scb,
1316                                                         SCB_ON_PARENT_SUBLIST_SCB);
1317         ins->master_mix_scb = master_mix_scb;
1318
1319         if (!master_mix_scb) goto _fail_end;
1320
1321         /* create codec in */
1322         codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0,
1323                                                       CODEC_INPUT_BUF1,
1324                                                       CODECIN_SCB_ADDR,codec_out_scb,
1325                                                       SCB_ON_PARENT_NEXT_SCB);
1326         if (!codec_in_scb) goto _fail_end;
1327         ins->codec_in_scb = codec_in_scb;
1328
1329         /* create write back scb */
1330         write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB",
1331                                                               WRITE_BACK_BUF1,WRITE_BACK_SPB,
1332                                                               WRITEBACK_SCB_ADDR,
1333                                                               timing_master_scb,
1334                                                               SCB_ON_PARENT_NEXT_SCB);
1335         if (!write_back_scb) goto _fail_end;
1336
1337         {
1338                 static struct dsp_mix2_ostream_spb mix2_ostream_spb = {
1339                         0x00020000,
1340                         0x0000ffff
1341                 };
1342
1343                 /* dirty hack ... */
1344                 _dsp_create_task_tree (chip,(u32 *)&mix2_ostream_spb,WRITE_BACK_SPB,2);
1345         }
1346
1347         /* input sample converter */
1348         vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB",
1349                                                                 VARI_DECIMATE_BUF0,
1350                                                                 VARI_DECIMATE_BUF1,
1351                                                                 VARIDECIMATE_SCB_ADDR,
1352                                                                 write_back_scb,
1353                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1354         if (!vari_decimate_scb) goto _fail_end;
1355
1356         /* create the record mixer SCB */
1357         record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB",
1358                                                         MIX_SAMPLE_BUF2,
1359                                                         RECORD_MIXER_SCB_ADDR,
1360                                                         vari_decimate_scb,
1361                                                         SCB_ON_PARENT_SUBLIST_SCB);
1362         ins->record_mixer_scb = record_mix_scb;
1363
1364         if (!record_mix_scb) goto _fail_end;
1365
1366         valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV);
1367
1368         snd_assert (chip->nr_ac97_codecs == 1 || chip->nr_ac97_codecs == 2);
1369
1370         if (chip->nr_ac97_codecs == 1) {
1371                 /* output on slot 5 and 11
1372                    on primary CODEC */
1373                 fifo_addr = 0x20;
1374                 fifo_span = 0x60;
1375
1376                 /* enable slot 5 and 11 */
1377                 valid_slots |= ACOSV_SLV5 | ACOSV_SLV11;
1378         } else {
1379                 /* output on slot 7 and 8
1380                    on secondary CODEC */
1381                 fifo_addr = 0x40;
1382                 fifo_span = 0x10;
1383
1384                 /* enable slot 7 and 8 */
1385                 valid_slots |= ACOSV_SLV7 | ACOSV_SLV8;
1386         }
1387         /* create CODEC tasklet for rear speakers output*/
1388         rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr,
1389                                                              REAR_MIXER_SCB_ADDR,
1390                                                              REAR_CODECOUT_SCB_ADDR,codec_in_scb,
1391                                                              SCB_ON_PARENT_NEXT_SCB);
1392         if (!rear_codec_out_scb) goto _fail_end;
1393
1394
1395         /* create the rear PCM channel  mixer SCB */
1396         rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB",
1397                                                       MIX_SAMPLE_BUF3,
1398                                                       REAR_MIXER_SCB_ADDR,
1399                                                       rear_codec_out_scb,
1400                                                       SCB_ON_PARENT_SUBLIST_SCB);
1401         ins->rear_mix_scb = rear_mix_scb;
1402         if (!rear_mix_scb) goto _fail_end;
1403
1404         if (chip->nr_ac97_codecs == 2) {
1405                 /* create CODEC tasklet for rear Center/LFE output
1406                    slot 6 and 9 on seconadry CODEC */
1407                 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030,
1408                                                                      CLFE_MIXER_SCB_ADDR,
1409                                                                      CLFE_CODEC_SCB_ADDR,
1410                                                                      rear_codec_out_scb,
1411                                                                      SCB_ON_PARENT_NEXT_SCB);
1412                 if (!clfe_codec_out_scb) goto _fail_end;
1413
1414
1415                 /* create the rear PCM channel  mixer SCB */
1416                 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB",
1417                                                                          MIX_SAMPLE_BUF4,
1418                                                                          CLFE_MIXER_SCB_ADDR,
1419                                                                          clfe_codec_out_scb,
1420                                                                          SCB_ON_PARENT_SUBLIST_SCB);
1421                 if (!ins->center_lfe_mix_scb) goto _fail_end;
1422
1423                 /* enable slot 6 and 9 */
1424                 valid_slots |= ACOSV_SLV6 | ACOSV_SLV9;
1425         } else {
1426                 clfe_codec_out_scb = rear_codec_out_scb;
1427                 ins->center_lfe_mix_scb = rear_mix_scb;
1428         }
1429
1430         /* enable slots depending on CODEC configuration */
1431         snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots);
1432
1433         /* the magic snooper */
1434         magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR,
1435                                                              OUTPUT_SNOOP_BUFFER,
1436                                                              codec_out_scb,
1437                                                              clfe_codec_out_scb,
1438                                                              SCB_ON_PARENT_NEXT_SCB);
1439
1440
1441         if (!magic_snoop_scb) goto _fail_end;
1442         ins->ref_snoop_scb = magic_snoop_scb;
1443
1444         /* SP IO access */
1445         if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR,
1446                                               magic_snoop_scb,
1447                                               SCB_ON_PARENT_NEXT_SCB))
1448                 goto _fail_end;
1449
1450         /* SPDIF input sampel rate converter */
1451         src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI",
1452                                                       ins->spdif_in_sample_rate,
1453                                                       SRC_OUTPUT_BUF1,
1454                                                       SRC_DELAY_BUF1,SRCTASK_SCB_ADDR,
1455                                                       master_mix_scb,
1456                                                       SCB_ON_PARENT_SUBLIST_SCB,1);
1457
1458         if (!src_task_scb) goto _fail_end;
1459         cs46xx_src_unlink(chip,src_task_scb);
1460
1461         /* NOTE: when we now how to detect the SPDIF input
1462            sample rate we will use this SRC to adjust it */
1463         ins->spdif_in_src = src_task_scb;
1464
1465         cs46xx_dsp_async_init(chip,timing_master_scb);
1466         return 0;
1467
1468  _fail_end:
1469         snd_printk(KERN_ERR "dsp_spos: failed to setup SCB's in DSP\n");
1470         return -EINVAL;
1471 }
1472
1473 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
1474                                   struct dsp_scb_descriptor * fg_entry)
1475 {
1476         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1477         struct dsp_symbol_entry * s16_async_codec_input_task;
1478         struct dsp_symbol_entry * spdifo_task;
1479         struct dsp_symbol_entry * spdifi_task;
1480         struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc;
1481
1482         s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE);
1483         if (s16_async_codec_input_task == NULL) {
1484                 snd_printk(KERN_ERR "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n");
1485                 return -EIO;
1486         }
1487         spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE);
1488         if (spdifo_task == NULL) {
1489                 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFOTASK not found\n");
1490                 return -EIO;
1491         }
1492
1493         spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE);
1494         if (spdifi_task == NULL) {
1495                 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFITASK not found\n");
1496                 return -EIO;
1497         }
1498
1499         {
1500                 /* 0xBC0 */
1501                 struct dsp_spdifoscb spdifo_scb = {
1502                         /* 0 */ DSP_SPOS_UUUU,
1503                         {
1504                                 /* 1 */ 0xb0,
1505                                 /* 2 */ 0,
1506                                 /* 3 */ 0,
1507                                 /* 4 */ 0,
1508                         },
1509                         /* NOTE: the SPDIF output task read samples in mono
1510                            format, the AsynchFGTxSCB task writes to buffer
1511                            in stereo format
1512                         */
1513                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256,
1514                         /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 )  |  0xFFFC,
1515                         /* 7 */ 0,0,
1516                         /* 8 */ 0,
1517                         /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR,
1518                         /* A */ spdifo_task->address,
1519                         SPDIFO_SCB_INST + SPDIFOFIFOPointer,
1520                         {
1521                                 /* B */ 0x0040, /*DSP_SPOS_UUUU,*/
1522                                 /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/
1523                         },
1524                         /* D */ 0x804c,0,                                                         /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */
1525                         /* E */ 0x0108,0x0001,                                    /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */
1526                         /* F */ DSP_SPOS_UUUU                                     /* SPDIFOFree; */
1527                 };
1528
1529                 /* 0xBB0 */
1530                 struct dsp_spdifiscb spdifi_scb = {
1531                         /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI,
1532                         /* 1 */ 0,
1533                         /* 2 */ 0,
1534                         /* 3 */ 1,4000,        /* SPDIFICountLimit SPDIFICount */
1535                         /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */
1536                         /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */
1537                         /* 6 */ DSP_SPOS_UUUU,  /* Free3 */
1538                         /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC,  /* Free2 BitCount*/
1539                         /* 8 */ DSP_SPOS_UUUU,  /* TempStatus */
1540                         /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR,
1541                         /* A */ spdifi_task->address,
1542                         SPDIFI_SCB_INST + SPDIFIFIFOPointer,
1543                         /* NOTE: The SPDIF input task write the sample in mono
1544                            format from the HW FIFO, the AsynchFGRxSCB task  reads
1545                            them in stereo
1546                         */
1547                         /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128,
1548                         /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1549                         /* D */ 0x8048,0,
1550                         /* E */ 0x01f0,0x0001,
1551                         /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */
1552                 };
1553
1554                 /* 0xBA0 */
1555                 struct dsp_async_codec_input_scb async_codec_input_scb = {
1556                         /* 0 */ DSP_SPOS_UUUU,
1557                         /* 1 */ 0,
1558                         /* 2 */ 0,
1559                         /* 3 */ 1,4000,
1560                         /* 4 */ 0x0118,0x0001,
1561                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64,
1562                         /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1563                         /* 7 */ DSP_SPOS_UU,0x3,
1564                         /* 8 */ DSP_SPOS_UUUU,
1565                         /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR,
1566                         /* A */ s16_async_codec_input_task->address,
1567                         HFG_TREE_SCB + AsyncCIOFIFOPointer,
1568
1569                         /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
1570                         /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10),  /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/
1571
1572 #ifdef UseASER1Input
1573                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1574                            Init. 0000:8042: for ASER1
1575                            0000:8044: for ASER2 */
1576                         /* D */ 0x8042,0,
1577
1578                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1579                            Init 1 stero:8050 ASER1
1580                            Init 0  mono:8070 ASER2
1581                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1582                         /* E */ 0x0100,0x0001,
1583
1584 #endif
1585
1586 #ifdef UseASER2Input
1587                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1588                            Init. 0000:8042: for ASER1
1589                            0000:8044: for ASER2 */
1590                         /* D */ 0x8044,0,
1591
1592                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1593                            Init 1 stero:8050 ASER1
1594                            Init 0  mono:8070 ASER2
1595                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1596                         /* E */ 0x0110,0x0001,
1597
1598 #endif
1599
1600                         /* short AsyncCIOutputBufModulo:AsyncCIFree;
1601                            AsyncCIOutputBufModulo: The modulo size for
1602                            the output buffer of this task */
1603                         /* F */ 0, /* DSP_SPOS_UUUU */
1604                 };
1605
1606                 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST);
1607
1608                 snd_assert(spdifo_scb_desc, return -EIO);
1609                 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST);
1610                 snd_assert(spdifi_scb_desc, return -EIO);
1611                 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB);
1612                 snd_assert(async_codec_scb_desc, return -EIO);
1613
1614                 async_codec_scb_desc->parent_scb_ptr = NULL;
1615                 async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc;
1616                 async_codec_scb_desc->sub_list_ptr = ins->the_null_scb;
1617                 async_codec_scb_desc->task_entry = s16_async_codec_input_task;
1618
1619                 spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc;
1620                 spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc;
1621                 spdifi_scb_desc->sub_list_ptr = ins->the_null_scb;
1622                 spdifi_scb_desc->task_entry = spdifi_task;
1623
1624                 spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc;
1625                 spdifo_scb_desc->next_scb_ptr = fg_entry;
1626                 spdifo_scb_desc->sub_list_ptr = ins->the_null_scb;
1627                 spdifo_scb_desc->task_entry = spdifo_task;
1628
1629                 /* this one is faked, as the parnet of SPDIFO task
1630                    is the FG task tree */
1631                 fg_entry->parent_scb_ptr = spdifo_scb_desc;
1632
1633                 /* for proc fs */
1634                 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc);
1635                 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc);
1636                 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc);
1637
1638                 /* Async MASTER ENABLE, affects both SPDIF input and output */
1639                 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 );
1640         }
1641
1642         return 0;
1643 }
1644
1645
1646 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip)
1647 {
1648         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1649
1650         /* set SPDIF output FIFO slot */
1651         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0);
1652
1653         /* SPDIF output MASTER ENABLE */
1654         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0);
1655
1656         /* right and left validate bit */
1657         /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/
1658         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0);
1659
1660         /* clear fifo pointer */
1661         cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);
1662
1663         /* monitor state */
1664         ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED;
1665 }
1666
1667 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip)
1668 {
1669         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1670
1671         /* if hw-ctrl already enabled, turn off to reset logic ... */
1672         cs46xx_dsp_disable_spdif_hw (chip);
1673         udelay(50);
1674
1675         /* set SPDIF output FIFO slot */
1676         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) ));
1677
1678         /* SPDIF output MASTER ENABLE */
1679         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000);
1680
1681         /* right and left validate bit */
1682         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);
1683
1684         /* monitor state */
1685         ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED;
1686
1687         return 0;
1688 }
1689
1690 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip)
1691 {
1692         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1693
1694         /* turn on amplifier */
1695         chip->active_ctrl(chip, 1);
1696         chip->amplifier_ctrl(chip, 1);
1697
1698         snd_assert (ins->asynch_rx_scb == NULL,return -EINVAL);
1699         snd_assert (ins->spdif_in_src != NULL,return -EINVAL);
1700
1701         down(&chip->spos_mutex);
1702
1703         if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) {
1704                 /* time countdown enable */
1705                 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005);
1706                 /* NOTE: 80000005 value is just magic. With all values
1707                    that I've tested this one seem to give the best result.
1708                    Got no explication why. (Benny) */
1709
1710                 /* SPDIF input MASTER ENABLE */
1711                 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff);
1712
1713                 ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED;
1714         }
1715
1716         /* create and start the asynchronous receiver SCB */
1717         ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB",
1718                                                                 ASYNCRX_SCB_ADDR,
1719                                                                 SPDIFI_SCB_INST,
1720                                                                 SPDIFI_IP_OUTPUT_BUFFER1,
1721                                                                 ins->spdif_in_src,
1722                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1723
1724         spin_lock_irq(&chip->reg_lock);
1725
1726         /* reset SPDIF input sample buffer pointer */
1727         /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2,
1728           (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/
1729
1730         /* reset FIFO ptr */
1731         /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/
1732         cs46xx_src_link(chip,ins->spdif_in_src);
1733
1734         /* unmute SRC volume */
1735         cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff);
1736
1737         spin_unlock_irq(&chip->reg_lock);
1738
1739         /* set SPDIF input sample rate and unmute
1740            NOTE: only 48khz support for SPDIF input this time */
1741         /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */
1742
1743         /* monitor state */
1744         ins->spdif_status_in = 1;
1745         up(&chip->spos_mutex);
1746
1747         return 0;
1748 }
1749
1750 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip)
1751 {
1752         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1753
1754         snd_assert (ins->asynch_rx_scb != NULL, return -EINVAL);
1755         snd_assert (ins->spdif_in_src != NULL,return -EINVAL);
1756
1757         down(&chip->spos_mutex);
1758
1759         /* Remove the asynchronous receiver SCB */
1760         cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb);
1761         ins->asynch_rx_scb = NULL;
1762
1763         cs46xx_src_unlink(chip,ins->spdif_in_src);
1764
1765         /* monitor state */
1766         ins->spdif_status_in = 0;
1767         up(&chip->spos_mutex);
1768
1769         /* restore amplifier */
1770         chip->active_ctrl(chip, -1);
1771         chip->amplifier_ctrl(chip, -1);
1772
1773         return 0;
1774 }
1775
1776 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip)
1777 {
1778         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1779
1780         snd_assert (ins->pcm_input == NULL,return -EINVAL);
1781         snd_assert (ins->ref_snoop_scb != NULL,return -EINVAL);
1782
1783         down(&chip->spos_mutex);
1784         ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR,
1785                                                   "PCMSerialInput_Wave");
1786         up(&chip->spos_mutex);
1787
1788         return 0;
1789 }
1790
1791 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip)
1792 {
1793         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1794
1795         snd_assert (ins->pcm_input != NULL,return -EINVAL);
1796
1797         down(&chip->spos_mutex);
1798         cs46xx_dsp_remove_scb (chip,ins->pcm_input);
1799         ins->pcm_input = NULL;
1800         up(&chip->spos_mutex);
1801
1802         return 0;
1803 }
1804
1805 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip)
1806 {
1807         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1808
1809         snd_assert (ins->adc_input == NULL,return -EINVAL);
1810         snd_assert (ins->codec_in_scb != NULL,return -EINVAL);
1811
1812         down(&chip->spos_mutex);
1813         ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR,
1814                                                   "PCMSerialInput_ADC");
1815         up(&chip->spos_mutex);
1816
1817         return 0;
1818 }
1819
1820 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip)
1821 {
1822         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1823
1824         snd_assert (ins->adc_input != NULL,return -EINVAL);
1825
1826         down(&chip->spos_mutex);
1827         cs46xx_dsp_remove_scb (chip,ins->adc_input);
1828         ins->adc_input = NULL;
1829         up(&chip->spos_mutex);
1830
1831         return 0;
1832 }
1833
1834 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data)
1835 {
1836         u32 temp;
1837         int  i;
1838
1839         /* santiy check the parameters.  (These numbers are not 100% correct.  They are
1840            a rough guess from looking at the controller spec.) */
1841         if (address < 0x8000 || address >= 0x9000)
1842                 return -EINVAL;
1843
1844         /* initialize the SP_IO_WRITE SCB with the data. */
1845         temp = ( address << 16 ) | ( address & 0x0000FFFF);   /* offset 0 <-- address2 : address1 */
1846
1847         snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR      << 2), temp);
1848         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */
1849         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */
1850
1851         /* Poke this location to tell the task to start */
1852         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10);
1853
1854         /* Verify that the task ran */
1855         for (i=0; i<25; i++) {
1856                 udelay(125);
1857
1858                 temp =  snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2));
1859                 if (temp == 0x00000000)
1860                         break;
1861         }
1862
1863         if (i == 25) {
1864                 snd_printk(KERN_ERR "dsp_spos: SPIOWriteTask not responding\n");
1865                 return -EBUSY;
1866         }
1867
1868         return 0;
1869 }
1870
1871 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1872 {
1873         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1874         struct dsp_scb_descriptor * scb;
1875
1876         down(&chip->spos_mutex);
1877
1878         /* main output */
1879         scb = ins->master_mix_scb->sub_list_ptr;
1880         while (scb != ins->the_null_scb) {
1881                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1882                 scb = scb->next_scb_ptr;
1883         }
1884
1885         /* rear output */
1886         scb = ins->rear_mix_scb->sub_list_ptr;
1887         while (scb != ins->the_null_scb) {
1888                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1889                 scb = scb->next_scb_ptr;
1890         }
1891
1892         ins->dac_volume_left = left;
1893         ins->dac_volume_right = right;
1894
1895         up(&chip->spos_mutex);
1896
1897         return 0;
1898 }
1899
1900 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1901 {
1902         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1903
1904         down(&chip->spos_mutex);
1905
1906         if (ins->asynch_rx_scb != NULL)
1907                 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb,
1908                                            left,right);
1909
1910         ins->spdif_input_volume_left = left;
1911         ins->spdif_input_volume_right = right;
1912
1913         up(&chip->spos_mutex);
1914
1915         return 0;
1916 }