2 * Driver for Ensoniq ES1370/ES1371 AudioPCI soundcard
3 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>,
4 * Thomas Sailer <sailer@ife.ee.ethz.ch>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <sound/driver.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/init.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
29 #include <linux/gameport.h>
30 #include <sound/core.h>
31 #include <sound/control.h>
32 #include <sound/pcm.h>
33 #include <sound/rawmidi.h>
35 #include <sound/ac97_codec.h>
37 #include <sound/ak4531_codec.h>
40 #include <sound/initval.h>
41 #include <sound/asoundef.h>
43 #define chip_t ensoniq_t
51 #define DRIVER_NAME "ENS1370"
53 #define DRIVER_NAME "ENS1371"
57 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>, Thomas Sailer <sailer@ife.ee.ethz.ch>");
58 MODULE_LICENSE("GPL");
59 MODULE_CLASSES("{sound}");
61 MODULE_DESCRIPTION("Ensoniq AudioPCI ES1370");
62 MODULE_DEVICES("{{Ensoniq,AudioPCI-97 ES1370},"
63 "{Creative Labs,SB PCI64/128 (ES1370)}}");
66 MODULE_DESCRIPTION("Ensoniq/Creative AudioPCI ES1371+");
67 MODULE_DEVICES("{{Ensoniq,AudioPCI ES1371/73},"
68 "{Ensoniq,AudioPCI ES1373},"
69 "{Creative Labs,Ectiva EV1938},"
70 "{Creative Labs,SB PCI64/128 (ES1371/73)},"
71 "{Creative Labs,Vibra PCI128},"
75 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
76 #define SUPPORT_JOYSTICK
79 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
80 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
81 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable switches */
82 #ifdef SUPPORT_JOYSTICK
84 static int joystick_port[SNDRV_CARDS];
86 static int joystick[SNDRV_CARDS];
90 MODULE_PARM(index, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
91 MODULE_PARM_DESC(index, "Index value for Ensoniq AudioPCI soundcard.");
92 MODULE_PARM_SYNTAX(index, SNDRV_INDEX_DESC);
93 MODULE_PARM(id, "1-" __MODULE_STRING(SNDRV_CARDS) "s");
94 MODULE_PARM_DESC(id, "ID string for Ensoniq AudioPCI soundcard.");
95 MODULE_PARM_SYNTAX(id, SNDRV_ID_DESC);
96 MODULE_PARM(enable, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
97 MODULE_PARM_DESC(enable, "Enable Ensoniq AudioPCI soundcard.");
98 MODULE_PARM_SYNTAX(enable, SNDRV_ENABLE_DESC);
99 #ifdef SUPPORT_JOYSTICK
101 MODULE_PARM(joystick_port, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
102 MODULE_PARM_DESC(joystick_port, "Joystick port address.");
103 MODULE_PARM_SYNTAX(joystick_port, SNDRV_ENABLED ",allows:{{0},{1},{0x200},{0x208},{0x210},{0x218}},dialog:list");
105 MODULE_PARM(joystick, "1-" __MODULE_STRING(SNDRV_CARDS) "i");
106 MODULE_PARM_DESC(joystick, "Enable joystick.");
107 MODULE_PARM_SYNTAX(joystick, SNDRV_ENABLED "," SNDRV_BOOLEAN_FALSE_DESC);
109 #endif /* SUPPORT_JOYSTICK */
111 #ifndef PCI_DEVICE_ID_ENSONIQ_CT5880
112 #define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880
114 #ifndef PCI_DEVICE_ID_ENSONIQ_ES1371
115 #define PCI_DEVICE_ID_ENSONIQ_ES1371 0x1371
119 /* This is a little confusing because all ES1371 compatible chips have the
120 same DEVICE_ID, the only thing differentiating them is the REV_ID field.
121 This is only significant if you want to enable features on the later parts.
122 Yes, I know it's stupid and why didn't we use the sub IDs?
124 #define ES1371REV_ES1373_A 0x04
125 #define ES1371REV_ES1373_B 0x06
126 #define ES1371REV_CT5880_A 0x07
127 #define CT5880REV_CT5880_C 0x02
128 #define CT5880REV_CT5880_D 0x03 /* ??? -jk */
129 #define CT5880REV_CT5880_E 0x04 /* mw */
130 #define ES1371REV_ES1371_B 0x09
131 #define EV1938REV_EV1938_A 0x00
132 #define ES1371REV_ES1373_8 0x08
138 #define ES_REG(ensoniq, x) ((ensoniq)->port + ES_REG_##x)
140 #define ES_REG_CONTROL 0x00 /* R/W: Interrupt/Chip select control register */
141 #define ES_1370_ADC_STOP (1<<31) /* disable capture buffer transfers */
142 #define ES_1370_XCTL1 (1<<30) /* general purpose output bit */
143 #define ES_1373_BYPASS_P1 (1<<31) /* bypass SRC for PB1 */
144 #define ES_1373_BYPASS_P2 (1<<30) /* bypass SRC for PB2 */
145 #define ES_1373_BYPASS_R (1<<29) /* bypass SRC for REC */
146 #define ES_1373_TEST_BIT (1<<28) /* should be set to 0 for normal operation */
147 #define ES_1373_RECEN_B (1<<27) /* mix record with playback for I2S/SPDIF out */
148 #define ES_1373_SPDIF_THRU (1<<26) /* 0 = SPDIF thru mode, 1 = SPDIF == dig out */
149 #define ES_1371_JOY_ASEL(o) (((o)&0x03)<<24)/* joystick port mapping */
150 #define ES_1371_JOY_ASELM (0x03<<24) /* mask for above */
151 #define ES_1371_JOY_ASELI(i) (((i)>>24)&0x03)
152 #define ES_1371_GPIO_IN(i) (((i)>>20)&0x0f)/* GPIO in [3:0] pins - R/O */
153 #define ES_1370_PCLKDIVO(o) (((o)&0x1fff)<<16)/* clock divide ratio for DAC2 */
154 #define ES_1370_PCLKDIVM ((0x1fff)<<16) /* mask for above */
155 #define ES_1370_PCLKDIVI(i) (((i)>>16)&0x1fff)/* clock divide ratio for DAC2 */
156 #define ES_1371_GPIO_OUT(o) (((o)&0x0f)<<16)/* GPIO out [3:0] pins - W/R */
157 #define ES_1371_GPIO_OUTM (0x0f<<16) /* mask for above */
158 #define ES_MSFMTSEL (1<<15) /* MPEG serial data format; 0 = SONY, 1 = I2S */
159 #define ES_1370_M_SBB (1<<14) /* clock source for DAC - 0 = clock generator; 1 = MPEG clocks */
160 #define ES_1371_SYNC_RES (1<<14) /* Warm AC97 reset */
161 #define ES_1370_WTSRSEL(o) (((o)&0x03)<<12)/* fixed frequency clock for DAC1 */
162 #define ES_1370_WTSRSELM (0x03<<12) /* mask for above */
163 #define ES_1371_ADC_STOP (1<<13) /* disable CCB transfer capture information */
164 #define ES_1371_PWR_INTRM (1<<12) /* power level change interrupts enable */
165 #define ES_1370_DAC_SYNC (1<<11) /* DAC's are synchronous */
166 #define ES_1371_M_CB (1<<11) /* capture clock source; 0 = AC'97 ADC; 1 = I2S */
167 #define ES_CCB_INTRM (1<<10) /* CCB voice interrupts enable */
168 #define ES_1370_M_CB (1<<9) /* capture clock source; 0 = ADC; 1 = MPEG */
169 #define ES_1370_XCTL0 (1<<8) /* generap purpose output bit */
170 #define ES_1371_PDLEV(o) (((o)&0x03)<<8) /* current power down level */
171 #define ES_1371_PDLEVM (0x03<<8) /* mask for above */
172 #define ES_BREQ (1<<7) /* memory bus request enable */
173 #define ES_DAC1_EN (1<<6) /* DAC1 playback channel enable */
174 #define ES_DAC2_EN (1<<5) /* DAC2 playback channel enable */
175 #define ES_ADC_EN (1<<4) /* ADC capture channel enable */
176 #define ES_UART_EN (1<<3) /* UART enable */
177 #define ES_JYSTK_EN (1<<2) /* Joystick module enable */
178 #define ES_1370_CDC_EN (1<<1) /* Codec interface enable */
179 #define ES_1371_XTALCKDIS (1<<1) /* Xtal clock disable */
180 #define ES_1370_SERR_DISABLE (1<<0) /* PCI serr signal disable */
181 #define ES_1371_PCICLKDIS (1<<0) /* PCI clock disable */
182 #define ES_REG_STATUS 0x04 /* R/O: Interrupt/Chip select status register */
183 #define ES_INTR (1<<31) /* Interrupt is pending */
184 #define ES_1371_ST_AC97_RST (1<<29) /* CT5880 AC'97 Reset bit */
185 #define ES_1373_REAR_BIT27 (1<<27) /* rear bits: 000 - front, 010 - mirror, 101 - separate */
186 #define ES_1373_REAR_BIT26 (1<<26)
187 #define ES_1373_REAR_BIT24 (1<<24)
188 #define ES_1373_GPIO_INT_EN(o)(((o)&0x0f)<<20)/* GPIO [3:0] pins - interrupt enable */
189 #define ES_1373_SPDIF_EN (1<<18) /* SPDIF enable */
190 #define ES_1373_SPDIF_TEST (1<<17) /* SPDIF test */
191 #define ES_1371_TEST (1<<16) /* test ASIC */
192 #define ES_1373_GPIO_INT(i) (((i)&0x0f)>>12)/* GPIO [3:0] pins - interrupt pending */
193 #define ES_1370_CSTAT (1<<10) /* CODEC is busy or register write in progress */
194 #define ES_1370_CBUSY (1<<9) /* CODEC is busy */
195 #define ES_1370_CWRIP (1<<8) /* CODEC register write in progress */
196 #define ES_1371_SYNC_ERR (1<<8) /* CODEC synchronization error occurred */
197 #define ES_1371_VC(i) (((i)>>6)&0x03) /* voice code from CCB module */
198 #define ES_1370_VC(i) (((i)>>5)&0x03) /* voice code from CCB module */
199 #define ES_1371_MPWR (1<<5) /* power level interrupt pending */
200 #define ES_MCCB (1<<4) /* CCB interrupt pending */
201 #define ES_UART (1<<3) /* UART interrupt pending */
202 #define ES_DAC1 (1<<2) /* DAC1 channel interrupt pending */
203 #define ES_DAC2 (1<<1) /* DAC2 channel interrupt pending */
204 #define ES_ADC (1<<0) /* ADC channel interrupt pending */
205 #define ES_REG_UART_DATA 0x08 /* R/W: UART data register */
206 #define ES_REG_UART_STATUS 0x09 /* R/O: UART status register */
207 #define ES_RXINT (1<<7) /* RX interrupt occurred */
208 #define ES_TXINT (1<<2) /* TX interrupt occurred */
209 #define ES_TXRDY (1<<1) /* transmitter ready */
210 #define ES_RXRDY (1<<0) /* receiver ready */
211 #define ES_REG_UART_CONTROL 0x09 /* W/O: UART control register */
212 #define ES_RXINTEN (1<<7) /* RX interrupt enable */
213 #define ES_TXINTENO(o) (((o)&0x03)<<5) /* TX interrupt enable */
214 #define ES_TXINTENM (0x03<<5) /* mask for above */
215 #define ES_TXINTENI(i) (((i)>>5)&0x03)
216 #define ES_CNTRL(o) (((o)&0x03)<<0) /* control */
217 #define ES_CNTRLM (0x03<<0) /* mask for above */
218 #define ES_REG_UART_RES 0x0a /* R/W: UART reserver register */
219 #define ES_TEST_MODE (1<<0) /* test mode enabled */
220 #define ES_REG_MEM_PAGE 0x0c /* R/W: Memory page register */
221 #define ES_MEM_PAGEO(o) (((o)&0x0f)<<0) /* memory page select - out */
222 #define ES_MEM_PAGEM (0x0f<<0) /* mask for above */
223 #define ES_MEM_PAGEI(i) (((i)>>0)&0x0f) /* memory page select - in */
224 #define ES_REG_1370_CODEC 0x10 /* W/O: Codec write register address */
225 #define ES_1370_CODEC_WRITE(a,d) ((((a)&0xff)<<8)|(((d)&0xff)<<0))
226 #define ES_REG_1371_CODEC 0x14 /* W/R: Codec Read/Write register address */
227 #define ES_1371_CODEC_RDY (1<<31) /* codec ready */
228 #define ES_1371_CODEC_WIP (1<<30) /* codec register access in progress */
229 #define ES_1371_CODEC_PIRD (1<<23) /* codec read/write select register */
230 #define ES_1371_CODEC_WRITE(a,d) ((((a)&0x7f)<<16)|(((d)&0xffff)<<0))
231 #define ES_1371_CODEC_READS(a) ((((a)&0x7f)<<16)|ES_1371_CODEC_PIRD)
232 #define ES_1371_CODEC_READ(i) (((i)>>0)&0xffff)
234 #define ES_REG_1371_SMPRATE 0x10 /* W/R: Codec rate converter interface register */
235 #define ES_1371_SRC_RAM_ADDRO(o) (((o)&0x7f)<<25)/* address of the sample rate converter */
236 #define ES_1371_SRC_RAM_ADDRM (0x7f<<25) /* mask for above */
237 #define ES_1371_SRC_RAM_ADDRI(i) (((i)>>25)&0x7f)/* address of the sample rate converter */
238 #define ES_1371_SRC_RAM_WE (1<<24) /* R/W: read/write control for sample rate converter */
239 #define ES_1371_SRC_RAM_BUSY (1<<23) /* R/O: sample rate memory is busy */
240 #define ES_1371_SRC_DISABLE (1<<22) /* sample rate converter disable */
241 #define ES_1371_DIS_P1 (1<<21) /* playback channel 1 accumulator update disable */
242 #define ES_1371_DIS_P2 (1<<20) /* playback channel 1 accumulator update disable */
243 #define ES_1371_DIS_R1 (1<<19) /* capture channel accumulator update disable */
244 #define ES_1371_SRC_RAM_DATAO(o) (((o)&0xffff)<<0)/* current value of the sample rate converter */
245 #define ES_1371_SRC_RAM_DATAM (0xffff<<0) /* mask for above */
246 #define ES_1371_SRC_RAM_DATAI(i) (((i)>>0)&0xffff)/* current value of the sample rate converter */
248 #define ES_REG_1371_LEGACY 0x18 /* W/R: Legacy control/status register */
249 #define ES_1371_JFAST (1<<31) /* fast joystick timing */
250 #define ES_1371_HIB (1<<30) /* host interrupt blocking enable */
251 #define ES_1371_VSB (1<<29) /* SB; 0 = addr 0x220xH, 1 = 0x22FxH */
252 #define ES_1371_VMPUO(o) (((o)&0x03)<<27)/* base register address; 0 = 0x320xH; 1 = 0x330xH; 2 = 0x340xH; 3 = 0x350xH */
253 #define ES_1371_VMPUM (0x03<<27) /* mask for above */
254 #define ES_1371_VMPUI(i) (((i)>>27)&0x03)/* base register address */
255 #define ES_1371_VCDCO(o) (((o)&0x03)<<25)/* CODEC; 0 = 0x530xH; 1 = undefined; 2 = 0xe80xH; 3 = 0xF40xH */
256 #define ES_1371_VCDCM (0x03<<25) /* mask for above */
257 #define ES_1371_VCDCI(i) (((i)>>25)&0x03)/* CODEC address */
258 #define ES_1371_FIRQ (1<<24) /* force an interrupt */
259 #define ES_1371_SDMACAP (1<<23) /* enable event capture for slave DMA controller */
260 #define ES_1371_SPICAP (1<<22) /* enable event capture for slave IRQ controller */
261 #define ES_1371_MDMACAP (1<<21) /* enable event capture for master DMA controller */
262 #define ES_1371_MPICAP (1<<20) /* enable event capture for master IRQ controller */
263 #define ES_1371_ADCAP (1<<19) /* enable event capture for ADLIB register; 0x388xH */
264 #define ES_1371_SVCAP (1<<18) /* enable event capture for SB registers */
265 #define ES_1371_CDCCAP (1<<17) /* enable event capture for CODEC registers */
266 #define ES_1371_BACAP (1<<16) /* enable event capture for SoundScape base address */
267 #define ES_1371_EXI(i) (((i)>>8)&0x07) /* event number */
268 #define ES_1371_AI(i) (((i)>>3)&0x1f) /* event significant I/O address */
269 #define ES_1371_WR (1<<2) /* event capture; 0 = read; 1 = write */
270 #define ES_1371_LEGINT (1<<0) /* interrupt for legacy events; 0 = interrupt did occur */
272 #define ES_REG_CHANNEL_STATUS 0x1c /* R/W: first 32-bits from S/PDIF channel status block, es1373 */
274 #define ES_REG_SERIAL 0x20 /* R/W: Serial interface control register */
275 #define ES_1371_DAC_TEST (1<<22) /* DAC test mode enable */
276 #define ES_P2_END_INCO(o) (((o)&0x07)<<19)/* binary offset value to increment / loop end */
277 #define ES_P2_END_INCM (0x07<<19) /* mask for above */
278 #define ES_P2_END_INCI(i) (((i)>>16)&0x07)/* binary offset value to increment / loop end */
279 #define ES_P2_ST_INCO(o) (((o)&0x07)<<16)/* binary offset value to increment / start */
280 #define ES_P2_ST_INCM (0x07<<16) /* mask for above */
281 #define ES_P2_ST_INCI(i) (((i)<<16)&0x07)/* binary offset value to increment / start */
282 #define ES_R1_LOOP_SEL (1<<15) /* ADC; 0 - loop mode; 1 = stop mode */
283 #define ES_P2_LOOP_SEL (1<<14) /* DAC2; 0 - loop mode; 1 = stop mode */
284 #define ES_P1_LOOP_SEL (1<<13) /* DAC1; 0 - loop mode; 1 = stop mode */
285 #define ES_P2_PAUSE (1<<12) /* DAC2; 0 - play mode; 1 = pause mode */
286 #define ES_P1_PAUSE (1<<11) /* DAC1; 0 - play mode; 1 = pause mode */
287 #define ES_R1_INT_EN (1<<10) /* ADC interrupt enable */
288 #define ES_P2_INT_EN (1<<9) /* DAC2 interrupt enable */
289 #define ES_P1_INT_EN (1<<8) /* DAC1 interrupt enable */
290 #define ES_P1_SCT_RLD (1<<7) /* force sample counter reload for DAC1 */
291 #define ES_P2_DAC_SEN (1<<6) /* when stop mode: 0 - DAC2 play back zeros; 1 = DAC2 play back last sample */
292 #define ES_R1_MODEO(o) (((o)&0x03)<<4) /* ADC mode; 0 = 8-bit mono; 1 = 8-bit stereo; 2 = 16-bit mono; 3 = 16-bit stereo */
293 #define ES_R1_MODEM (0x03<<4) /* mask for above */
294 #define ES_R1_MODEI(i) (((i)>>4)&0x03)
295 #define ES_P2_MODEO(o) (((o)&0x03)<<2) /* DAC2 mode; -- '' -- */
296 #define ES_P2_MODEM (0x03<<2) /* mask for above */
297 #define ES_P2_MODEI(i) (((i)>>2)&0x03)
298 #define ES_P1_MODEO(o) (((o)&0x03)<<0) /* DAC1 mode; -- '' -- */
299 #define ES_P1_MODEM (0x03<<0) /* mask for above */
300 #define ES_P1_MODEI(i) (((i)>>0)&0x03)
302 #define ES_REG_DAC1_COUNT 0x24 /* R/W: DAC1 sample count register */
303 #define ES_REG_DAC2_COUNT 0x28 /* R/W: DAC2 sample count register */
304 #define ES_REG_ADC_COUNT 0x2c /* R/W: ADC sample count register */
305 #define ES_REG_CURR_COUNT(i) (((i)>>16)&0xffff)
306 #define ES_REG_COUNTO(o) (((o)&0xffff)<<0)
307 #define ES_REG_COUNTM (0xffff<<0)
308 #define ES_REG_COUNTI(i) (((i)>>0)&0xffff)
310 #define ES_REG_DAC1_FRAME 0x30 /* R/W: PAGE 0x0c; DAC1 frame address */
311 #define ES_REG_DAC1_SIZE 0x34 /* R/W: PAGE 0x0c; DAC1 frame size */
312 #define ES_REG_DAC2_FRAME 0x38 /* R/W: PAGE 0x0c; DAC2 frame address */
313 #define ES_REG_DAC2_SIZE 0x3c /* R/W: PAGE 0x0c; DAC2 frame size */
314 #define ES_REG_ADC_FRAME 0x30 /* R/W: PAGE 0x0d; ADC frame address */
315 #define ES_REG_ADC_SIZE 0x34 /* R/W: PAGE 0x0d; ADC frame size */
316 #define ES_REG_FCURR_COUNTO(o) (((o)&0xffff)<<16)
317 #define ES_REG_FCURR_COUNTM (0xffff<<16)
318 #define ES_REG_FCURR_COUNTI(i) (((i)>>14)&0x3fffc)
319 #define ES_REG_FSIZEO(o) (((o)&0xffff)<<0)
320 #define ES_REG_FSIZEM (0xffff<<0)
321 #define ES_REG_FSIZEI(i) (((i)>>0)&0xffff)
322 #define ES_REG_PHANTOM_FRAME 0x38 /* R/W: PAGE 0x0d: phantom frame address */
323 #define ES_REG_PHANTOM_COUNT 0x3c /* R/W: PAGE 0x0d: phantom frame count */
325 #define ES_REG_UART_FIFO 0x30 /* R/W: PAGE 0x0e; UART FIFO register */
326 #define ES_REG_UF_VALID (1<<8)
327 #define ES_REG_UF_BYTEO(o) (((o)&0xff)<<0)
328 #define ES_REG_UF_BYTEM (0xff<<0)
329 #define ES_REG_UF_BYTEI(i) (((i)>>0)&0xff)
336 #define ES_PAGE_DAC 0x0c
337 #define ES_PAGE_ADC 0x0d
338 #define ES_PAGE_UART 0x0e
339 #define ES_PAGE_UART1 0x0f
342 * Sample rate converter addresses
345 #define ES_SMPREG_DAC1 0x70
346 #define ES_SMPREG_DAC2 0x74
347 #define ES_SMPREG_ADC 0x78
348 #define ES_SMPREG_VOL_ADC 0x6c
349 #define ES_SMPREG_VOL_DAC1 0x7c
350 #define ES_SMPREG_VOL_DAC2 0x7e
351 #define ES_SMPREG_TRUNC_N 0x00
352 #define ES_SMPREG_INT_REGS 0x01
353 #define ES_SMPREG_ACCUM_FRAC 0x02
354 #define ES_SMPREG_VFREQ_FRAC 0x03
360 #define ES_1370_SRCLOCK 1411200
361 #define ES_1370_SRTODIV(x) (ES_1370_SRCLOCK/(x)-2)
367 #define ES_MODE_PLAY1 0x0001
368 #define ES_MODE_PLAY2 0x0002
369 #define ES_MODE_CAPTURE 0x0004
371 #define ES_MODE_OUTPUT 0x0001 /* for MIDI */
372 #define ES_MODE_INPUT 0x0002 /* for MIDI */
378 typedef struct _snd_ensoniq ensoniq_t;
380 struct _snd_ensoniq {
385 unsigned long playback1size;
386 unsigned long playback2size;
387 unsigned long capture3size;
390 struct resource *res_port;
392 unsigned int uartm; /* UART mode */
394 unsigned int ctrl; /* control register */
395 unsigned int sctrl; /* serial control register */
396 unsigned int cssr; /* control status register */
397 unsigned int uartc; /* uart control register */
398 unsigned int rev; /* chip revision */
414 unsigned short subsystem_vendor_id;
415 unsigned short subsystem_device_id;
417 snd_pcm_t *pcm1; /* DAC1/ADC PCM */
418 snd_pcm_t *pcm2; /* DAC2 PCM */
419 snd_pcm_substream_t *playback1_substream;
420 snd_pcm_substream_t *playback2_substream;
421 snd_pcm_substream_t *capture_substream;
422 unsigned int p1_dma_size;
423 unsigned int p2_dma_size;
424 unsigned int c_dma_size;
425 unsigned int p1_period_size;
426 unsigned int p2_period_size;
427 unsigned int c_period_size;
428 snd_rawmidi_t *rmidi;
429 snd_rawmidi_substream_t *midi_input;
430 snd_rawmidi_substream_t *midi_output;
433 unsigned int spdif_default;
434 unsigned int spdif_stream;
437 struct snd_dma_device dma_dev;
438 struct snd_dma_buffer dma_bug;
441 #ifdef SUPPORT_JOYSTICK
442 struct gameport gameport;
446 static irqreturn_t snd_audiopci_interrupt(int irq, void *dev_id, struct pt_regs *regs);
448 static struct pci_device_id snd_audiopci_ids[] = {
450 { 0x1274, 0x5000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* ES1370 */
453 { 0x1274, 0x1371, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* ES1371 */
454 { 0x1274, 0x5880, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* ES1373 - CT5880 */
455 { 0x1102, 0x8938, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* Ectiva EV1938 */
460 MODULE_DEVICE_TABLE(pci, snd_audiopci_ids);
466 #define POLL_COUNT 0xa000
469 static unsigned int snd_es1370_fixed_rates[] =
470 {5512, 11025, 22050, 44100};
471 static snd_pcm_hw_constraint_list_t snd_es1370_hw_constraints_rates = {
473 .list = snd_es1370_fixed_rates,
476 static ratnum_t es1370_clock = {
477 .num = ES_1370_SRCLOCK,
482 static snd_pcm_hw_constraint_ratnums_t snd_es1370_hw_constraints_clock = {
484 .rats = &es1370_clock,
487 static ratden_t es1371_dac_clock = {
488 .num_min = 3000 * (1 << 15),
489 .num_max = 48000 * (1 << 15),
493 static snd_pcm_hw_constraint_ratdens_t snd_es1371_hw_constraints_dac_clock = {
495 .rats = &es1371_dac_clock,
497 static ratnum_t es1371_adc_clock = {
503 static snd_pcm_hw_constraint_ratnums_t snd_es1371_hw_constraints_adc_clock = {
505 .rats = &es1371_adc_clock,
508 static const unsigned int snd_ensoniq_sample_shift[] =
512 * common I/O routines
517 static unsigned int snd_es1371_wait_src_ready(ensoniq_t * ensoniq)
519 unsigned int t, r = 0;
521 for (t = 0; t < POLL_COUNT; t++) {
522 r = inl(ES_REG(ensoniq, 1371_SMPRATE));
523 if ((r & ES_1371_SRC_RAM_BUSY) == 0)
526 snd_printk("wait source ready timeout 0x%lx [0x%x]\n", ES_REG(ensoniq, 1371_SMPRATE), r);
530 static unsigned int snd_es1371_src_read(ensoniq_t * ensoniq, unsigned short reg)
532 unsigned int temp, i, orig, r;
535 temp = orig = snd_es1371_wait_src_ready(ensoniq);
537 /* expose the SRC state bits */
538 r = temp & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 |
539 ES_1371_DIS_P2 | ES_1371_DIS_R1);
540 r |= ES_1371_SRC_RAM_ADDRO(reg) | 0x10000;
541 outl(r, ES_REG(ensoniq, 1371_SMPRATE));
543 /* now, wait for busy and the correct time to read */
544 temp = snd_es1371_wait_src_ready(ensoniq);
546 if ((temp & 0x00870000) != 0x00010000) {
547 /* wait for the right state */
548 for (i = 0; i < POLL_COUNT; i++) {
549 temp = inl(ES_REG(ensoniq, 1371_SMPRATE));
550 if ((temp & 0x00870000) == 0x00010000)
555 /* hide the state bits */
556 r = orig & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 |
557 ES_1371_DIS_P2 | ES_1371_DIS_R1);
558 r |= ES_1371_SRC_RAM_ADDRO(reg);
559 outl(r, ES_REG(ensoniq, 1371_SMPRATE));
564 static void snd_es1371_src_write(ensoniq_t * ensoniq,
565 unsigned short reg, unsigned short data)
569 r = snd_es1371_wait_src_ready(ensoniq) &
570 (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 |
571 ES_1371_DIS_P2 | ES_1371_DIS_R1);
572 r |= ES_1371_SRC_RAM_ADDRO(reg) | ES_1371_SRC_RAM_DATAO(data);
573 outl(r | ES_1371_SRC_RAM_WE, ES_REG(ensoniq, 1371_SMPRATE));
576 #endif /* CHIP1371 */
580 static void snd_es1370_codec_write(ak4531_t *ak4531,
581 unsigned short reg, unsigned short val)
583 ensoniq_t *ensoniq = snd_magic_cast(ensoniq_t, ak4531->private_data, return);
585 unsigned long end_time = jiffies + HZ / 10;
588 printk("CODEC WRITE: reg = 0x%x, val = 0x%x (0x%x), creg = 0x%x\n", reg, val, ES_1370_CODEC_WRITE(reg, val), ES_REG(ensoniq, 1370_CODEC));
591 spin_lock_irqsave(&ensoniq->reg_lock, flags);
592 if (!(inl(ES_REG(ensoniq, STATUS)) & ES_1370_CSTAT)) {
593 outw(ES_1370_CODEC_WRITE(reg, val), ES_REG(ensoniq, 1370_CODEC));
594 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
597 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
599 set_current_state(TASK_UNINTERRUPTIBLE);
602 } while (time_after(end_time, jiffies));
603 snd_printk("codec write timeout, status = 0x%x\n", inl(ES_REG(ensoniq, STATUS)));
606 #endif /* CHIP1370 */
610 static void snd_es1371_codec_write(ac97_t *ac97,
611 unsigned short reg, unsigned short val)
613 ensoniq_t *ensoniq = snd_magic_cast(ensoniq_t, ac97->private_data, return);
617 for (t = 0; t < POLL_COUNT; t++) {
618 spin_lock_irqsave(&ensoniq->reg_lock, flags);
619 if (!(inl(ES_REG(ensoniq, 1371_CODEC)) & ES_1371_CODEC_WIP)) {
620 /* save the current state for latter */
621 x = snd_es1371_wait_src_ready(ensoniq);
622 outl((x & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 |
623 ES_1371_DIS_P2 | ES_1371_DIS_R1)) | 0x00010000,
624 ES_REG(ensoniq, 1371_SMPRATE));
625 /* wait for not busy (state 0) first to avoid
627 for (t = 0; t < POLL_COUNT; t++) {
628 if ((inl(ES_REG(ensoniq, 1371_SMPRATE)) & 0x00870000) == 0x00000000)
631 /* wait for a SAFE time to write addr/data and then do it, dammit */
632 for (t = 0; t < POLL_COUNT; t++) {
633 if ((inl(ES_REG(ensoniq, 1371_SMPRATE)) & 0x00870000) == 0x00010000)
636 outl(ES_1371_CODEC_WRITE(reg, val), ES_REG(ensoniq, 1371_CODEC));
637 /* restore SRC reg */
638 snd_es1371_wait_src_ready(ensoniq);
639 outl(x, ES_REG(ensoniq, 1371_SMPRATE));
640 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
643 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
645 snd_printk("codec write timeout at 0x%lx [0x%x]\n", ES_REG(ensoniq, 1371_CODEC), inl(ES_REG(ensoniq, 1371_CODEC)));
648 static unsigned short snd_es1371_codec_read(ac97_t *ac97,
651 ensoniq_t *ensoniq = snd_magic_cast(ensoniq_t, ac97->private_data, return -ENXIO);
653 unsigned int t, x, fail = 0;
656 for (t = 0; t < POLL_COUNT; t++) {
657 spin_lock_irqsave(&ensoniq->reg_lock, flags);
658 if (!(inl(ES_REG(ensoniq, 1371_CODEC)) & ES_1371_CODEC_WIP)) {
659 /* save the current state for latter */
660 x = snd_es1371_wait_src_ready(ensoniq);
661 outl((x & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 |
662 ES_1371_DIS_P2 | ES_1371_DIS_R1)) | 0x00010000,
663 ES_REG(ensoniq, 1371_SMPRATE));
664 /* wait for not busy (state 0) first to avoid
666 for (t = 0; t < POLL_COUNT; t++) {
667 if ((inl(ES_REG(ensoniq, 1371_SMPRATE)) & 0x00870000) == 0x00000000)
670 /* wait for a SAFE time to write addr/data and then do it, dammit */
671 for (t = 0; t < POLL_COUNT; t++) {
672 if ((inl(ES_REG(ensoniq, 1371_SMPRATE)) & 0x00870000) == 0x00010000)
675 outl(ES_1371_CODEC_READS(reg), ES_REG(ensoniq, 1371_CODEC));
676 /* restore SRC reg */
677 snd_es1371_wait_src_ready(ensoniq);
678 outl(x, ES_REG(ensoniq, 1371_SMPRATE));
679 /* wait for WIP again */
680 for (t = 0; t < POLL_COUNT; t++) {
681 if (!(inl(ES_REG(ensoniq, 1371_CODEC)) & ES_1371_CODEC_WIP))
684 /* now wait for the stinkin' data (RDY) */
685 for (t = 0; t < POLL_COUNT; t++) {
686 if ((x = inl(ES_REG(ensoniq, 1371_CODEC))) & ES_1371_CODEC_RDY) {
687 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
688 return ES_1371_CODEC_READ(x);
691 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
693 snd_printk("codec read timeout (final) at 0x%lx, reg = 0x%x [0x%x]\n", ES_REG(ensoniq, 1371_CODEC), reg, inl(ES_REG(ensoniq, 1371_CODEC)));
698 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
700 snd_printk("es1371: codec read timeout at 0x%lx [0x%x]\n", ES_REG(ensoniq, 1371_CODEC), inl(ES_REG(ensoniq, 1371_CODEC)));
704 static void snd_es1371_adc_rate(ensoniq_t * ensoniq, unsigned int rate)
706 unsigned int n, truncm, freq, result;
709 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
711 truncm = (21 * n - 1) | 1;
712 freq = ((48000UL << 15) / rate) * n;
713 result = (48000UL << 15) / (freq / n);
717 snd_es1371_src_write(ensoniq, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
718 (((239 - truncm) >> 1) << 9) | (n << 4));
722 snd_es1371_src_write(ensoniq, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N,
723 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
725 snd_es1371_src_write(ensoniq, ES_SMPREG_ADC + ES_SMPREG_INT_REGS,
726 (snd_es1371_src_read(ensoniq, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 0x00ff) |
727 ((freq >> 5) & 0xfc00));
728 snd_es1371_src_write(ensoniq, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
729 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_ADC, n << 8);
730 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_ADC + 1, n << 8);
733 static void snd_es1371_dac1_rate(ensoniq_t * ensoniq, unsigned int rate)
735 unsigned int freq, r;
737 freq = ((rate << 15) + 1500) / 3000;
738 r = (snd_es1371_wait_src_ready(ensoniq) & (ES_1371_SRC_DISABLE | ES_1371_DIS_P2 | ES_1371_DIS_R1)) | ES_1371_DIS_P1;
739 outl(r, ES_REG(ensoniq, 1371_SMPRATE));
740 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS,
741 (snd_es1371_src_read(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS) & 0x00ff) |
742 ((freq >> 5) & 0xfc00));
743 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
744 r = (snd_es1371_wait_src_ready(ensoniq) & (ES_1371_SRC_DISABLE | ES_1371_DIS_P2 | ES_1371_DIS_R1));
745 outl(r, ES_REG(ensoniq, 1371_SMPRATE));
748 static void snd_es1371_dac2_rate(ensoniq_t * ensoniq, unsigned int rate)
750 unsigned int freq, r;
752 freq = ((rate << 15) + 1500) / 3000;
753 r = (snd_es1371_wait_src_ready(ensoniq) & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 | ES_1371_DIS_R1)) | ES_1371_DIS_P2;
754 outl(r, ES_REG(ensoniq, 1371_SMPRATE));
755 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS,
756 (snd_es1371_src_read(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS) & 0x00ff) |
757 ((freq >> 5) & 0xfc00));
758 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
759 r = (snd_es1371_wait_src_ready(ensoniq) & (ES_1371_SRC_DISABLE | ES_1371_DIS_P1 | ES_1371_DIS_R1));
760 outl(r, ES_REG(ensoniq, 1371_SMPRATE));
763 #endif /* CHIP1371 */
765 static int snd_ensoniq_trigger(snd_pcm_substream_t *substream, int cmd)
767 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream);
769 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
770 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
772 unsigned int what = 0;
773 struct list_head *pos;
774 snd_pcm_substream_t *s;
775 snd_pcm_group_for_each(pos, substream) {
776 s = snd_pcm_group_substream_entry(pos);
777 if (s == ensoniq->playback1_substream) {
779 snd_pcm_trigger_done(s, substream);
780 } else if (s == ensoniq->playback2_substream) {
782 snd_pcm_trigger_done(s, substream);
783 } else if (s == ensoniq->capture_substream)
786 spin_lock(&ensoniq->reg_lock);
787 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
788 ensoniq->sctrl |= what;
790 ensoniq->sctrl &= ~what;
791 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
792 spin_unlock(&ensoniq->reg_lock);
795 case SNDRV_PCM_TRIGGER_START:
796 case SNDRV_PCM_TRIGGER_STOP:
798 unsigned int what = 0;
799 struct list_head *pos;
800 snd_pcm_substream_t *s;
801 snd_pcm_group_for_each(pos, substream) {
802 s = snd_pcm_group_substream_entry(pos);
803 if (s == ensoniq->playback1_substream) {
805 snd_pcm_trigger_done(s, substream);
806 } else if (s == ensoniq->playback2_substream) {
808 snd_pcm_trigger_done(s, substream);
809 } else if (s == ensoniq->capture_substream) {
811 snd_pcm_trigger_done(s, substream);
814 spin_lock(&ensoniq->reg_lock);
815 if (cmd == SNDRV_PCM_TRIGGER_START)
816 ensoniq->ctrl |= what;
818 ensoniq->ctrl &= ~what;
819 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
820 spin_unlock(&ensoniq->reg_lock);
833 static int snd_ensoniq_hw_params(snd_pcm_substream_t * substream,
834 snd_pcm_hw_params_t * hw_params)
836 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
839 static int snd_ensoniq_hw_free(snd_pcm_substream_t * substream)
841 return snd_pcm_lib_free_pages(substream);
844 static int snd_ensoniq_playback1_prepare(snd_pcm_substream_t * substream)
847 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream);
848 snd_pcm_runtime_t *runtime = substream->runtime;
849 unsigned int mode = 0;
851 ensoniq->p1_dma_size = snd_pcm_lib_buffer_bytes(substream);
852 ensoniq->p1_period_size = snd_pcm_lib_period_bytes(substream);
853 if (snd_pcm_format_width(runtime->format) == 16)
855 if (runtime->channels > 1)
857 spin_lock_irqsave(&ensoniq->reg_lock, flags);
858 ensoniq->ctrl &= ~ES_DAC1_EN;
859 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
860 outl(ES_MEM_PAGEO(ES_PAGE_DAC), ES_REG(ensoniq, MEM_PAGE));
861 outl(runtime->dma_addr, ES_REG(ensoniq, DAC1_FRAME));
862 outl((ensoniq->p1_dma_size >> 2) - 1, ES_REG(ensoniq, DAC1_SIZE));
863 ensoniq->sctrl &= ~(ES_P1_LOOP_SEL | ES_P1_PAUSE | ES_P1_SCT_RLD | ES_P1_MODEM);
864 ensoniq->sctrl |= ES_P1_INT_EN | ES_P1_MODEO(mode);
865 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
866 outl((ensoniq->p1_period_size >> snd_ensoniq_sample_shift[mode]) - 1, ES_REG(ensoniq, DAC1_COUNT));
868 ensoniq->ctrl &= ~ES_1370_WTSRSELM;
869 switch (runtime->rate) {
870 case 5512: ensoniq->ctrl |= ES_1370_WTSRSEL(0); break;
871 case 11025: ensoniq->ctrl |= ES_1370_WTSRSEL(1); break;
872 case 22050: ensoniq->ctrl |= ES_1370_WTSRSEL(2); break;
873 case 44100: ensoniq->ctrl |= ES_1370_WTSRSEL(3); break;
877 snd_es1371_dac1_rate(ensoniq, runtime->rate);
879 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
880 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
884 static int snd_ensoniq_playback2_prepare(snd_pcm_substream_t * substream)
887 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream);
888 snd_pcm_runtime_t *runtime = substream->runtime;
889 unsigned int mode = 0;
891 ensoniq->p2_dma_size = snd_pcm_lib_buffer_bytes(substream);
892 ensoniq->p2_period_size = snd_pcm_lib_period_bytes(substream);
893 if (snd_pcm_format_width(runtime->format) == 16)
895 if (runtime->channels > 1)
897 spin_lock_irqsave(&ensoniq->reg_lock, flags);
898 ensoniq->ctrl &= ~ES_DAC2_EN;
899 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
900 outl(ES_MEM_PAGEO(ES_PAGE_DAC), ES_REG(ensoniq, MEM_PAGE));
901 outl(runtime->dma_addr, ES_REG(ensoniq, DAC2_FRAME));
902 outl((ensoniq->p2_dma_size >> 2) - 1, ES_REG(ensoniq, DAC2_SIZE));
903 ensoniq->sctrl &= ~(ES_P2_LOOP_SEL | ES_P2_PAUSE | ES_P2_DAC_SEN |
904 ES_P2_END_INCM | ES_P2_ST_INCM | ES_P2_MODEM);
905 ensoniq->sctrl |= ES_P2_INT_EN | ES_P2_MODEO(mode) |
906 ES_P2_END_INCO(mode & 2 ? 2 : 1) | ES_P2_ST_INCO(0);
907 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
908 outl((ensoniq->p2_period_size >> snd_ensoniq_sample_shift[mode]) - 1, ES_REG(ensoniq, DAC2_COUNT));
910 if (!(ensoniq->u.es1370.pclkdiv_lock & ES_MODE_CAPTURE)) {
911 ensoniq->ctrl &= ~ES_1370_PCLKDIVM;
912 ensoniq->ctrl |= ES_1370_PCLKDIVO(ES_1370_SRTODIV(runtime->rate));
913 ensoniq->u.es1370.pclkdiv_lock |= ES_MODE_PLAY2;
916 snd_es1371_dac2_rate(ensoniq, runtime->rate);
918 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
919 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
923 static int snd_ensoniq_capture_prepare(snd_pcm_substream_t * substream)
926 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream);
927 snd_pcm_runtime_t *runtime = substream->runtime;
928 unsigned int mode = 0;
930 ensoniq->c_dma_size = snd_pcm_lib_buffer_bytes(substream);
931 ensoniq->c_period_size = snd_pcm_lib_period_bytes(substream);
932 if (snd_pcm_format_width(runtime->format) == 16)
934 if (runtime->channels > 1)
936 spin_lock_irqsave(&ensoniq->reg_lock, flags);
937 ensoniq->ctrl &= ~ES_ADC_EN;
938 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
939 outl(ES_MEM_PAGEO(ES_PAGE_ADC), ES_REG(ensoniq, MEM_PAGE));
940 outl(runtime->dma_addr, ES_REG(ensoniq, ADC_FRAME));
941 outl((ensoniq->c_dma_size >> 2) - 1, ES_REG(ensoniq, ADC_SIZE));
942 ensoniq->sctrl &= ~(ES_R1_LOOP_SEL | ES_R1_MODEM);
943 ensoniq->sctrl |= ES_R1_INT_EN | ES_R1_MODEO(mode);
944 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
945 outl((ensoniq->c_period_size >> snd_ensoniq_sample_shift[mode]) - 1, ES_REG(ensoniq, ADC_COUNT));
947 if (!(ensoniq->u.es1370.pclkdiv_lock & ES_MODE_PLAY2)) {
948 ensoniq->ctrl &= ~ES_1370_PCLKDIVM;
949 ensoniq->ctrl |= ES_1370_PCLKDIVO(ES_1370_SRTODIV(runtime->rate));
950 ensoniq->u.es1370.pclkdiv_lock |= ES_MODE_CAPTURE;
953 snd_es1371_adc_rate(ensoniq, runtime->rate);
955 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
956 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
960 static snd_pcm_uframes_t snd_ensoniq_playback1_pointer(snd_pcm_substream_t * substream)
962 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream);
965 spin_lock(&ensoniq->reg_lock);
966 if (inl(ES_REG(ensoniq, CONTROL)) & ES_DAC1_EN) {
967 outl(ES_MEM_PAGEO(ES_PAGE_DAC), ES_REG(ensoniq, MEM_PAGE));
968 ptr = ES_REG_FCURR_COUNTI(inl(ES_REG(ensoniq, DAC1_SIZE)));
969 ptr = bytes_to_frames(substream->runtime, ptr);
973 spin_unlock(&ensoniq->reg_lock);
977 static snd_pcm_uframes_t snd_ensoniq_playback2_pointer(snd_pcm_substream_t * substream)
979 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream);
982 spin_lock(&ensoniq->reg_lock);
983 if (inl(ES_REG(ensoniq, CONTROL)) & ES_DAC2_EN) {
984 outl(ES_MEM_PAGEO(ES_PAGE_DAC), ES_REG(ensoniq, MEM_PAGE));
985 ptr = ES_REG_FCURR_COUNTI(inl(ES_REG(ensoniq, DAC2_SIZE)));
986 ptr = bytes_to_frames(substream->runtime, ptr);
990 spin_unlock(&ensoniq->reg_lock);
994 static snd_pcm_uframes_t snd_ensoniq_capture_pointer(snd_pcm_substream_t * substream)
996 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream);
999 spin_lock(&ensoniq->reg_lock);
1000 if (inl(ES_REG(ensoniq, CONTROL)) & ES_ADC_EN) {
1001 outl(ES_MEM_PAGEO(ES_PAGE_ADC), ES_REG(ensoniq, MEM_PAGE));
1002 ptr = ES_REG_FCURR_COUNTI(inl(ES_REG(ensoniq, ADC_SIZE)));
1003 ptr = bytes_to_frames(substream->runtime, ptr);
1007 spin_unlock(&ensoniq->reg_lock);
1011 static snd_pcm_hardware_t snd_ensoniq_playback1 =
1013 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1014 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1015 SNDRV_PCM_INFO_MMAP_VALID |
1016 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1017 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
1020 SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
1022 (SNDRV_PCM_RATE_KNOT | /* 5512Hz rate */
1023 SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_22050 |
1024 SNDRV_PCM_RATE_44100),
1030 .buffer_bytes_max = (128*1024),
1031 .period_bytes_min = 64,
1032 .period_bytes_max = (128*1024),
1034 .periods_max = 1024,
1038 static snd_pcm_hardware_t snd_ensoniq_playback2 =
1040 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1041 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1042 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_PAUSE |
1043 SNDRV_PCM_INFO_SYNC_START),
1044 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
1045 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
1050 .buffer_bytes_max = (128*1024),
1051 .period_bytes_min = 64,
1052 .period_bytes_max = (128*1024),
1054 .periods_max = 1024,
1058 static snd_pcm_hardware_t snd_ensoniq_capture =
1060 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1061 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1062 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START),
1063 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
1064 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
1069 .buffer_bytes_max = (128*1024),
1070 .period_bytes_min = 64,
1071 .period_bytes_max = (128*1024),
1073 .periods_max = 1024,
1077 static int snd_ensoniq_playback1_open(snd_pcm_substream_t * substream)
1079 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream);
1080 snd_pcm_runtime_t *runtime = substream->runtime;
1082 ensoniq->mode |= ES_MODE_PLAY1;
1083 ensoniq->playback1_substream = substream;
1084 runtime->hw = snd_ensoniq_playback1;
1085 snd_pcm_set_sync(substream);
1086 spin_lock_irq(&ensoniq->reg_lock);
1087 if (ensoniq->spdif && ensoniq->playback2_substream == NULL)
1088 ensoniq->spdif_stream = ensoniq->spdif_default;
1089 spin_unlock_irq(&ensoniq->reg_lock);
1091 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1092 &snd_es1370_hw_constraints_rates);
1094 snd_pcm_hw_constraint_ratdens(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1095 &snd_es1371_hw_constraints_dac_clock);
1100 static int snd_ensoniq_playback2_open(snd_pcm_substream_t * substream)
1102 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream);
1103 snd_pcm_runtime_t *runtime = substream->runtime;
1105 ensoniq->mode |= ES_MODE_PLAY2;
1106 ensoniq->playback2_substream = substream;
1107 runtime->hw = snd_ensoniq_playback2;
1108 snd_pcm_set_sync(substream);
1109 spin_lock_irq(&ensoniq->reg_lock);
1110 if (ensoniq->spdif && ensoniq->playback1_substream == NULL)
1111 ensoniq->spdif_stream = ensoniq->spdif_default;
1112 spin_unlock_irq(&ensoniq->reg_lock);
1114 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1115 &snd_es1370_hw_constraints_clock);
1117 snd_pcm_hw_constraint_ratdens(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1118 &snd_es1371_hw_constraints_dac_clock);
1123 static int snd_ensoniq_capture_open(snd_pcm_substream_t * substream)
1125 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream);
1126 snd_pcm_runtime_t *runtime = substream->runtime;
1128 ensoniq->mode |= ES_MODE_CAPTURE;
1129 ensoniq->capture_substream = substream;
1130 runtime->hw = snd_ensoniq_capture;
1131 snd_pcm_set_sync(substream);
1133 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1134 &snd_es1370_hw_constraints_clock);
1136 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
1137 &snd_es1371_hw_constraints_adc_clock);
1142 static int snd_ensoniq_playback1_close(snd_pcm_substream_t * substream)
1144 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream);
1146 ensoniq->playback1_substream = NULL;
1147 ensoniq->mode &= ~ES_MODE_PLAY1;
1151 static int snd_ensoniq_playback2_close(snd_pcm_substream_t * substream)
1153 unsigned long flags;
1154 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream);
1156 ensoniq->playback2_substream = NULL;
1157 spin_lock_irqsave(&ensoniq->reg_lock, flags);
1159 ensoniq->u.es1370.pclkdiv_lock &= ~ES_MODE_PLAY2;
1161 ensoniq->mode &= ~ES_MODE_PLAY2;
1162 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
1166 static int snd_ensoniq_capture_close(snd_pcm_substream_t * substream)
1168 unsigned long flags;
1169 ensoniq_t *ensoniq = snd_pcm_substream_chip(substream);
1171 ensoniq->capture_substream = NULL;
1172 spin_lock_irqsave(&ensoniq->reg_lock, flags);
1174 ensoniq->u.es1370.pclkdiv_lock &= ~ES_MODE_CAPTURE;
1176 ensoniq->mode &= ~ES_MODE_CAPTURE;
1177 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
1181 static snd_pcm_ops_t snd_ensoniq_playback1_ops = {
1182 .open = snd_ensoniq_playback1_open,
1183 .close = snd_ensoniq_playback1_close,
1184 .ioctl = snd_pcm_lib_ioctl,
1185 .hw_params = snd_ensoniq_hw_params,
1186 .hw_free = snd_ensoniq_hw_free,
1187 .prepare = snd_ensoniq_playback1_prepare,
1188 .trigger = snd_ensoniq_trigger,
1189 .pointer = snd_ensoniq_playback1_pointer,
1192 static snd_pcm_ops_t snd_ensoniq_playback2_ops = {
1193 .open = snd_ensoniq_playback2_open,
1194 .close = snd_ensoniq_playback2_close,
1195 .ioctl = snd_pcm_lib_ioctl,
1196 .hw_params = snd_ensoniq_hw_params,
1197 .hw_free = snd_ensoniq_hw_free,
1198 .prepare = snd_ensoniq_playback2_prepare,
1199 .trigger = snd_ensoniq_trigger,
1200 .pointer = snd_ensoniq_playback2_pointer,
1203 static snd_pcm_ops_t snd_ensoniq_capture_ops = {
1204 .open = snd_ensoniq_capture_open,
1205 .close = snd_ensoniq_capture_close,
1206 .ioctl = snd_pcm_lib_ioctl,
1207 .hw_params = snd_ensoniq_hw_params,
1208 .hw_free = snd_ensoniq_hw_free,
1209 .prepare = snd_ensoniq_capture_prepare,
1210 .trigger = snd_ensoniq_trigger,
1211 .pointer = snd_ensoniq_capture_pointer,
1214 static void snd_ensoniq_pcm_free(snd_pcm_t *pcm)
1216 ensoniq_t *ensoniq = snd_magic_cast(ensoniq_t, pcm->private_data, return);
1217 ensoniq->pcm1 = NULL;
1218 snd_pcm_lib_preallocate_free_for_all(pcm);
1221 static int __devinit snd_ensoniq_pcm(ensoniq_t * ensoniq, int device, snd_pcm_t ** rpcm)
1229 err = snd_pcm_new(ensoniq->card, "ES1370/1", device, 1, 1, &pcm);
1231 err = snd_pcm_new(ensoniq->card, "ES1371/1", device, 1, 1, &pcm);
1237 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ensoniq_playback2_ops);
1239 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ensoniq_playback1_ops);
1241 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ensoniq_capture_ops);
1243 pcm->private_data = ensoniq;
1244 pcm->private_free = snd_ensoniq_pcm_free;
1245 pcm->info_flags = 0;
1247 strcpy(pcm->name, "ES1370 DAC2/ADC");
1249 strcpy(pcm->name, "ES1371 DAC2/ADC");
1251 ensoniq->pcm1 = pcm;
1253 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1254 snd_dma_pci_data(ensoniq->pci), 64*1024, 128*1024);
1261 static void snd_ensoniq_pcm_free2(snd_pcm_t *pcm)
1263 ensoniq_t *ensoniq = snd_magic_cast(ensoniq_t, pcm->private_data, return);
1264 ensoniq->pcm2 = NULL;
1265 snd_pcm_lib_preallocate_free_for_all(pcm);
1268 static int __devinit snd_ensoniq_pcm2(ensoniq_t * ensoniq, int device, snd_pcm_t ** rpcm)
1276 err = snd_pcm_new(ensoniq->card, "ES1370/2", device, 1, 0, &pcm);
1278 err = snd_pcm_new(ensoniq->card, "ES1371/2", device, 1, 0, &pcm);
1284 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ensoniq_playback1_ops);
1286 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ensoniq_playback2_ops);
1288 pcm->private_data = ensoniq;
1289 pcm->private_free = snd_ensoniq_pcm_free2;
1290 pcm->info_flags = 0;
1292 strcpy(pcm->name, "ES1370 DAC1");
1294 strcpy(pcm->name, "ES1371 DAC1");
1296 ensoniq->pcm2 = pcm;
1298 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1299 snd_dma_pci_data(ensoniq->pci), 64*1024, 128*1024);
1311 * ENS1371 mixer (including SPDIF interface)
1314 static int snd_ens1373_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1316 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1321 static int snd_ens1373_spdif_default_get(snd_kcontrol_t * kcontrol,
1322 snd_ctl_elem_value_t * ucontrol)
1324 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol);
1325 spin_lock_irq(&ensoniq->reg_lock);
1326 ucontrol->value.iec958.status[0] = (ensoniq->spdif_default >> 0) & 0xff;
1327 ucontrol->value.iec958.status[1] = (ensoniq->spdif_default >> 8) & 0xff;
1328 ucontrol->value.iec958.status[2] = (ensoniq->spdif_default >> 16) & 0xff;
1329 ucontrol->value.iec958.status[3] = (ensoniq->spdif_default >> 24) & 0xff;
1330 spin_unlock_irq(&ensoniq->reg_lock);
1334 static int snd_ens1373_spdif_default_put(snd_kcontrol_t * kcontrol,
1335 snd_ctl_elem_value_t * ucontrol)
1337 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol);
1341 val = ((u32)ucontrol->value.iec958.status[0] << 0) |
1342 ((u32)ucontrol->value.iec958.status[1] << 8) |
1343 ((u32)ucontrol->value.iec958.status[2] << 16) |
1344 ((u32)ucontrol->value.iec958.status[3] << 24);
1345 spin_lock_irq(&ensoniq->reg_lock);
1346 change = ensoniq->spdif_default != val;
1347 ensoniq->spdif_default = val;
1348 if (change && ensoniq->playback1_substream == NULL && ensoniq->playback2_substream == NULL)
1349 outl(val, ES_REG(ensoniq, CHANNEL_STATUS));
1350 spin_unlock_irq(&ensoniq->reg_lock);
1354 static int snd_ens1373_spdif_mask_get(snd_kcontrol_t * kcontrol,
1355 snd_ctl_elem_value_t * ucontrol)
1357 ucontrol->value.iec958.status[0] = 0xff;
1358 ucontrol->value.iec958.status[1] = 0xff;
1359 ucontrol->value.iec958.status[2] = 0xff;
1360 ucontrol->value.iec958.status[3] = 0xff;
1364 static int snd_ens1373_spdif_stream_get(snd_kcontrol_t * kcontrol,
1365 snd_ctl_elem_value_t * ucontrol)
1367 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol);
1368 spin_lock_irq(&ensoniq->reg_lock);
1369 ucontrol->value.iec958.status[0] = (ensoniq->spdif_stream >> 0) & 0xff;
1370 ucontrol->value.iec958.status[1] = (ensoniq->spdif_stream >> 8) & 0xff;
1371 ucontrol->value.iec958.status[2] = (ensoniq->spdif_stream >> 16) & 0xff;
1372 ucontrol->value.iec958.status[3] = (ensoniq->spdif_stream >> 24) & 0xff;
1373 spin_unlock_irq(&ensoniq->reg_lock);
1377 static int snd_ens1373_spdif_stream_put(snd_kcontrol_t * kcontrol,
1378 snd_ctl_elem_value_t * ucontrol)
1380 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol);
1384 val = ((u32)ucontrol->value.iec958.status[0] << 0) |
1385 ((u32)ucontrol->value.iec958.status[1] << 8) |
1386 ((u32)ucontrol->value.iec958.status[2] << 16) |
1387 ((u32)ucontrol->value.iec958.status[3] << 24);
1388 spin_lock_irq(&ensoniq->reg_lock);
1389 change = ensoniq->spdif_stream != val;
1390 ensoniq->spdif_stream = val;
1391 if (change && (ensoniq->playback1_substream != NULL || ensoniq->playback2_substream != NULL))
1392 outl(val, ES_REG(ensoniq, CHANNEL_STATUS));
1393 spin_unlock_irq(&ensoniq->reg_lock);
1397 #define ES1371_SPDIF(xname) \
1398 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_es1371_spdif_info, \
1399 .get = snd_es1371_spdif_get, .put = snd_es1371_spdif_put }
1401 static int snd_es1371_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1403 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1405 uinfo->value.integer.min = 0;
1406 uinfo->value.integer.max = 1;
1410 static int snd_es1371_spdif_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1412 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol);
1414 spin_lock_irq(&ensoniq->reg_lock);
1415 ucontrol->value.integer.value[0] = ensoniq->ctrl & ES_1373_SPDIF_THRU ? 1 : 0;
1416 spin_unlock_irq(&ensoniq->reg_lock);
1420 static int snd_es1371_spdif_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1422 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol);
1423 unsigned int nval1, nval2;
1426 nval1 = ucontrol->value.integer.value[0] ? ES_1373_SPDIF_THRU : 0;
1427 nval2 = ucontrol->value.integer.value[0] ? ES_1373_SPDIF_EN : 0;
1428 spin_lock_irq(&ensoniq->reg_lock);
1429 change = (ensoniq->ctrl & ES_1373_SPDIF_THRU) != nval1;
1430 ensoniq->ctrl &= ~ES_1373_SPDIF_THRU;
1431 ensoniq->ctrl |= nval1;
1432 ensoniq->cssr &= ~ES_1373_SPDIF_EN;
1433 ensoniq->cssr |= nval2;
1434 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1435 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS));
1436 spin_unlock_irq(&ensoniq->reg_lock);
1441 /* spdif controls */
1442 static snd_kcontrol_new_t snd_es1371_mixer_spdif[] __devinitdata = {
1443 ES1371_SPDIF("IEC958 Playback Switch"),
1445 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1446 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1447 .info = snd_ens1373_spdif_info,
1448 .get = snd_ens1373_spdif_default_get,
1449 .put = snd_ens1373_spdif_default_put,
1452 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1453 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1454 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
1455 .info = snd_ens1373_spdif_info,
1456 .get = snd_ens1373_spdif_mask_get
1459 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1460 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1461 .info = snd_ens1373_spdif_info,
1462 .get = snd_ens1373_spdif_stream_get,
1463 .put = snd_ens1373_spdif_stream_put
1468 static int snd_es1373_rear_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1470 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1472 uinfo->value.integer.min = 0;
1473 uinfo->value.integer.max = 1;
1477 static int snd_es1373_rear_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1479 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol);
1482 spin_lock_irq(&ensoniq->reg_lock);
1483 if ((ensoniq->cssr & (ES_1373_REAR_BIT27|ES_1373_REAR_BIT26|ES_1373_REAR_BIT24)) == ES_1373_REAR_BIT26)
1485 ucontrol->value.integer.value[0] = val;
1486 spin_unlock_irq(&ensoniq->reg_lock);
1490 static int snd_es1373_rear_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1492 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol);
1496 nval1 = ucontrol->value.integer.value[0] ? ES_1373_REAR_BIT26 : (ES_1373_REAR_BIT27|ES_1373_REAR_BIT24);
1497 spin_lock_irq(&ensoniq->reg_lock);
1498 change = (ensoniq->cssr & (ES_1373_REAR_BIT27|ES_1373_REAR_BIT26|ES_1373_REAR_BIT24)) != nval1;
1499 ensoniq->cssr &= ~(ES_1373_REAR_BIT27|ES_1373_REAR_BIT26|ES_1373_REAR_BIT24);
1500 ensoniq->cssr |= nval1;
1501 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS));
1502 spin_unlock_irq(&ensoniq->reg_lock);
1506 static snd_kcontrol_new_t snd_ens1373_rear __devinitdata =
1508 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1509 .name = "AC97 2ch->4ch Copy Switch",
1510 .info = snd_es1373_rear_info,
1511 .get = snd_es1373_rear_get,
1512 .put = snd_es1373_rear_put,
1515 static int snd_es1373_line_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1517 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1519 uinfo->value.integer.min = 0;
1520 uinfo->value.integer.max = 1;
1524 static int snd_es1373_line_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1526 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol);
1529 spin_lock_irq(&ensoniq->reg_lock);
1530 if ((ensoniq->ctrl & ES_1371_GPIO_OUTM) >= 4)
1532 ucontrol->value.integer.value[0] = val;
1533 spin_unlock_irq(&ensoniq->reg_lock);
1537 static int snd_es1373_line_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1539 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol);
1543 spin_lock_irq(&ensoniq->reg_lock);
1544 ctrl = ensoniq->ctrl;
1545 if (ucontrol->value.integer.value[0])
1546 ensoniq->ctrl |= ES_1371_GPIO_OUT(4); /* switch line-in -> rear out */
1548 ensoniq->ctrl &= ~ES_1371_GPIO_OUT(4);
1549 changed = (ctrl != ensoniq->ctrl);
1551 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1552 spin_unlock_irq(&ensoniq->reg_lock);
1556 static snd_kcontrol_new_t snd_ens1373_line __devinitdata =
1558 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1559 .name = "Line In->Rear Out Switch",
1560 .info = snd_es1373_line_info,
1561 .get = snd_es1373_line_get,
1562 .put = snd_es1373_line_put,
1565 static void snd_ensoniq_mixer_free_ac97(ac97_t *ac97)
1567 ensoniq_t *ensoniq = snd_magic_cast(ensoniq_t, ac97->private_data, return);
1568 ensoniq->u.es1371.ac97 = NULL;
1572 unsigned short vid; /* vendor ID */
1573 unsigned short did; /* device ID */
1574 unsigned char rev; /* revision */
1575 } es1371_spdif_present[] __devinitdata = {
1576 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_CT5880, .rev = CT5880REV_CT5880_C },
1577 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_CT5880, .rev = CT5880REV_CT5880_D },
1578 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_CT5880, .rev = CT5880REV_CT5880_E },
1579 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_ES1371, .rev = ES1371REV_CT5880_A },
1580 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_ES1371, .rev = ES1371REV_ES1373_8 },
1581 { .vid = PCI_ANY_ID, .did = PCI_ANY_ID }
1584 static int snd_ensoniq_1371_mixer(ensoniq_t * ensoniq)
1586 snd_card_t *card = ensoniq->card;
1587 ac97_bus_t bus, *pbus;
1591 memset(&bus, 0, sizeof(bus));
1592 bus.write = snd_es1371_codec_write;
1593 bus.read = snd_es1371_codec_read;
1594 if ((err = snd_ac97_bus(card, &bus, &pbus)) < 0)
1597 memset(&ac97, 0, sizeof(ac97));
1598 ac97.private_data = ensoniq;
1599 ac97.private_free = snd_ensoniq_mixer_free_ac97;
1600 ac97.scaps = AC97_SCAP_AUDIO;
1601 if ((err = snd_ac97_mixer(pbus, &ac97, &ensoniq->u.es1371.ac97)) < 0)
1603 for (idx = 0; es1371_spdif_present[idx].vid != (unsigned short)PCI_ANY_ID; idx++)
1604 if (ensoniq->pci->vendor == es1371_spdif_present[idx].vid &&
1605 ensoniq->pci->device == es1371_spdif_present[idx].did &&
1606 ensoniq->rev == es1371_spdif_present[idx].rev) {
1607 snd_kcontrol_t *kctl;
1610 ensoniq->spdif_default = ensoniq->spdif_stream = SNDRV_PCM_DEFAULT_CON_SPDIF;
1611 outl(ensoniq->spdif_default, ES_REG(ensoniq, CHANNEL_STATUS));
1613 if (ensoniq->u.es1371.ac97->ext_id & AC97_EI_SPDIF)
1616 for (i = 0; i < (int)ARRAY_SIZE(snd_es1371_mixer_spdif); i++) {
1617 kctl = snd_ctl_new1(&snd_es1371_mixer_spdif[i], ensoniq);
1620 kctl->id.index = index;
1621 if ((err = snd_ctl_add(card, kctl)) < 0)
1626 if (ensoniq->u.es1371.ac97->ext_id & AC97_EI_SDAC) {
1627 /* mirror rear to front speakers */
1628 ensoniq->cssr &= ~(ES_1373_REAR_BIT27|ES_1373_REAR_BIT24);
1629 ensoniq->cssr |= ES_1373_REAR_BIT26;
1630 err = snd_ctl_add(card, snd_ctl_new1(&snd_ens1373_rear, ensoniq));
1634 if ((ensoniq->subsystem_vendor_id == 0x1274) &&
1635 (ensoniq->subsystem_device_id == 0x2000)) { /* GA-7DXR */
1636 err = snd_ctl_add(card, snd_ctl_new1(&snd_ens1373_line, ensoniq));
1644 #endif /* CHIP1371 */
1646 /* generic control callbacks for ens1370 */
1648 #define ENSONIQ_CONTROL(xname, mask) \
1649 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, .name = xname, .info = snd_ensoniq_control_info, \
1650 .get = snd_ensoniq_control_get, .put = snd_ensoniq_control_put, \
1651 .private_value = mask }
1653 static int snd_ensoniq_control_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1655 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1657 uinfo->value.integer.min = 0;
1658 uinfo->value.integer.max = 1;
1662 static int snd_ensoniq_control_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1664 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol);
1665 unsigned long flags;
1666 int mask = kcontrol->private_value;
1668 spin_lock_irqsave(&ensoniq->reg_lock, flags);
1669 ucontrol->value.integer.value[0] = ensoniq->ctrl & mask ? 1 : 0;
1670 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
1674 static int snd_ensoniq_control_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1676 ensoniq_t *ensoniq = snd_kcontrol_chip(kcontrol);
1677 unsigned long flags;
1678 int mask = kcontrol->private_value;
1682 nval = ucontrol->value.integer.value[0] ? mask : 0;
1683 spin_lock_irqsave(&ensoniq->reg_lock, flags);
1684 change = (ensoniq->ctrl & mask) != nval;
1685 ensoniq->ctrl &= ~mask;
1686 ensoniq->ctrl |= nval;
1687 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1688 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
1696 static snd_kcontrol_new_t snd_es1370_controls[2] __devinitdata = {
1697 ENSONIQ_CONTROL("PCM 0 Output also on Line-In Jack", ES_1370_XCTL0),
1698 ENSONIQ_CONTROL("Mic +5V bias", ES_1370_XCTL1)
1701 #define ES1370_CONTROLS ARRAY_SIZE(snd_es1370_controls)
1703 static void snd_ensoniq_mixer_free_ak4531(ak4531_t *ak4531)
1705 ensoniq_t *ensoniq = snd_magic_cast(ensoniq_t, ak4531->private_data, return);
1706 ensoniq->u.es1370.ak4531 = NULL;
1709 static int __devinit snd_ensoniq_1370_mixer(ensoniq_t * ensoniq)
1711 snd_card_t *card = ensoniq->card;
1716 /* try reset AK4531 */
1717 outw(ES_1370_CODEC_WRITE(AK4531_RESET, 0x02), ES_REG(ensoniq, 1370_CODEC));
1718 inw(ES_REG(ensoniq, 1370_CODEC));
1720 outw(ES_1370_CODEC_WRITE(AK4531_RESET, 0x03), ES_REG(ensoniq, 1370_CODEC));
1721 inw(ES_REG(ensoniq, 1370_CODEC));
1724 memset(&ak4531, 0, sizeof(ak4531));
1725 ak4531.write = snd_es1370_codec_write;
1726 ak4531.private_data = ensoniq;
1727 ak4531.private_free = snd_ensoniq_mixer_free_ak4531;
1728 if ((err = snd_ak4531_mixer(card, &ak4531, &ensoniq->u.es1370.ak4531)) < 0)
1730 for (idx = 0; idx < ES1370_CONTROLS; idx++) {
1731 err = snd_ctl_add(card, snd_ctl_new1(&snd_es1370_controls[idx], ensoniq));
1738 #endif /* CHIP1370 */
1740 #ifdef SUPPORT_JOYSTICK
1741 static int snd_ensoniq_joystick(ensoniq_t *ensoniq, long port)
1744 if (port == 1) { /* auto-detect */
1745 for (port = 0x200; port <= 0x218; port += 8)
1746 if (request_region(port, 8, "ens137x: gameport"))
1749 snd_printk("no gameport available\n");
1755 if (!request_region(port, 8, "ens137x: gameport")) {
1756 snd_printk("gameport io port 0x%03x in use", ensoniq->gameport.io);
1760 ensoniq->gameport.io = port;
1761 ensoniq->ctrl |= ES_JYSTK_EN;
1763 ensoniq->ctrl &= ~ES_1371_JOY_ASELM;
1764 ensoniq->ctrl |= ES_1371_JOY_ASEL((ensoniq->gameport.io - 0x200) / 8);
1766 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1767 gameport_register_port(&ensoniq->gameport);
1771 static void snd_ensoniq_joystick_free(ensoniq_t *ensoniq)
1773 gameport_unregister_port(&ensoniq->gameport);
1774 ensoniq->ctrl &= ~ES_JYSTK_EN;
1775 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1776 release_region(ensoniq->gameport.io, 8);
1778 #endif /* SUPPORT_JOYSTICK */
1784 static void snd_ensoniq_proc_read(snd_info_entry_t *entry,
1785 snd_info_buffer_t * buffer)
1787 ensoniq_t *ensoniq = snd_magic_cast(ensoniq_t, entry->private_data, return);
1790 snd_iprintf(buffer, "Ensoniq AudioPCI ES1370\n\n");
1792 snd_iprintf(buffer, "Ensoniq AudioPCI ES1371\n\n");
1794 snd_iprintf(buffer, "Joystick enable : %s\n", ensoniq->ctrl & ES_JYSTK_EN ? "on" : "off");
1796 snd_iprintf(buffer, "MIC +5V bias : %s\n", ensoniq->ctrl & ES_1370_XCTL1 ? "on" : "off");
1797 snd_iprintf(buffer, "Line In to AOUT : %s\n", ensoniq->ctrl & ES_1370_XCTL0 ? "on" : "off");
1799 snd_iprintf(buffer, "Joystick port : 0x%x\n", (ES_1371_JOY_ASELI(ensoniq->ctrl) * 8) + 0x200);
1803 static void __devinit snd_ensoniq_proc_init(ensoniq_t * ensoniq)
1805 snd_info_entry_t *entry;
1807 if (! snd_card_proc_new(ensoniq->card, "audiopci", &entry))
1808 snd_info_set_text_ops(entry, ensoniq, 1024, snd_ensoniq_proc_read);
1815 static int snd_ensoniq_free(ensoniq_t *ensoniq)
1817 #ifdef SUPPORT_JOYSTICK
1818 if (ensoniq->ctrl & ES_JYSTK_EN)
1819 snd_ensoniq_joystick_free(ensoniq);
1821 if (ensoniq->irq < 0)
1824 outl(ES_1370_SERR_DISABLE, ES_REG(ensoniq, CONTROL)); /* switch everything off */
1825 outl(0, ES_REG(ensoniq, SERIAL)); /* clear serial interface */
1827 outl(0, ES_REG(ensoniq, CONTROL)); /* switch everything off */
1828 outl(0, ES_REG(ensoniq, SERIAL)); /* clear serial interface */
1830 synchronize_irq(ensoniq->irq);
1831 pci_set_power_state(ensoniq->pci, 3);
1834 if (ensoniq->dma_bug.area)
1835 snd_dma_free_pages(&ensoniq->dma_dev, &ensoniq->dma_bug);
1837 if (ensoniq->res_port) {
1838 release_resource(ensoniq->res_port);
1839 kfree_nocheck(ensoniq->res_port);
1841 if (ensoniq->irq >= 0)
1842 free_irq(ensoniq->irq, (void *)ensoniq);
1843 snd_magic_kfree(ensoniq);
1847 static int snd_ensoniq_dev_free(snd_device_t *device)
1849 ensoniq_t *ensoniq = snd_magic_cast(ensoniq_t, device->device_data, return -ENXIO);
1850 return snd_ensoniq_free(ensoniq);
1855 unsigned short svid; /* subsystem vendor ID */
1856 unsigned short sdid; /* subsystem device ID */
1857 } es1371_amplifier_hack[] = {
1858 { .svid = 0x107b, .sdid = 0x2150 }, /* Gateway Solo 2150 */
1859 { .svid = 0x13bd, .sdid = 0x100c }, /* EV1938 on Mebius PC-MJ100V */
1860 { .svid = 0x1102, .sdid = 0x5938 }, /* Targa Xtender300 */
1861 { .svid = 0x1102, .sdid = 0x8938 }, /* IPC Topnote G notebook */
1862 { .svid = PCI_ANY_ID, .sdid = PCI_ANY_ID }
1865 unsigned short vid; /* vendor ID */
1866 unsigned short did; /* device ID */
1867 unsigned char rev; /* revision */
1868 } es1371_ac97_reset_hack[] = {
1869 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_CT5880, .rev = CT5880REV_CT5880_C },
1870 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_CT5880, .rev = CT5880REV_CT5880_D },
1871 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_CT5880, .rev = CT5880REV_CT5880_E },
1872 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_ES1371, .rev = ES1371REV_CT5880_A },
1873 { .vid = PCI_VENDOR_ID_ENSONIQ, .did = PCI_DEVICE_ID_ENSONIQ_ES1371, .rev = ES1371REV_ES1373_8 },
1874 { .vid = PCI_ANY_ID, .did = PCI_ANY_ID }
1878 static int __devinit snd_ensoniq_create(snd_card_t * card,
1879 struct pci_dev *pci,
1880 ensoniq_t ** rensoniq)
1883 unsigned short cmdw;
1889 static snd_device_ops_t ops = {
1890 .dev_free = snd_ensoniq_dev_free,
1894 if ((err = pci_enable_device(pci)) < 0)
1896 ensoniq = snd_magic_kcalloc(ensoniq_t, 0, GFP_KERNEL);
1897 if (ensoniq == NULL)
1899 spin_lock_init(&ensoniq->reg_lock);
1900 ensoniq->card = card;
1903 ensoniq->port = pci_resource_start(pci, 0);
1904 if ((ensoniq->res_port = request_region(ensoniq->port, 0x40, "Ensoniq AudioPCI")) == NULL) {
1905 snd_printk("unable to grab ports 0x%lx-0x%lx\n", ensoniq->port, ensoniq->port + 0x40 - 1);
1906 snd_ensoniq_free(ensoniq);
1909 if (request_irq(pci->irq, snd_audiopci_interrupt, SA_INTERRUPT|SA_SHIRQ, "Ensoniq AudioPCI", (void *)ensoniq)) {
1910 snd_printk("unable to grab IRQ %d\n", pci->irq);
1911 snd_ensoniq_free(ensoniq);
1914 ensoniq->irq = pci->irq;
1916 memset(&ensoniq->dma_dev, 0, sizeof(ensoniq->dma_dev));
1917 ensoniq->dma_dev.type = SNDRV_DMA_TYPE_DEV;
1918 ensoniq->dma_dev.dev = snd_dma_pci_data(pci);
1919 if (snd_dma_alloc_pages(&ensoniq->dma_dev, 16, &ensoniq->dma_bug) < 0) {
1920 snd_printk("unable to allocate space for phantom area - dma_bug\n");
1921 snd_ensoniq_free(ensoniq);
1925 pci_set_master(pci);
1926 pci_read_config_byte(pci, PCI_REVISION_ID, &cmdb);
1927 ensoniq->rev = cmdb;
1928 pci_read_config_word(pci, PCI_SUBSYSTEM_VENDOR_ID, &cmdw);
1929 ensoniq->subsystem_vendor_id = cmdw;
1930 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &cmdw);
1931 ensoniq->subsystem_device_id = cmdw;
1932 snd_ensoniq_proc_init(ensoniq);
1935 ensoniq->ctrl = ES_1370_CDC_EN | ES_1370_SERR_DISABLE | ES_1370_PCLKDIVO(ES_1370_SRTODIV(8000));
1936 #else /* get microphone working */
1937 ensoniq->ctrl = ES_1370_CDC_EN | ES_1370_PCLKDIVO(ES_1370_SRTODIV(8000));
1940 /* initialize the chips */
1941 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1942 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
1943 outl(ES_MEM_PAGEO(ES_PAGE_ADC), ES_REG(ensoniq, MEM_PAGE));
1944 outl(ensoniq->dma_bug.addr, ES_REG(ensoniq, PHANTOM_FRAME));
1945 outl(0, ES_REG(ensoniq, PHANTOM_COUNT));
1950 for (idx = 0; es1371_amplifier_hack[idx].svid != (unsigned short)PCI_ANY_ID; idx++)
1951 if (ensoniq->subsystem_vendor_id == es1371_amplifier_hack[idx].svid &&
1952 ensoniq->subsystem_device_id == es1371_amplifier_hack[idx].sdid) {
1953 ensoniq->ctrl |= ES_1371_GPIO_OUT(1); /* turn amplifier on */
1956 /* initialize the chips */
1957 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1958 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
1959 outl(0, ES_REG(ensoniq, 1371_LEGACY));
1960 for (idx = 0; es1371_ac97_reset_hack[idx].vid != (unsigned short)PCI_ANY_ID; idx++)
1961 if (pci->vendor == es1371_ac97_reset_hack[idx].vid &&
1962 pci->device == es1371_ac97_reset_hack[idx].did &&
1963 ensoniq->rev == es1371_ac97_reset_hack[idx].rev) {
1967 ensoniq->cssr |= ES_1371_ST_AC97_RST;
1968 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS));
1969 /* need to delay around 20ms(bleech) to give
1970 some CODECs enough time to wakeup */
1971 tmo = jiffies + (HZ / 50) + 1;
1973 tmo2 = tmo - jiffies;
1976 set_current_state(TASK_UNINTERRUPTIBLE);
1977 schedule_timeout(tmo2);
1981 /* AC'97 warm reset to start the bitclk */
1982 outl(ensoniq->ctrl | ES_1371_SYNC_RES, ES_REG(ensoniq, CONTROL));
1983 inl(ES_REG(ensoniq, CONTROL));
1985 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1986 /* Init the sample rate converter */
1987 snd_es1371_wait_src_ready(ensoniq);
1988 outl(ES_1371_SRC_DISABLE, ES_REG(ensoniq, 1371_SMPRATE));
1989 for (idx = 0; idx < 0x80; idx++)
1990 snd_es1371_src_write(ensoniq, idx, 0);
1991 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4);
1992 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10);
1993 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4);
1994 snd_es1371_src_write(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10);
1995 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_ADC, 1 << 12);
1996 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_ADC + 1, 1 << 12);
1997 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC1, 1 << 12);
1998 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC1 + 1, 1 << 12);
1999 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC2, 1 << 12);
2000 snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC2 + 1, 1 << 12);
2001 snd_es1371_adc_rate(ensoniq, 22050);
2002 snd_es1371_dac1_rate(ensoniq, 22050);
2003 snd_es1371_dac2_rate(ensoniq, 22050);
2005 * enabling the sample rate converter without properly programming
2006 * its parameters causes the chip to lock up (the SRC busy bit will
2007 * be stuck high, and I've found no way to rectify this other than
2008 * power cycle) - Thomas Sailer
2010 snd_es1371_wait_src_ready(ensoniq);
2011 outl(0, ES_REG(ensoniq, 1371_SMPRATE));
2012 /* try reset codec directly */
2013 outl(ES_1371_CODEC_WRITE(0, 0), ES_REG(ensoniq, 1371_CODEC));
2015 outb(ensoniq->uartc = 0x00, ES_REG(ensoniq, UART_CONTROL));
2016 outb(0x00, ES_REG(ensoniq, UART_RES));
2017 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS));
2018 synchronize_irq(ensoniq->irq);
2020 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ensoniq, &ops)) < 0) {
2021 snd_ensoniq_free(ensoniq);
2025 snd_card_set_dev(card, &pci->dev);
2027 *rensoniq = ensoniq;
2035 static void snd_ensoniq_midi_interrupt(ensoniq_t * ensoniq)
2037 snd_rawmidi_t * rmidi = ensoniq->rmidi;
2038 unsigned char status, mask, byte;
2042 /* do Rx at first */
2043 spin_lock(&ensoniq->reg_lock);
2044 mask = ensoniq->uartm & ES_MODE_INPUT ? ES_RXRDY : 0;
2046 status = inb(ES_REG(ensoniq, UART_STATUS));
2047 if ((status & mask) == 0)
2049 byte = inb(ES_REG(ensoniq, UART_DATA));
2050 spin_unlock(&ensoniq->reg_lock);
2051 snd_rawmidi_receive(ensoniq->midi_input, &byte, 1);
2052 spin_lock(&ensoniq->reg_lock);
2054 spin_unlock(&ensoniq->reg_lock);
2056 /* do Tx at second */
2057 spin_lock(&ensoniq->reg_lock);
2058 mask = ensoniq->uartm & ES_MODE_OUTPUT ? ES_TXRDY : 0;
2060 status = inb(ES_REG(ensoniq, UART_STATUS));
2061 if ((status & mask) == 0)
2063 if (snd_rawmidi_transmit(ensoniq->midi_output, &byte, 1) != 1) {
2064 ensoniq->uartc &= ~ES_TXINTENM;
2065 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL));
2068 outb(byte, ES_REG(ensoniq, UART_DATA));
2071 spin_unlock(&ensoniq->reg_lock);
2074 static int snd_ensoniq_midi_input_open(snd_rawmidi_substream_t * substream)
2076 unsigned long flags;
2077 ensoniq_t *ensoniq = snd_magic_cast(ensoniq_t, substream->rmidi->private_data, return -ENXIO);
2079 spin_lock_irqsave(&ensoniq->reg_lock, flags);
2080 ensoniq->uartm |= ES_MODE_INPUT;
2081 ensoniq->midi_input = substream;
2082 if (!(ensoniq->uartm & ES_MODE_OUTPUT)) {
2083 outb(ES_CNTRL(3), ES_REG(ensoniq, UART_CONTROL));
2084 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL));
2085 outl(ensoniq->ctrl |= ES_UART_EN, ES_REG(ensoniq, CONTROL));
2087 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
2091 static int snd_ensoniq_midi_input_close(snd_rawmidi_substream_t * substream)
2093 unsigned long flags;
2094 ensoniq_t *ensoniq = snd_magic_cast(ensoniq_t, substream->rmidi->private_data, return -ENXIO);
2096 spin_lock_irqsave(&ensoniq->reg_lock, flags);
2097 if (!(ensoniq->uartm & ES_MODE_OUTPUT)) {
2098 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL));
2099 outl(ensoniq->ctrl &= ~ES_UART_EN, ES_REG(ensoniq, CONTROL));
2101 outb(ensoniq->uartc &= ~ES_RXINTEN, ES_REG(ensoniq, UART_CONTROL));
2103 ensoniq->midi_input = NULL;
2104 ensoniq->uartm &= ~ES_MODE_INPUT;
2105 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
2109 static int snd_ensoniq_midi_output_open(snd_rawmidi_substream_t * substream)
2111 unsigned long flags;
2112 ensoniq_t *ensoniq = snd_magic_cast(ensoniq_t, substream->rmidi->private_data, return -ENXIO);
2114 spin_lock_irqsave(&ensoniq->reg_lock, flags);
2115 ensoniq->uartm |= ES_MODE_OUTPUT;
2116 ensoniq->midi_output = substream;
2117 if (!(ensoniq->uartm & ES_MODE_INPUT)) {
2118 outb(ES_CNTRL(3), ES_REG(ensoniq, UART_CONTROL));
2119 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL));
2120 outl(ensoniq->ctrl |= ES_UART_EN, ES_REG(ensoniq, CONTROL));
2122 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
2126 static int snd_ensoniq_midi_output_close(snd_rawmidi_substream_t * substream)
2128 unsigned long flags;
2129 ensoniq_t *ensoniq = snd_magic_cast(ensoniq_t, substream->rmidi->private_data, return -ENXIO);
2131 spin_lock_irqsave(&ensoniq->reg_lock, flags);
2132 if (!(ensoniq->uartm & ES_MODE_INPUT)) {
2133 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL));
2134 outl(ensoniq->ctrl &= ~ES_UART_EN, ES_REG(ensoniq, CONTROL));
2136 outb(ensoniq->uartc &= ~ES_TXINTENM, ES_REG(ensoniq, UART_CONTROL));
2138 ensoniq->midi_output = NULL;
2139 ensoniq->uartm &= ~ES_MODE_OUTPUT;
2140 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
2144 static void snd_ensoniq_midi_input_trigger(snd_rawmidi_substream_t * substream, int up)
2146 unsigned long flags;
2147 ensoniq_t *ensoniq = snd_magic_cast(ensoniq_t, substream->rmidi->private_data, return);
2150 spin_lock_irqsave(&ensoniq->reg_lock, flags);
2152 if ((ensoniq->uartc & ES_RXINTEN) == 0) {
2153 /* empty input FIFO */
2154 for (idx = 0; idx < 32; idx++)
2155 inb(ES_REG(ensoniq, UART_DATA));
2156 ensoniq->uartc |= ES_RXINTEN;
2157 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL));
2160 if (ensoniq->uartc & ES_RXINTEN) {
2161 ensoniq->uartc &= ~ES_RXINTEN;
2162 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL));
2165 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
2168 static void snd_ensoniq_midi_output_trigger(snd_rawmidi_substream_t * substream, int up)
2170 unsigned long flags;
2171 ensoniq_t *ensoniq = snd_magic_cast(ensoniq_t, substream->rmidi->private_data, return);
2174 spin_lock_irqsave(&ensoniq->reg_lock, flags);
2176 if (ES_TXINTENI(ensoniq->uartc) == 0) {
2177 ensoniq->uartc |= ES_TXINTENO(1);
2178 /* fill UART FIFO buffer at first, and turn Tx interrupts only if necessary */
2179 while (ES_TXINTENI(ensoniq->uartc) == 1 &&
2180 (inb(ES_REG(ensoniq, UART_STATUS)) & ES_TXRDY)) {
2181 if (snd_rawmidi_transmit(substream, &byte, 1) != 1) {
2182 ensoniq->uartc &= ~ES_TXINTENM;
2184 outb(byte, ES_REG(ensoniq, UART_DATA));
2187 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL));
2190 if (ES_TXINTENI(ensoniq->uartc) == 1) {
2191 ensoniq->uartc &= ~ES_TXINTENM;
2192 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL));
2195 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
2198 static snd_rawmidi_ops_t snd_ensoniq_midi_output =
2200 .open = snd_ensoniq_midi_output_open,
2201 .close = snd_ensoniq_midi_output_close,
2202 .trigger = snd_ensoniq_midi_output_trigger,
2205 static snd_rawmidi_ops_t snd_ensoniq_midi_input =
2207 .open = snd_ensoniq_midi_input_open,
2208 .close = snd_ensoniq_midi_input_close,
2209 .trigger = snd_ensoniq_midi_input_trigger,
2212 static int __devinit snd_ensoniq_midi(ensoniq_t * ensoniq, int device, snd_rawmidi_t **rrawmidi)
2214 snd_rawmidi_t *rmidi;
2219 if ((err = snd_rawmidi_new(ensoniq->card, "ES1370/1", device, 1, 1, &rmidi)) < 0)
2222 strcpy(rmidi->name, "ES1370");
2224 strcpy(rmidi->name, "ES1371");
2226 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_ensoniq_midi_output);
2227 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_ensoniq_midi_input);
2228 rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | SNDRV_RAWMIDI_INFO_INPUT | SNDRV_RAWMIDI_INFO_DUPLEX;
2229 rmidi->private_data = ensoniq;
2230 ensoniq->rmidi = rmidi;
2240 static irqreturn_t snd_audiopci_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2242 ensoniq_t *ensoniq = snd_magic_cast(ensoniq_t, dev_id, return IRQ_NONE);
2243 unsigned int status, sctrl;
2245 if (ensoniq == NULL)
2248 status = inl(ES_REG(ensoniq, STATUS));
2249 if (!(status & ES_INTR))
2252 spin_lock(&ensoniq->reg_lock);
2253 sctrl = ensoniq->sctrl;
2254 if (status & ES_DAC1)
2255 sctrl &= ~ES_P1_INT_EN;
2256 if (status & ES_DAC2)
2257 sctrl &= ~ES_P2_INT_EN;
2258 if (status & ES_ADC)
2259 sctrl &= ~ES_R1_INT_EN;
2260 outl(sctrl, ES_REG(ensoniq, SERIAL));
2261 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
2262 spin_unlock(&ensoniq->reg_lock);
2264 if (status & ES_UART)
2265 snd_ensoniq_midi_interrupt(ensoniq);
2266 if ((status & ES_DAC2) && ensoniq->playback2_substream)
2267 snd_pcm_period_elapsed(ensoniq->playback2_substream);
2268 if ((status & ES_ADC) && ensoniq->capture_substream)
2269 snd_pcm_period_elapsed(ensoniq->capture_substream);
2270 if ((status & ES_DAC1) && ensoniq->playback1_substream)
2271 snd_pcm_period_elapsed(ensoniq->playback1_substream);
2275 static int __devinit snd_audiopci_probe(struct pci_dev *pci,
2276 const struct pci_device_id *pci_id)
2281 int err, pcm_devs[2];
2283 if (dev >= SNDRV_CARDS)
2290 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
2294 if ((err = snd_ensoniq_create(card, pci, &ensoniq)) < 0) {
2295 snd_card_free(card);
2299 pcm_devs[0] = 0; pcm_devs[1] = 1;
2301 if ((err = snd_ensoniq_1370_mixer(ensoniq)) < 0) {
2302 snd_card_free(card);
2307 if ((err = snd_ensoniq_1371_mixer(ensoniq)) < 0) {
2308 snd_card_free(card);
2312 if ((err = snd_ensoniq_pcm(ensoniq, 0, NULL)) < 0) {
2313 snd_card_free(card);
2316 if ((err = snd_ensoniq_pcm2(ensoniq, 1, NULL)) < 0) {
2317 snd_card_free(card);
2320 if ((err = snd_ensoniq_midi(ensoniq, 0, NULL)) < 0) {
2321 snd_card_free(card);
2324 #ifdef SUPPORT_JOYSTICK
2326 switch (joystick_port[dev]) {
2327 case 1: /* auto-detect */
2332 snd_ensoniq_joystick(ensoniq, joystick_port[dev]);
2337 snd_ensoniq_joystick(ensoniq, 0x200);
2339 #endif /* SUPPORT_JOYSTICK */
2340 strcpy(card->driver, DRIVER_NAME);
2342 strcpy(card->shortname, "Ensoniq AudioPCI");
2343 sprintf(card->longname, "%s %s at 0x%lx, irq %i",
2349 if ((err = snd_card_register(card)) < 0) {
2350 snd_card_free(card);
2354 pci_set_drvdata(pci, card);
2359 static void __devexit snd_audiopci_remove(struct pci_dev *pci)
2361 snd_card_free(pci_get_drvdata(pci));
2362 pci_set_drvdata(pci, NULL);
2365 static struct pci_driver driver = {
2366 .name = DRIVER_NAME,
2367 .id_table = snd_audiopci_ids,
2368 .probe = snd_audiopci_probe,
2369 .remove = __devexit_p(snd_audiopci_remove),
2372 static int __init alsa_card_ens137x_init(void)
2376 if ((err = pci_module_init(&driver)) < 0) {
2378 printk(KERN_ERR "Ensoniq AudioPCI soundcard not found or device busy\n");
2385 static void __exit alsa_card_ens137x_exit(void)
2387 pci_unregister_driver(&driver);
2390 module_init(alsa_card_ens137x_init)
2391 module_exit(alsa_card_ens137x_exit)
2395 /* format is: snd-ens1370=enable,index,id,joystick */
2397 static int __init alsa_card_ens137x_setup(char *str)
2399 static unsigned __initdata nr_dev = 0;
2401 if (nr_dev >= SNDRV_CARDS)
2403 (void)(get_option(&str,&enable[nr_dev]) == 2 &&
2404 get_option(&str,&index[nr_dev]) == 2 &&
2405 get_id(&str,&id[nr_dev]) == 2
2406 #ifdef SUPPORT_JOYSTICK
2408 && get_option(&str,&joystick_port[nr_dev]) == 2
2410 && get_option(&str,&joystick[nr_dev]) == 2
2418 #if defined(CHIP1370)
2419 __setup("snd-ens1370=", alsa_card_ens137x_setup);
2420 #elif defined(CHIP1371)
2421 __setup("snd-ens1371=", alsa_card_ens137x_setup);
2424 #endif /* ifndef MODULE */