sound/sparc/cs4231.c

   1 /*
   2  * Driver for CS4231 sound chips found on Sparcs.
   3  * Copyright (C) 2002 David S. Miller <davem@redhat.com>
   4  *
   5  * Based entirely upon drivers/sbus/audio/cs4231.c which is:
   6  * Copyright (C) 1996, 1997, 1998, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
   7  * and also sound/isa/cs423x/cs4231_lib.c which is:
   8  * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
   9  */
  10
  11 #include <linux/config.h>
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/slab.h>
  15 #include <linux/delay.h>
  16 #include <linux/init.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/moduleparam.h>
  19
  20 #include <sound/driver.h>
  21 #include <sound/core.h>
  22 #include <sound/pcm.h>
  23 #include <sound/info.h>
  24 #include <sound/control.h>
  25 #include <sound/timer.h>
  26 #include <sound/initval.h>
  27 #include <sound/pcm_params.h>
  28
  29 #include <asm/io.h>
  30 #include <asm/irq.h>
  31
  32 #ifdef CONFIG_SBUS
  33 #define SBUS_SUPPORT
  34 #endif
  35
  36 #ifdef SBUS_SUPPORT
  37 #include <asm/sbus.h>
  38 #endif
  39
  40 #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
  41 #define EBUS_SUPPORT
  42 #endif
  43
  44 #ifdef EBUS_SUPPORT
  45 #include <linux/pci.h>
  46 #include <asm/ebus.h>
  47 #endif
  48
  49 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  50 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  51 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  52
  53 module_param_array(index, int, NULL, 0444);
  54 MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
  55 module_param_array(id, charp, NULL, 0444);
  56 MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
  57 module_param_array(enable, bool, NULL, 0444);
  58 MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
  59 MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
  60 MODULE_DESCRIPTION("Sun CS4231");
  61 MODULE_LICENSE("GPL");
  62 MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
  63
  64 typedef struct snd_cs4231 {
  65         spinlock_t              lock;
  66         void __iomem            *port;
  67 #ifdef EBUS_SUPPORT
  68         struct ebus_dma_info    eb2c;
  69         struct ebus_dma_info    eb2p;
  70 #endif
  71
  72         u32                     flags;
  73 #define CS4231_FLAG_EBUS        0x00000001
  74 #define CS4231_FLAG_PLAYBACK    0x00000002
  75 #define CS4231_FLAG_CAPTURE     0x00000004
  76
  77         snd_card_t              *card;
  78         snd_pcm_t               *pcm;
  79         snd_pcm_substream_t     *playback_substream;
  80         unsigned int            p_periods_sent;
  81         snd_pcm_substream_t     *capture_substream;
  82         unsigned int            c_periods_sent;
  83         snd_timer_t             *timer;
  84
  85         unsigned short mode;
  86 #define CS4231_MODE_NONE        0x0000
  87 #define CS4231_MODE_PLAY        0x0001
  88 #define CS4231_MODE_RECORD      0x0002
  89 #define CS4231_MODE_TIMER       0x0004
  90 #define CS4231_MODE_OPEN        (CS4231_MODE_PLAY|CS4231_MODE_RECORD|CS4231_MODE_TIMER)
  91
  92         unsigned char           image[32];      /* registers image */
  93         int                     mce_bit;
  94         int                     calibrate_mute;
  95         struct semaphore        mce_mutex;
  96         struct semaphore        open_mutex;
  97
  98         union {
  99 #ifdef SBUS_SUPPORT
 100                 struct sbus_dev         *sdev;
 101 #endif
 102 #ifdef EBUS_SUPPORT
 103                 struct pci_dev          *pdev;
 104 #endif
 105         } dev_u;
 106         unsigned int            irq[2];
 107         unsigned int            regs_size;
 108         struct snd_cs4231       *next;
 109 } cs4231_t;
 110
 111 static cs4231_t *cs4231_list;
 112
 113 /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
 114  * now....  -DaveM
 115  */
 116
 117 /* IO ports */
 118
 119 #define CS4231P(chip, x)        ((chip)->port + c_d_c_CS4231##x)
 120
 121 /* XXX offsets are different than PC ISA chips... */
 122 #define c_d_c_CS4231REGSEL      0x0
 123 #define c_d_c_CS4231REG         0x4
 124 #define c_d_c_CS4231STATUS      0x8
 125 #define c_d_c_CS4231PIO         0xc
 126
 127 /* codec registers */
 128
 129 #define CS4231_LEFT_INPUT       0x00    /* left input control */
 130 #define CS4231_RIGHT_INPUT      0x01    /* right input control */
 131 #define CS4231_AUX1_LEFT_INPUT  0x02    /* left AUX1 input control */
 132 #define CS4231_AUX1_RIGHT_INPUT 0x03    /* right AUX1 input control */
 133 #define CS4231_AUX2_LEFT_INPUT  0x04    /* left AUX2 input control */
 134 #define CS4231_AUX2_RIGHT_INPUT 0x05    /* right AUX2 input control */
 135 #define CS4231_LEFT_OUTPUT      0x06    /* left output control register */
 136 #define CS4231_RIGHT_OUTPUT     0x07    /* right output control register */
 137 #define CS4231_PLAYBK_FORMAT    0x08    /* clock and data format - playback - bits 7-0 MCE */
 138 #define CS4231_IFACE_CTRL       0x09    /* interface control - bits 7-2 MCE */
 139 #define CS4231_PIN_CTRL         0x0a    /* pin control */
 140 #define CS4231_TEST_INIT        0x0b    /* test and initialization */
 141 #define CS4231_MISC_INFO        0x0c    /* miscellaneaous information */
 142 #define CS4231_LOOPBACK         0x0d    /* loopback control */
 143 #define CS4231_PLY_UPR_CNT      0x0e    /* playback upper base count */
 144 #define CS4231_PLY_LWR_CNT      0x0f    /* playback lower base count */
 145 #define CS4231_ALT_FEATURE_1    0x10    /* alternate #1 feature enable */
 146 #define CS4231_ALT_FEATURE_2    0x11    /* alternate #2 feature enable */
 147 #define CS4231_LEFT_LINE_IN     0x12    /* left line input control */
 148 #define CS4231_RIGHT_LINE_IN    0x13    /* right line input control */
 149 #define CS4231_TIMER_LOW        0x14    /* timer low byte */
 150 #define CS4231_TIMER_HIGH       0x15    /* timer high byte */
 151 #define CS4231_LEFT_MIC_INPUT   0x16    /* left MIC input control register (InterWave only) */
 152 #define CS4231_RIGHT_MIC_INPUT  0x17    /* right MIC input control register (InterWave only) */
 153 #define CS4236_EXT_REG          0x17    /* extended register access */
 154 #define CS4231_IRQ_STATUS       0x18    /* irq status register */
 155 #define CS4231_LINE_LEFT_OUTPUT 0x19    /* left line output control register (InterWave only) */
 156 #define CS4231_VERSION          0x19    /* CS4231(A) - version values */
 157 #define CS4231_MONO_CTRL        0x1a    /* mono input/output control */
 158 #define CS4231_LINE_RIGHT_OUTPUT 0x1b   /* right line output control register (InterWave only) */
 159 #define CS4235_LEFT_MASTER      0x1b    /* left master output control */
 160 #define CS4231_REC_FORMAT       0x1c    /* clock and data format - record - bits 7-0 MCE */
 161 #define CS4231_PLY_VAR_FREQ     0x1d    /* playback variable frequency */
 162 #define CS4235_RIGHT_MASTER     0x1d    /* right master output control */
 163 #define CS4231_REC_UPR_CNT      0x1e    /* record upper count */
 164 #define CS4231_REC_LWR_CNT      0x1f    /* record lower count */
 165
 166 /* definitions for codec register select port - CODECP( REGSEL ) */
 167
 168 #define CS4231_INIT             0x80    /* CODEC is initializing */
 169 #define CS4231_MCE              0x40    /* mode change enable */
 170 #define CS4231_TRD              0x20    /* transfer request disable */
 171
 172 /* definitions for codec status register - CODECP( STATUS ) */
 173
 174 #define CS4231_GLOBALIRQ        0x01    /* IRQ is active */
 175
 176 /* definitions for codec irq status */
 177
 178 #define CS4231_PLAYBACK_IRQ     0x10
 179 #define CS4231_RECORD_IRQ       0x20
 180 #define CS4231_TIMER_IRQ        0x40
 181 #define CS4231_ALL_IRQS         0x70
 182 #define CS4231_REC_UNDERRUN     0x08
 183 #define CS4231_REC_OVERRUN      0x04
 184 #define CS4231_PLY_OVERRUN      0x02
 185 #define CS4231_PLY_UNDERRUN     0x01
 186
 187 /* definitions for CS4231_LEFT_INPUT and CS4231_RIGHT_INPUT registers */
 188
 189 #define CS4231_ENABLE_MIC_GAIN  0x20
 190
 191 #define CS4231_MIXS_LINE        0x00
 192 #define CS4231_MIXS_AUX1        0x40
 193 #define CS4231_MIXS_MIC         0x80
 194 #define CS4231_MIXS_ALL         0xc0
 195
 196 /* definitions for clock and data format register - CS4231_PLAYBK_FORMAT */
 197
 198 #define CS4231_LINEAR_8         0x00    /* 8-bit unsigned data */
 199 #define CS4231_ALAW_8           0x60    /* 8-bit A-law companded */
 200 #define CS4231_ULAW_8           0x20    /* 8-bit U-law companded */
 201 #define CS4231_LINEAR_16        0x40    /* 16-bit twos complement data - little endian */
 202 #define CS4231_LINEAR_16_BIG    0xc0    /* 16-bit twos complement data - big endian */
 203 #define CS4231_ADPCM_16         0xa0    /* 16-bit ADPCM */
 204 #define CS4231_STEREO           0x10    /* stereo mode */
 205 /* bits 3-1 define frequency divisor */
 206 #define CS4231_XTAL1            0x00    /* 24.576 crystal */
 207 #define CS4231_XTAL2            0x01    /* 16.9344 crystal */
 208
 209 /* definitions for interface control register - CS4231_IFACE_CTRL */
 210
 211 #define CS4231_RECORD_PIO       0x80    /* record PIO enable */
 212 #define CS4231_PLAYBACK_PIO     0x40    /* playback PIO enable */
 213 #define CS4231_CALIB_MODE       0x18    /* calibration mode bits */
 214 #define CS4231_AUTOCALIB        0x08    /* auto calibrate */
 215 #define CS4231_SINGLE_DMA       0x04    /* use single DMA channel */
 216 #define CS4231_RECORD_ENABLE    0x02    /* record enable */
 217 #define CS4231_PLAYBACK_ENABLE  0x01    /* playback enable */
 218
 219 /* definitions for pin control register - CS4231_PIN_CTRL */
 220
 221 #define CS4231_IRQ_ENABLE       0x02    /* enable IRQ */
 222 #define CS4231_XCTL1            0x40    /* external control #1 */
 223 #define CS4231_XCTL0            0x80    /* external control #0 */
 224
 225 /* definitions for test and init register - CS4231_TEST_INIT */
 226
 227 #define CS4231_CALIB_IN_PROGRESS 0x20   /* auto calibrate in progress */
 228 #define CS4231_DMA_REQUEST      0x10    /* DMA request in progress */
 229
 230 /* definitions for misc control register - CS4231_MISC_INFO */
 231
 232 #define CS4231_MODE2            0x40    /* MODE 2 */
 233 #define CS4231_IW_MODE3         0x6c    /* MODE 3 - InterWave enhanced mode */
 234 #define CS4231_4236_MODE3       0xe0    /* MODE 3 - CS4236+ enhanced mode */
 235
 236 /* definitions for alternate feature 1 register - CS4231_ALT_FEATURE_1 */
 237
 238 #define CS4231_DACZ             0x01    /* zero DAC when underrun */
 239 #define CS4231_TIMER_ENABLE     0x40    /* codec timer enable */
 240 #define CS4231_OLB              0x80    /* output level bit */
 241
 242 /* SBUS DMA register defines.  */
 243
 244 #define APCCSR  0x10UL  /* APC DMA CSR */
 245 #define APCCVA  0x20UL  /* APC Capture DMA Address */
 246 #define APCCC   0x24UL  /* APC Capture Count */
 247 #define APCCNVA 0x28UL  /* APC Capture DMA Next Address */
 248 #define APCCNC  0x2cUL  /* APC Capture Next Count */
 249 #define APCPVA  0x30UL  /* APC Play DMA Address */
 250 #define APCPC   0x34UL  /* APC Play Count */
 251 #define APCPNVA 0x38UL  /* APC Play DMA Next Address */
 252 #define APCPNC  0x3cUL  /* APC Play Next Count */
 253
 254 /* APCCSR bits */
 255
 256 #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
 257 #define APC_PLAY_INT    0x400000 /* Playback interrupt */
 258 #define APC_CAPT_INT    0x200000 /* Capture interrupt */
 259 #define APC_GENL_INT    0x100000 /* General interrupt */
 260 #define APC_XINT_ENA    0x80000  /* General ext int. enable */
 261 #define APC_XINT_PLAY   0x40000  /* Playback ext intr */
 262 #define APC_XINT_CAPT   0x20000  /* Capture ext intr */
 263 #define APC_XINT_GENL   0x10000  /* Error ext intr */
 264 #define APC_XINT_EMPT   0x8000   /* Pipe empty interrupt (0 write to pva) */
 265 #define APC_XINT_PEMP   0x4000   /* Play pipe empty (pva and pnva not set) */
 266 #define APC_XINT_PNVA   0x2000   /* Playback NVA dirty */
 267 #define APC_XINT_PENA   0x1000   /* play pipe empty Int enable */
 268 #define APC_XINT_COVF   0x800    /* Cap data dropped on floor */
 269 #define APC_XINT_CNVA   0x400    /* Capture NVA dirty */
 270 #define APC_XINT_CEMP   0x200    /* Capture pipe empty (cva and cnva not set) */
 271 #define APC_XINT_CENA   0x100    /* Cap. pipe empty int enable */
 272 #define APC_PPAUSE      0x80     /* Pause the play DMA */
 273 #define APC_CPAUSE      0x40     /* Pause the capture DMA */
 274 #define APC_CDC_RESET   0x20     /* CODEC RESET */
 275 #define APC_PDMA_READY  0x08     /* Play DMA Go */
 276 #define APC_CDMA_READY  0x04     /* Capture DMA Go */
 277 #define APC_CHIP_RESET  0x01     /* Reset the chip */
 278
 279 /* EBUS DMA register offsets  */
 280
 281 #define EBDMA_CSR       0x00UL  /* Control/Status */
 282 #define EBDMA_ADDR      0x04UL  /* DMA Address */
 283 #define EBDMA_COUNT     0x08UL  /* DMA Count */
 284
 285 /*
 286  *  Some variables
 287  */
 288
 289 static unsigned char freq_bits[14] = {
 290         /* 5510 */      0x00 | CS4231_XTAL2,
 291         /* 6620 */      0x0E | CS4231_XTAL2,
 292         /* 8000 */      0x00 | CS4231_XTAL1,
 293         /* 9600 */      0x0E | CS4231_XTAL1,
 294         /* 11025 */     0x02 | CS4231_XTAL2,
 295         /* 16000 */     0x02 | CS4231_XTAL1,
 296         /* 18900 */     0x04 | CS4231_XTAL2,
 297         /* 22050 */     0x06 | CS4231_XTAL2,
 298         /* 27042 */     0x04 | CS4231_XTAL1,
 299         /* 32000 */     0x06 | CS4231_XTAL1,
 300         /* 33075 */     0x0C | CS4231_XTAL2,
 301         /* 37800 */     0x08 | CS4231_XTAL2,
 302         /* 44100 */     0x0A | CS4231_XTAL2,
 303         /* 48000 */     0x0C | CS4231_XTAL1
 304 };
 305
 306 static unsigned int rates[14] = {
 307         5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
 308         27042, 32000, 33075, 37800, 44100, 48000
 309 };
 310
 311 static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
 312         .count  = 14,
 313         .list   = rates,
 314 };
 315
 316 static int snd_cs4231_xrate(snd_pcm_runtime_t *runtime)
 317 {
 318         return snd_pcm_hw_constraint_list(runtime, 0,
 319                                           SNDRV_PCM_HW_PARAM_RATE,
 320                                           &hw_constraints_rates);
 321 }
 322
 323 static unsigned char snd_cs4231_original_image[32] =
 324 {
 325         0x00,                   /* 00/00 - lic */
 326         0x00,                   /* 01/01 - ric */
 327         0x9f,                   /* 02/02 - la1ic */
 328         0x9f,                   /* 03/03 - ra1ic */
 329         0x9f,                   /* 04/04 - la2ic */
 330         0x9f,                   /* 05/05 - ra2ic */
 331         0xbf,                   /* 06/06 - loc */
 332         0xbf,                   /* 07/07 - roc */
 333         0x20,                   /* 08/08 - pdfr */
 334         CS4231_AUTOCALIB,       /* 09/09 - ic */
 335         0x00,                   /* 0a/10 - pc */
 336         0x00,                   /* 0b/11 - ti */
 337         CS4231_MODE2,           /* 0c/12 - mi */
 338         0x00,                   /* 0d/13 - lbc */
 339         0x00,                   /* 0e/14 - pbru */
 340         0x00,                   /* 0f/15 - pbrl */
 341         0x80,                   /* 10/16 - afei */
 342         0x01,                   /* 11/17 - afeii */
 343         0x9f,                   /* 12/18 - llic */
 344         0x9f,                   /* 13/19 - rlic */
 345         0x00,                   /* 14/20 - tlb */
 346         0x00,                   /* 15/21 - thb */
 347         0x00,                   /* 16/22 - la3mic/reserved */
 348         0x00,                   /* 17/23 - ra3mic/reserved */
 349         0x00,                   /* 18/24 - afs */
 350         0x00,                   /* 19/25 - lamoc/version */
 351         0x00,                   /* 1a/26 - mioc */
 352         0x00,                   /* 1b/27 - ramoc/reserved */
 353         0x20,                   /* 1c/28 - cdfr */
 354         0x00,                   /* 1d/29 - res4 */
 355         0x00,                   /* 1e/30 - cbru */
 356         0x00,                   /* 1f/31 - cbrl */
 357 };
 358
 359 static u8 __cs4231_readb(cs4231_t *cp, void __iomem *reg_addr)
 360 {
 361 #ifdef EBUS_SUPPORT
 362         if (cp->flags & CS4231_FLAG_EBUS) {
 363                 return readb(reg_addr);
 364         } else {
 365 #endif
 366 #ifdef SBUS_SUPPORT
 367                 return sbus_readb(reg_addr);
 368 #endif
 369 #ifdef EBUS_SUPPORT
 370         }
 371 #endif
 372 }
 373
 374 static void __cs4231_writeb(cs4231_t *cp, u8 val, void __iomem *reg_addr)
 375 {
 376 #ifdef EBUS_SUPPORT
 377         if (cp->flags & CS4231_FLAG_EBUS) {
 378                 return writeb(val, reg_addr);
 379         } else {
 380 #endif
 381 #ifdef SBUS_SUPPORT
 382                 return sbus_writeb(val, reg_addr);
 383 #endif
 384 #ifdef EBUS_SUPPORT
 385         }
 386 #endif
 387 }
 388
 389 /*
 390  *  Basic I/O functions
 391  */
 392
 393 void snd_cs4231_outm(cs4231_t *chip, unsigned char reg,
 394                      unsigned char mask, unsigned char value)
 395 {
 396         int timeout;
 397         unsigned char tmp;
 398
 399         for (timeout = 250;
 400              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 401              timeout--)
 402                 udelay(100);
 403 #ifdef CONFIG_SND_DEBUG
 404         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 405                 snd_printk("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 406 #endif
 407         if (chip->calibrate_mute) {
 408                 chip->image[reg] &= mask;
 409                 chip->image[reg] |= value;
 410         } else {
 411                 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 412                 mb();
 413                 tmp = (chip->image[reg] & mask) | value;
 414                 __cs4231_writeb(chip, tmp, CS4231P(chip, REG));
 415                 chip->image[reg] = tmp;
 416                 mb();
 417         }
 418 }
 419
 420 static void snd_cs4231_dout(cs4231_t *chip, unsigned char reg, unsigned char value)
 421 {
 422         int timeout;
 423
 424         for (timeout = 250;
 425              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 426              timeout--)
 427                 udelay(100);
 428         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 429         __cs4231_writeb(chip, value, CS4231P(chip, REG));
 430         mb();
 431 }
 432
 433 static void snd_cs4231_out(cs4231_t *chip, unsigned char reg, unsigned char value)
 434 {
 435         int timeout;
 436
 437         for (timeout = 250;
 438              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 439              timeout--)
 440                 udelay(100);
 441 #ifdef CONFIG_SND_DEBUG
 442         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 443                 snd_printk("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 444 #endif
 445         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 446         __cs4231_writeb(chip, value, CS4231P(chip, REG));
 447         chip->image[reg] = value;
 448         mb();
 449 #if 0
 450         printk("codec out - reg 0x%x = 0x%x\n", chip->mce_bit | reg, value);
 451 #endif
 452 }
 453
 454 static unsigned char snd_cs4231_in(cs4231_t *chip, unsigned char reg)
 455 {
 456         int timeout;
 457         unsigned char ret;
 458
 459         for (timeout = 250;
 460              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 461              timeout--)
 462                 udelay(100);
 463 #ifdef CONFIG_SND_DEBUG
 464         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 465                 snd_printk("in: auto calibration time out - reg = 0x%x\n", reg);
 466 #endif
 467         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 468         mb();
 469         ret = __cs4231_readb(chip, CS4231P(chip, REG));
 470 #if 0
 471         printk("codec in - reg 0x%x = 0x%x\n", chip->mce_bit | reg, ret);
 472 #endif
 473         return ret;
 474 }
 475
 476 #ifdef CONFIG_SND_DEBUG
 477
 478 void snd_cs4231_debug(cs4231_t *chip)
 479 {
 480         printk("CS4231 REGS:      INDEX = 0x%02x  ",
 481                __cs4231_readb(chip, CS4231P(chip, REGSEL)));
 482         printk("                 STATUS = 0x%02x\n",
 483                __cs4231_readb(chip, CS4231P(chip, STATUS)));
 484         printk("  0x00: left input      = 0x%02x  ", snd_cs4231_in(chip, 0x00));
 485         printk("  0x10: alt 1 (CFIG 2)  = 0x%02x\n", snd_cs4231_in(chip, 0x10));
 486         printk("  0x01: right input     = 0x%02x  ", snd_cs4231_in(chip, 0x01));
 487         printk("  0x11: alt 2 (CFIG 3)  = 0x%02x\n", snd_cs4231_in(chip, 0x11));
 488         printk("  0x02: GF1 left input  = 0x%02x  ", snd_cs4231_in(chip, 0x02));
 489         printk("  0x12: left line in    = 0x%02x\n", snd_cs4231_in(chip, 0x12));
 490         printk("  0x03: GF1 right input = 0x%02x  ", snd_cs4231_in(chip, 0x03));
 491         printk("  0x13: right line in   = 0x%02x\n", snd_cs4231_in(chip, 0x13));
 492         printk("  0x04: CD left input   = 0x%02x  ", snd_cs4231_in(chip, 0x04));
 493         printk("  0x14: timer low       = 0x%02x\n", snd_cs4231_in(chip, 0x14));
 494         printk("  0x05: CD right input  = 0x%02x  ", snd_cs4231_in(chip, 0x05));
 495         printk("  0x15: timer high      = 0x%02x\n", snd_cs4231_in(chip, 0x15));
 496         printk("  0x06: left output     = 0x%02x  ", snd_cs4231_in(chip, 0x06));
 497         printk("  0x16: left MIC (PnP)  = 0x%02x\n", snd_cs4231_in(chip, 0x16));
 498         printk("  0x07: right output    = 0x%02x  ", snd_cs4231_in(chip, 0x07));
 499         printk("  0x17: right MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x17));
 500         printk("  0x08: playback format = 0x%02x  ", snd_cs4231_in(chip, 0x08));
 501         printk("  0x18: IRQ status      = 0x%02x\n", snd_cs4231_in(chip, 0x18));
 502         printk("  0x09: iface (CFIG 1)  = 0x%02x  ", snd_cs4231_in(chip, 0x09));
 503         printk("  0x19: left line out   = 0x%02x\n", snd_cs4231_in(chip, 0x19));
 504         printk("  0x0a: pin control     = 0x%02x  ", snd_cs4231_in(chip, 0x0a));
 505         printk("  0x1a: mono control    = 0x%02x\n", snd_cs4231_in(chip, 0x1a));
 506         printk("  0x0b: init & status   = 0x%02x  ", snd_cs4231_in(chip, 0x0b));
 507         printk("  0x1b: right line out  = 0x%02x\n", snd_cs4231_in(chip, 0x1b));
 508         printk("  0x0c: revision & mode = 0x%02x  ", snd_cs4231_in(chip, 0x0c));
 509         printk("  0x1c: record format   = 0x%02x\n", snd_cs4231_in(chip, 0x1c));
 510         printk("  0x0d: loopback        = 0x%02x  ", snd_cs4231_in(chip, 0x0d));
 511         printk("  0x1d: var freq (PnP)  = 0x%02x\n", snd_cs4231_in(chip, 0x1d));
 512         printk("  0x0e: ply upr count   = 0x%02x  ", snd_cs4231_in(chip, 0x0e));
 513         printk("  0x1e: rec upr count   = 0x%02x\n", snd_cs4231_in(chip, 0x1e));
 514         printk("  0x0f: ply lwr count   = 0x%02x  ", snd_cs4231_in(chip, 0x0f));
 515         printk("  0x1f: rec lwr count   = 0x%02x\n", snd_cs4231_in(chip, 0x1f));
 516 }
 517
 518 #endif
 519
 520 /*
 521  *  CS4231 detection / MCE routines
 522  */
 523
 524 static void snd_cs4231_busy_wait(cs4231_t *chip)
 525 {
 526         int timeout;
 527
 528         /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
 529         for (timeout = 5; timeout > 0; timeout--)
 530                 __cs4231_readb(chip, CS4231P(chip, REGSEL));
 531         /* end of cleanup sequence */
 532         for (timeout = 250;
 533              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 534              timeout--)
 535                 udelay(100);
 536 }
 537
 538 static void snd_cs4231_mce_up(cs4231_t *chip)
 539 {
 540         unsigned long flags;
 541         int timeout;
 542
 543         spin_lock_irqsave(&chip->lock, flags);
 544         for (timeout = 250; timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT); timeout--)
 545                 udelay(100);
 546 #ifdef CONFIG_SND_DEBUG
 547         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 548                 snd_printk("mce_up - auto calibration time out (0)\n");
 549 #endif
 550         chip->mce_bit |= CS4231_MCE;
 551         timeout = __cs4231_readb(chip, CS4231P(chip, REGSEL));
 552         if (timeout == 0x80)
 553                 snd_printk("mce_up [%p]: serious init problem - codec still busy\n", chip->port);
 554         if (!(timeout & CS4231_MCE))
 555                 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), CS4231P(chip, REGSEL));
 556         spin_unlock_irqrestore(&chip->lock, flags);
 557 }
 558
 559 static void snd_cs4231_mce_down(cs4231_t *chip)
 560 {
 561         unsigned long flags;
 562         int timeout;
 563         signed long time;
 564
 565         spin_lock_irqsave(&chip->lock, flags);
 566         snd_cs4231_busy_wait(chip);
 567 #if 0
 568         printk("(1) timeout = %i\n", timeout);
 569 #endif
 570 #ifdef CONFIG_SND_DEBUG
 571         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 572                 snd_printk("mce_down [%p] - auto calibration time out (0)\n", CS4231P(chip, REGSEL));
 573 #endif
 574         chip->mce_bit &= ~CS4231_MCE;
 575         timeout = __cs4231_readb(chip, CS4231P(chip, REGSEL));
 576         __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), CS4231P(chip, REGSEL));
 577         if (timeout == 0x80)
 578                 snd_printk("mce_down [%p]: serious init problem - codec still busy\n", chip->port);
 579         if ((timeout & CS4231_MCE) == 0) {
 580                 spin_unlock_irqrestore(&chip->lock, flags);
 581                 return;
 582         }
 583         snd_cs4231_busy_wait(chip);
 584
 585         /* calibration process */
 586
 587         for (timeout = 500; timeout > 0 && (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0; timeout--)
 588                 udelay(100);
 589         if ((snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0) {
 590                 snd_printd("cs4231_mce_down - auto calibration time out (1)\n");
 591                 spin_unlock_irqrestore(&chip->lock, flags);
 592                 return;
 593         }
 594 #if 0
 595         printk("(2) timeout = %i, jiffies = %li\n", timeout, jiffies);
 596 #endif
 597         time = HZ / 4;
 598         while (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) {
 599                 spin_unlock_irqrestore(&chip->lock, flags);
 600                 if (time <= 0) {
 601                         snd_printk("mce_down - auto calibration time out (2)\n");
 602                         return;
 603                 }
 604                 set_current_state(TASK_INTERRUPTIBLE);
 605                 time = schedule_timeout(time);
 606                 spin_lock_irqsave(&chip->lock, flags);
 607         }
 608 #if 0
 609         printk("(3) jiffies = %li\n", jiffies);
 610 #endif
 611         time = HZ / 10;
 612         while (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT) {
 613                 spin_unlock_irqrestore(&chip->lock, flags);
 614                 if (time <= 0) {
 615                         snd_printk("mce_down - auto calibration time out (3)\n");
 616                         return;
 617                 }
 618                 set_current_state(TASK_INTERRUPTIBLE);
 619                 time = schedule_timeout(time);
 620                 spin_lock_irqsave(&chip->lock, flags);
 621         }
 622         spin_unlock_irqrestore(&chip->lock, flags);
 623 #if 0
 624         printk("(4) jiffies = %li\n", jiffies);
 625         snd_printk("mce_down - exit = 0x%x\n", __cs4231_readb(chip, CS4231P(chip, REGSEL)));
 626 #endif
 627 }
 628
 629 #if 0 /* Unused for now... */
 630 static unsigned int snd_cs4231_get_count(unsigned char format, unsigned int size)
 631 {
 632         switch (format & 0xe0) {
 633         case CS4231_LINEAR_16:
 634         case CS4231_LINEAR_16_BIG:
 635                 size >>= 1;
 636                 break;
 637         case CS4231_ADPCM_16:
 638                 return size >> 2;
 639         }
 640         if (format & CS4231_STEREO)
 641                 size >>= 1;
 642         return size;
 643 }
 644 #endif
 645
 646 #ifdef EBUS_SUPPORT
 647 static void snd_cs4231_ebus_advance_dma(struct ebus_dma_info *p, snd_pcm_substream_t *substream, unsigned int *periods_sent)
 648 {
 649         snd_pcm_runtime_t *runtime = substream->runtime;
 650
 651         while (1) {
 652                 unsigned int dma_size = snd_pcm_lib_period_bytes(substream);
 653                 unsigned int offset = dma_size * (*periods_sent);
 654
 655                 if (dma_size >= (1 << 24))
 656                         BUG();
 657
 658                 if (ebus_dma_request(p, runtime->dma_addr + offset, dma_size))
 659                         return;
 660 #if 0
 661                 printk("ebus_advance: Sent period %u (size[%x] offset[%x])\n",
 662                        (*periods_sent), dma_size, offset);
 663 #endif
 664                 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
 665         }
 666 }
 667 #endif
 668
 669 static void cs4231_dma_trigger(cs4231_t *chip, unsigned int what, int on)
 670 {
 671 #ifdef EBUS_SUPPORT
 672         if (chip->flags & CS4231_FLAG_EBUS) {
 673                 if (what & CS4231_PLAYBACK_ENABLE) {
 674                         if (on) {
 675                                 ebus_dma_prepare(&chip->eb2p, 0);
 676                                 ebus_dma_enable(&chip->eb2p, 1);
 677                                 snd_cs4231_ebus_advance_dma(&chip->eb2p,
 678                                         chip->playback_substream,
 679                                         &chip->p_periods_sent);
 680                         } else {
 681                                 ebus_dma_enable(&chip->eb2p, 0);
 682                         }
 683                 }
 684                 if (what & CS4231_RECORD_ENABLE) {
 685                         if (on) {
 686                                 ebus_dma_prepare(&chip->eb2c, 1);
 687                                 ebus_dma_enable(&chip->eb2c, 1);
 688                                 snd_cs4231_ebus_advance_dma(&chip->eb2c,
 689                                         chip->capture_substream,
 690                                         &chip->c_periods_sent);
 691                         } else {
 692                                 ebus_dma_enable(&chip->eb2c, 0);
 693                         }
 694                 }
 695         } else {
 696 #endif
 697 #ifdef SBUS_SUPPORT
 698 #endif
 699 #ifdef EBUS_SUPPORT
 700         }
 701 #endif
 702 }
 703
 704 static int snd_cs4231_trigger(snd_pcm_substream_t *substream, int cmd)
 705 {
 706         cs4231_t *chip = snd_pcm_substream_chip(substream);
 707         int result = 0;
 708
 709         switch (cmd) {
 710         case SNDRV_PCM_TRIGGER_START:
 711         case SNDRV_PCM_TRIGGER_STOP:
 712         {
 713                 unsigned int what = 0;
 714                 snd_pcm_substream_t *s;
 715                 struct list_head *pos;
 716                 unsigned long flags;
 717
 718                 snd_pcm_group_for_each(pos, substream) {
 719                         s = snd_pcm_group_substream_entry(pos);
 720                         if (s == chip->playback_substream) {
 721                                 what |= CS4231_PLAYBACK_ENABLE;
 722                                 snd_pcm_trigger_done(s, substream);
 723                         } else if (s == chip->capture_substream) {
 724                                 what |= CS4231_RECORD_ENABLE;
 725                                 snd_pcm_trigger_done(s, substream);
 726                         }
 727                 }
 728
 729 #if 0
 730                 printk("TRIGGER: what[%x] on(%d)\n",
 731                        what, (cmd == SNDRV_PCM_TRIGGER_START));
 732 #endif
 733
 734                 spin_lock_irqsave(&chip->lock, flags);
 735                 if (cmd == SNDRV_PCM_TRIGGER_START) {
 736                         cs4231_dma_trigger(chip, what, 1);
 737                         chip->image[CS4231_IFACE_CTRL] |= what;
 738                         if (what & CS4231_PLAYBACK_ENABLE) {
 739                                 snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, 0xff);
 740                                 snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, 0xff);
 741                         }
 742                         if (what & CS4231_RECORD_ENABLE) {
 743                                 snd_cs4231_out(chip, CS4231_REC_LWR_CNT, 0xff);
 744                                 snd_cs4231_out(chip, CS4231_REC_UPR_CNT, 0xff);
 745                         }
 746                 } else {
 747                         cs4231_dma_trigger(chip, what, 0);
 748                         chip->image[CS4231_IFACE_CTRL] &= ~what;
 749                 }
 750                 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
 751                                chip->image[CS4231_IFACE_CTRL]);
 752                 spin_unlock_irqrestore(&chip->lock, flags);
 753                 break;
 754         }
 755         default:
 756                 result = -EINVAL;
 757                 break;
 758         }
 759 #if 0
 760         snd_cs4231_debug(chip);
 761 #endif
 762         return result;
 763 }
 764
 765 /*
 766  *  CODEC I/O
 767  */
 768
 769 static unsigned char snd_cs4231_get_rate(unsigned int rate)
 770 {
 771         int i;
 772
 773         for (i = 0; i < 14; i++)
 774                 if (rate == rates[i])
 775                         return freq_bits[i];
 776         // snd_BUG();
 777         return freq_bits[13];
 778 }
 779
 780 static unsigned char snd_cs4231_get_format(cs4231_t *chip, int format, int channels)
 781 {
 782         unsigned char rformat;
 783
 784         rformat = CS4231_LINEAR_8;
 785         switch (format) {
 786         case SNDRV_PCM_FORMAT_MU_LAW:   rformat = CS4231_ULAW_8; break;
 787         case SNDRV_PCM_FORMAT_A_LAW:    rformat = CS4231_ALAW_8; break;
 788         case SNDRV_PCM_FORMAT_S16_LE:   rformat = CS4231_LINEAR_16; break;
 789         case SNDRV_PCM_FORMAT_S16_BE:   rformat = CS4231_LINEAR_16_BIG; break;
 790         case SNDRV_PCM_FORMAT_IMA_ADPCM:        rformat = CS4231_ADPCM_16; break;
 791         }
 792         if (channels > 1)
 793                 rformat |= CS4231_STEREO;
 794 #if 0
 795         snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
 796 #endif
 797         return rformat;
 798 }
 799
 800 static void snd_cs4231_calibrate_mute(cs4231_t *chip, int mute)
 801 {
 802         unsigned long flags;
 803
 804         mute = mute ? 1 : 0;
 805         spin_lock_irqsave(&chip->lock, flags);
 806         if (chip->calibrate_mute == mute) {
 807                 spin_unlock_irqrestore(&chip->lock, flags);
 808                 return;
 809         }
 810         if (!mute) {
 811                 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
 812                                 chip->image[CS4231_LEFT_INPUT]);
 813                 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
 814                                 chip->image[CS4231_RIGHT_INPUT]);
 815                 snd_cs4231_dout(chip, CS4231_LOOPBACK,
 816                                 chip->image[CS4231_LOOPBACK]);
 817         }
 818         snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
 819                         mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
 820         snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
 821                         mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
 822         snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
 823                         mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
 824         snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
 825                         mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
 826         snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
 827                         mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
 828         snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
 829                         mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
 830         snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
 831                         mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
 832         snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
 833                         mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
 834         snd_cs4231_dout(chip, CS4231_MONO_CTRL,
 835                         mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
 836         chip->calibrate_mute = mute;
 837         spin_unlock_irqrestore(&chip->lock, flags);
 838 }
 839
 840 static void snd_cs4231_playback_format(cs4231_t *chip, snd_pcm_hw_params_t *params,
 841                                        unsigned char pdfr)
 842 {
 843         unsigned long flags;
 844
 845         down(&chip->mce_mutex);
 846         snd_cs4231_calibrate_mute(chip, 1);
 847
 848         snd_cs4231_mce_up(chip);
 849
 850         spin_lock_irqsave(&chip->lock, flags);
 851         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
 852                        (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
 853                        (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
 854                        pdfr);
 855         spin_unlock_irqrestore(&chip->lock, flags);
 856
 857         snd_cs4231_mce_down(chip);
 858
 859         snd_cs4231_calibrate_mute(chip, 0);
 860         up(&chip->mce_mutex);
 861 }
 862
 863 static void snd_cs4231_capture_format(cs4231_t *chip, snd_pcm_hw_params_t *params,
 864                                       unsigned char cdfr)
 865 {
 866         unsigned long flags;
 867
 868         down(&chip->mce_mutex);
 869         snd_cs4231_calibrate_mute(chip, 1);
 870
 871         snd_cs4231_mce_up(chip);
 872
 873         spin_lock_irqsave(&chip->lock, flags);
 874         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
 875                 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
 876                                ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
 877                                (cdfr & 0x0f));
 878                 spin_unlock_irqrestore(&chip->lock, flags);
 879                 snd_cs4231_mce_down(chip);
 880                 snd_cs4231_mce_up(chip);
 881                 spin_lock_irqsave(&chip->lock, flags);
 882         }
 883         snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
 884         spin_unlock_irqrestore(&chip->lock, flags);
 885
 886         snd_cs4231_mce_down(chip);
 887
 888         snd_cs4231_calibrate_mute(chip, 0);
 889         up(&chip->mce_mutex);
 890 }
 891
 892 /*
 893  *  Timer interface
 894  */
 895
 896 static unsigned long snd_cs4231_timer_resolution(snd_timer_t *timer)
 897 {
 898         cs4231_t *chip = snd_timer_chip(timer);
 899
 900         return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
 901 }
 902
 903 static int snd_cs4231_timer_start(snd_timer_t *timer)
 904 {
 905         unsigned long flags;
 906         unsigned int ticks;
 907         cs4231_t *chip = snd_timer_chip(timer);
 908
 909         spin_lock_irqsave(&chip->lock, flags);
 910         ticks = timer->sticks;
 911         if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
 912             (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
 913             (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
 914                 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
 915                                chip->image[CS4231_TIMER_HIGH] =
 916                                (unsigned char) (ticks >> 8));
 917                 snd_cs4231_out(chip, CS4231_TIMER_LOW,
 918                                chip->image[CS4231_TIMER_LOW] =
 919                                (unsigned char) ticks);
 920                 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
 921                                chip->image[CS4231_ALT_FEATURE_1] | CS4231_TIMER_ENABLE);
 922         }
 923         spin_unlock_irqrestore(&chip->lock, flags);
 924
 925         return 0;
 926 }
 927
 928 static int snd_cs4231_timer_stop(snd_timer_t *timer)
 929 {
 930         unsigned long flags;
 931         cs4231_t *chip = snd_timer_chip(timer);
 932
 933         spin_lock_irqsave(&chip->lock, flags);
 934         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
 935                        chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE);
 936         spin_unlock_irqrestore(&chip->lock, flags);
 937
 938         return 0;
 939 }
 940
 941 static void snd_cs4231_init(cs4231_t *chip)
 942 {
 943         unsigned long flags;
 944
 945         snd_cs4231_mce_down(chip);
 946
 947 #ifdef SNDRV_DEBUG_MCE
 948         snd_printk("init: (1)\n");
 949 #endif
 950         snd_cs4231_mce_up(chip);
 951         spin_lock_irqsave(&chip->lock, flags);
 952         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
 953                                             CS4231_RECORD_ENABLE | CS4231_RECORD_PIO |
 954                                             CS4231_CALIB_MODE);
 955         chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
 956         snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
 957         spin_unlock_irqrestore(&chip->lock, flags);
 958         snd_cs4231_mce_down(chip);
 959
 960 #ifdef SNDRV_DEBUG_MCE
 961         snd_printk("init: (2)\n");
 962 #endif
 963
 964         snd_cs4231_mce_up(chip);
 965         spin_lock_irqsave(&chip->lock, flags);
 966         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
 967         spin_unlock_irqrestore(&chip->lock, flags);
 968         snd_cs4231_mce_down(chip);
 969
 970 #ifdef SNDRV_DEBUG_MCE
 971         snd_printk("init: (3) - afei = 0x%x\n", chip->image[CS4231_ALT_FEATURE_1]);
 972 #endif
 973
 974         spin_lock_irqsave(&chip->lock, flags);
 975         snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, chip->image[CS4231_ALT_FEATURE_2]);
 976         spin_unlock_irqrestore(&chip->lock, flags);
 977
 978         snd_cs4231_mce_up(chip);
 979         spin_lock_irqsave(&chip->lock, flags);
 980         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT]);
 981         spin_unlock_irqrestore(&chip->lock, flags);
 982         snd_cs4231_mce_down(chip);
 983
 984 #ifdef SNDRV_DEBUG_MCE
 985         snd_printk("init: (4)\n");
 986 #endif
 987
 988         snd_cs4231_mce_up(chip);
 989         spin_lock_irqsave(&chip->lock, flags);
 990         snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
 991         spin_unlock_irqrestore(&chip->lock, flags);
 992         snd_cs4231_mce_down(chip);
 993
 994 #ifdef SNDRV_DEBUG_MCE
 995         snd_printk("init: (5)\n");
 996 #endif
 997 }
 998
 999 static int snd_cs4231_open(cs4231_t *chip, unsigned int mode)
1000 {
1001         unsigned long flags;
1002
1003         down(&chip->open_mutex);
1004         if ((chip->mode & mode)) {
1005                 up(&chip->open_mutex);
1006                 return -EAGAIN;
1007         }
1008         if (chip->mode & CS4231_MODE_OPEN) {
1009                 chip->mode |= mode;
1010                 up(&chip->open_mutex);
1011                 return 0;
1012         }
1013         /* ok. now enable and ack CODEC IRQ */
1014         spin_lock_irqsave(&chip->lock, flags);
1015         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
1016                        CS4231_RECORD_IRQ |
1017                        CS4231_TIMER_IRQ);
1018         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
1019         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1020         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1021
1022         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
1023                        CS4231_RECORD_IRQ |
1024                        CS4231_TIMER_IRQ);
1025         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
1026         spin_unlock_irqrestore(&chip->lock, flags);
1027
1028         chip->mode = mode;
1029         up(&chip->open_mutex);
1030         return 0;
1031 }
1032
1033 static void snd_cs4231_close(cs4231_t *chip, unsigned int mode)
1034 {
1035         unsigned long flags;
1036
1037         down(&chip->open_mutex);
1038         chip->mode &= ~mode;
1039         if (chip->mode & CS4231_MODE_OPEN) {
1040                 up(&chip->open_mutex);
1041                 return;
1042         }
1043         snd_cs4231_calibrate_mute(chip, 1);
1044
1045         /* disable IRQ */
1046         spin_lock_irqsave(&chip->lock, flags);
1047         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
1048         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1049         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1050
1051         /* now disable record & playback */
1052
1053         if (chip->image[CS4231_IFACE_CTRL] &
1054             (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
1055              CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
1056                 spin_unlock_irqrestore(&chip->lock, flags);
1057                 snd_cs4231_mce_up(chip);
1058                 spin_lock_irqsave(&chip->lock, flags);
1059                 chip->image[CS4231_IFACE_CTRL] &=
1060                         ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
1061                           CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
1062                 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
1063                 spin_unlock_irqrestore(&chip->lock, flags);
1064                 snd_cs4231_mce_down(chip);
1065                 spin_lock_irqsave(&chip->lock, flags);
1066         }
1067
1068         /* clear IRQ again */
1069         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
1070         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1071         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1072         spin_unlock_irqrestore(&chip->lock, flags);
1073
1074         snd_cs4231_calibrate_mute(chip, 0);
1075
1076         chip->mode = 0;
1077         up(&chip->open_mutex);
1078 }
1079
1080 /*
1081  *  timer open/close
1082  */
1083
1084 static int snd_cs4231_timer_open(snd_timer_t *timer)
1085 {
1086         cs4231_t *chip = snd_timer_chip(timer);
1087         snd_cs4231_open(chip, CS4231_MODE_TIMER);
1088         return 0;
1089 }
1090
1091 static int snd_cs4231_timer_close(snd_timer_t * timer)
1092 {
1093         cs4231_t *chip = snd_timer_chip(timer);
1094         snd_cs4231_close(chip, CS4231_MODE_TIMER);
1095         return 0;
1096 }
1097
1098 static struct _snd_timer_hardware snd_cs4231_timer_table =
1099 {
1100         .flags          =       SNDRV_TIMER_HW_AUTO,
1101         .resolution     =       9945,
1102         .ticks          =       65535,
1103         .open           =       snd_cs4231_timer_open,
1104         .close          =       snd_cs4231_timer_close,
1105         .c_resolution   =       snd_cs4231_timer_resolution,
1106         .start          =       snd_cs4231_timer_start,
1107         .stop           =       snd_cs4231_timer_stop,
1108 };
1109
1110 /*
1111  *  ok.. exported functions..
1112  */
1113
1114 static int snd_cs4231_playback_hw_params(snd_pcm_substream_t *substream,
1115                                          snd_pcm_hw_params_t *hw_params)
1116 {
1117         cs4231_t *chip = snd_pcm_substream_chip(substream);
1118         unsigned char new_pdfr;
1119         int err;
1120
1121         if ((err = snd_pcm_lib_malloc_pages(substream,
1122                                             params_buffer_bytes(hw_params))) < 0)
1123                 return err;
1124         new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
1125                                          params_channels(hw_params)) |
1126                 snd_cs4231_get_rate(params_rate(hw_params));
1127         snd_cs4231_playback_format(chip, hw_params, new_pdfr);
1128
1129         return 0;
1130 }
1131
1132 static int snd_cs4231_playback_hw_free(snd_pcm_substream_t *substream)
1133 {
1134         return snd_pcm_lib_free_pages(substream);
1135 }
1136
1137 static int snd_cs4231_playback_prepare(snd_pcm_substream_t *substream)
1138 {
1139         cs4231_t *chip = snd_pcm_substream_chip(substream);
1140         unsigned long flags;
1141
1142         spin_lock_irqsave(&chip->lock, flags);
1143         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
1144                                             CS4231_PLAYBACK_PIO);
1145         spin_unlock_irqrestore(&chip->lock, flags);
1146
1147         return 0;
1148 }
1149
1150 static int snd_cs4231_capture_hw_params(snd_pcm_substream_t *substream,
1151                                         snd_pcm_hw_params_t *hw_params)
1152 {
1153         cs4231_t *chip = snd_pcm_substream_chip(substream);
1154         unsigned char new_cdfr;
1155         int err;
1156
1157         if ((err = snd_pcm_lib_malloc_pages(substream,
1158                                             params_buffer_bytes(hw_params))) < 0)
1159                 return err;
1160         new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
1161                                          params_channels(hw_params)) |
1162                 snd_cs4231_get_rate(params_rate(hw_params));
1163         snd_cs4231_capture_format(chip, hw_params, new_cdfr);
1164
1165         return 0;
1166 }
1167
1168 static int snd_cs4231_capture_hw_free(snd_pcm_substream_t *substream)
1169 {
1170         return snd_pcm_lib_free_pages(substream);
1171 }
1172
1173 static int snd_cs4231_capture_prepare(snd_pcm_substream_t *substream)
1174 {
1175         cs4231_t *chip = snd_pcm_substream_chip(substream);
1176         unsigned long flags;
1177
1178         spin_lock_irqsave(&chip->lock, flags);
1179         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
1180                                             CS4231_RECORD_PIO);
1181
1182         spin_unlock_irqrestore(&chip->lock, flags);
1183
1184         return 0;
1185 }
1186
1187 static void snd_cs4231_overrange(cs4231_t *chip)
1188 {
1189         unsigned long flags;
1190         unsigned char res;
1191
1192         spin_lock_irqsave(&chip->lock, flags);
1193         res = snd_cs4231_in(chip, CS4231_TEST_INIT);
1194         spin_unlock_irqrestore(&chip->lock, flags);
1195
1196         if (res & (0x08 | 0x02))        /* detect overrange only above 0dB; may be user selectable? */
1197                 chip->capture_substream->runtime->overrange++;
1198 }
1199
1200 static void snd_cs4231_generic_interrupt(cs4231_t *chip)
1201 {
1202         unsigned long flags;
1203         unsigned char status;
1204
1205         status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1206         if (!status)
1207                 return;
1208
1209         if (status & CS4231_TIMER_IRQ) {
1210                 if (chip->timer)
1211                         snd_timer_interrupt(chip->timer, chip->timer->sticks);
1212         }
1213         if (status & CS4231_PLAYBACK_IRQ)
1214                 snd_pcm_period_elapsed(chip->playback_substream);
1215         if (status & CS4231_RECORD_IRQ) {
1216                 snd_cs4231_overrange(chip);
1217                 snd_pcm_period_elapsed(chip->capture_substream);
1218         }
1219
1220         /* ACK the CS4231 interrupt. */
1221         spin_lock_irqsave(&chip->lock, flags);
1222         snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1223         spin_unlock_irqrestore(&chip->lock, flags);
1224 }
1225
1226 #ifdef SBUS_SUPPORT
1227 static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1228 {
1229         cs4231_t *chip = dev_id;
1230         u32 csr;
1231
1232         csr = sbus_readl(chip->port + APCCSR);
1233         if (!(csr & (APC_INT_PENDING |
1234                      APC_PLAY_INT |
1235                      APC_CAPT_INT |
1236                      APC_GENL_INT |
1237                      APC_XINT_PEMP |
1238                      APC_XINT_CEMP)))
1239                 return IRQ_NONE;
1240
1241         /* ACK the APC interrupt. */
1242         sbus_writel(csr, chip->port + APCCSR);
1243
1244         snd_cs4231_generic_interrupt(chip);
1245
1246         return IRQ_HANDLED;
1247 }
1248 #endif
1249
1250 #ifdef EBUS_SUPPORT
1251 static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event, void *cookie)
1252 {
1253         cs4231_t *chip = cookie;
1254
1255         if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
1256                 snd_pcm_period_elapsed(chip->playback_substream);
1257                 snd_cs4231_ebus_advance_dma(p, chip->playback_substream,
1258                                             &chip->p_periods_sent);
1259         }
1260 }
1261
1262 static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p, int event, void *cookie)
1263 {
1264         cs4231_t *chip = cookie;
1265
1266         if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
1267                 snd_pcm_period_elapsed(chip->capture_substream);
1268                 snd_cs4231_ebus_advance_dma(p, chip->capture_substream,
1269                                             &chip->c_periods_sent);
1270         }
1271 }
1272 #endif
1273
1274 static snd_pcm_uframes_t snd_cs4231_playback_pointer(snd_pcm_substream_t *substream)
1275 {
1276         cs4231_t *chip = snd_pcm_substream_chip(substream);
1277         size_t ptr, residue, period_bytes;
1278
1279         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1280                 return 0;
1281         period_bytes = snd_pcm_lib_period_bytes(substream);
1282         ptr = period_bytes * chip->p_periods_sent;
1283 #ifdef EBUS_SUPPORT
1284         if (chip->flags & CS4231_FLAG_EBUS) {
1285                 residue = ebus_dma_residue(&chip->eb2p);
1286         } else {
1287 #endif
1288 #ifdef SBUS_SUPPORT
1289                 residue = sbus_readl(chip->port + APCPC);
1290 #endif
1291 #ifdef EBUS_SUPPORT
1292         }
1293 #endif
1294         ptr += (period_bytes - residue);
1295         return bytes_to_frames(substream->runtime, ptr);
1296 }
1297
1298 static snd_pcm_uframes_t snd_cs4231_capture_pointer(snd_pcm_substream_t * substream)
1299 {
1300         cs4231_t *chip = snd_pcm_substream_chip(substream);
1301         size_t ptr, residue, period_bytes;
1302
1303         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1304                 return 0;
1305         period_bytes = snd_pcm_lib_period_bytes(substream);
1306         ptr = period_bytes * chip->c_periods_sent;
1307 #ifdef EBUS_SUPPORT
1308         if (chip->flags & CS4231_FLAG_EBUS) {
1309                 residue = ebus_dma_residue(&chip->eb2c);
1310         } else {
1311 #endif
1312 #ifdef SBUS_SUPPORT
1313                 residue = sbus_readl(chip->port + APCCC);
1314 #endif
1315 #ifdef EBUS_SUPPORT
1316         }
1317 #endif
1318         ptr += (period_bytes - residue);
1319         return bytes_to_frames(substream->runtime, ptr);
1320 }
1321
1322 /*
1323
1324  */
1325
1326 static int snd_cs4231_probe(cs4231_t *chip)
1327 {
1328         unsigned long flags;
1329         int i, id, vers;
1330         unsigned char *ptr;
1331
1332 #if 0
1333         snd_cs4231_debug(chip);
1334 #endif
1335         id = vers = 0;
1336         for (i = 0; i < 50; i++) {
1337                 mb();
1338                 if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
1339                         udelay(2000);
1340                 else {
1341                         spin_lock_irqsave(&chip->lock, flags);
1342                         snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1343                         id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1344                         vers = snd_cs4231_in(chip, CS4231_VERSION);
1345                         spin_unlock_irqrestore(&chip->lock, flags);
1346                         if (id == 0x0a)
1347                                 break;  /* this is valid value */
1348                 }
1349         }
1350         snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
1351         if (id != 0x0a)
1352                 return -ENODEV; /* no valid device found */
1353
1354         spin_lock_irqsave(&chip->lock, flags);
1355
1356
1357         /* Reset DMA engine.  */
1358 #ifdef EBUS_SUPPORT
1359         if (chip->flags & CS4231_FLAG_EBUS) {
1360                 /* Done by ebus_dma_register */
1361         } else {
1362 #endif
1363 #ifdef SBUS_SUPPORT
1364                 sbus_writel(APC_CHIP_RESET, chip->port + APCCSR);
1365                 sbus_writel(0x00, chip->port + APCCSR);
1366                 sbus_writel(sbus_readl(chip->port + APCCSR) | APC_CDC_RESET,
1367                             chip->port + APCCSR);
1368
1369                 udelay(20);
1370
1371                 sbus_writel(sbus_readl(chip->port + APCCSR) & ~APC_CDC_RESET,
1372                             chip->port + APCCSR);
1373                 sbus_writel(sbus_readl(chip->port + APCCSR) | (APC_XINT_ENA |
1374                                                                APC_XINT_PENA |
1375                                                                APC_XINT_CENA),
1376                             chip->port + APCCSR);
1377 #endif
1378 #ifdef EBUS_SUPPORT
1379         }
1380 #endif
1381
1382         __cs4231_readb(chip, CS4231P(chip, STATUS));    /* clear any pendings IRQ */
1383         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));
1384         mb();
1385
1386         spin_unlock_irqrestore(&chip->lock, flags);
1387
1388         chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1389         chip->image[CS4231_IFACE_CTRL] =
1390                 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1391         chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1392         chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1393         if (vers & 0x20)
1394                 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1395
1396         ptr = (unsigned char *) &chip->image;
1397
1398         snd_cs4231_mce_down(chip);
1399
1400         spin_lock_irqsave(&chip->lock, flags);
1401
1402         for (i = 0; i < 32; i++)        /* ok.. fill all CS4231 registers */
1403                 snd_cs4231_out(chip, i, *ptr++);
1404
1405         spin_unlock_irqrestore(&chip->lock, flags);
1406
1407         snd_cs4231_mce_up(chip);
1408
1409         snd_cs4231_mce_down(chip);
1410
1411         mdelay(2);
1412
1413         return 0;               /* all things are ok.. */
1414 }
1415
1416 static snd_pcm_hardware_t snd_cs4231_playback =
1417 {
1418         .info                   = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1419                                  SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START),
1420         .formats                = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
1421                                  SNDRV_PCM_FMTBIT_IMA_ADPCM |
1422                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
1423                                  SNDRV_PCM_FMTBIT_S16_BE),
1424         .rates                  = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1425         .rate_min               = 5510,
1426         .rate_max               = 48000,
1427         .channels_min           = 1,
1428         .channels_max           = 2,
1429         .buffer_bytes_max       = (32*1024),
1430         .period_bytes_min       = 4096,
1431         .period_bytes_max       = (32*1024),
1432         .periods_min            = 1,
1433         .periods_max            = 1024,
1434 };
1435
1436 static snd_pcm_hardware_t snd_cs4231_capture =
1437 {
1438         .info                   = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1439                                  SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START),
1440         .formats                = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
1441                                  SNDRV_PCM_FMTBIT_IMA_ADPCM |
1442                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
1443                                  SNDRV_PCM_FMTBIT_S16_BE),
1444         .rates                  = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1445         .rate_min               = 5510,
1446         .rate_max               = 48000,
1447         .channels_min           = 1,
1448         .channels_max           = 2,
1449         .buffer_bytes_max       = (32*1024),
1450         .period_bytes_min       = 4096,
1451         .period_bytes_max       = (32*1024),
1452         .periods_min            = 1,
1453         .periods_max            = 1024,
1454 };
1455
1456 static int snd_cs4231_playback_open(snd_pcm_substream_t *substream)
1457 {
1458         cs4231_t *chip = snd_pcm_substream_chip(substream);
1459         snd_pcm_runtime_t *runtime = substream->runtime;
1460         int err;
1461
1462         runtime->hw = snd_cs4231_playback;
1463
1464         if ((err = snd_cs4231_open(chip, CS4231_MODE_PLAY)) < 0) {
1465                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1466                 return err;
1467         }
1468         chip->playback_substream = substream;
1469         chip->p_periods_sent = 0;
1470         snd_pcm_set_sync(substream);
1471         snd_cs4231_xrate(runtime);
1472
1473         return 0;
1474 }
1475
1476 static int snd_cs4231_capture_open(snd_pcm_substream_t *substream)
1477 {
1478         cs4231_t *chip = snd_pcm_substream_chip(substream);
1479         snd_pcm_runtime_t *runtime = substream->runtime;
1480         int err;
1481
1482         runtime->hw = snd_cs4231_capture;
1483
1484         if ((err = snd_cs4231_open(chip, CS4231_MODE_RECORD)) < 0) {
1485                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1486                 return err;
1487         }
1488         chip->capture_substream = substream;
1489         chip->c_periods_sent = 0;
1490         snd_pcm_set_sync(substream);
1491         snd_cs4231_xrate(runtime);
1492
1493         return 0;
1494 }
1495
1496 static int snd_cs4231_playback_close(snd_pcm_substream_t *substream)
1497 {
1498         cs4231_t *chip = snd_pcm_substream_chip(substream);
1499
1500         chip->playback_substream = NULL;
1501         snd_cs4231_close(chip, CS4231_MODE_PLAY);
1502
1503         return 0;
1504 }
1505
1506 static int snd_cs4231_capture_close(snd_pcm_substream_t *substream)
1507 {
1508         cs4231_t *chip = snd_pcm_substream_chip(substream);
1509
1510         chip->capture_substream = NULL;
1511         snd_cs4231_close(chip, CS4231_MODE_RECORD);
1512
1513         return 0;
1514 }
1515
1516 /* XXX We can do some power-management, in particular on EBUS using
1517  * XXX the audio AUXIO register...
1518  */
1519
1520 static snd_pcm_ops_t snd_cs4231_playback_ops = {
1521         .open           =       snd_cs4231_playback_open,
1522         .close          =       snd_cs4231_playback_close,
1523         .ioctl          =       snd_pcm_lib_ioctl,
1524         .hw_params      =       snd_cs4231_playback_hw_params,
1525         .hw_free        =       snd_cs4231_playback_hw_free,
1526         .prepare        =       snd_cs4231_playback_prepare,
1527         .trigger        =       snd_cs4231_trigger,
1528         .pointer        =       snd_cs4231_playback_pointer,
1529 };
1530
1531 static snd_pcm_ops_t snd_cs4231_capture_ops = {
1532         .open           =       snd_cs4231_capture_open,
1533         .close          =       snd_cs4231_capture_close,
1534         .ioctl          =       snd_pcm_lib_ioctl,
1535         .hw_params      =       snd_cs4231_capture_hw_params,
1536         .hw_free        =       snd_cs4231_capture_hw_free,
1537         .prepare        =       snd_cs4231_capture_prepare,
1538         .trigger        =       snd_cs4231_trigger,
1539         .pointer        =       snd_cs4231_capture_pointer,
1540 };
1541
1542 static void snd_cs4231_pcm_free(snd_pcm_t *pcm)
1543 {
1544         cs4231_t *chip = pcm->private_data;
1545         chip->pcm = NULL;
1546         snd_pcm_lib_preallocate_free_for_all(pcm);
1547 }
1548
1549 int snd_cs4231_pcm(cs4231_t *chip)
1550 {
1551         snd_pcm_t *pcm;
1552         int err;
1553
1554         if ((err = snd_pcm_new(chip->card, "CS4231", 0, 1, 1, &pcm)) < 0)
1555                 return err;
1556
1557         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs4231_playback_ops);
1558         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cs4231_capture_ops);
1559
1560         /* global setup */
1561         pcm->private_data = chip;
1562         pcm->private_free = snd_cs4231_pcm_free;
1563         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1564         strcpy(pcm->name, "CS4231");
1565
1566 #ifdef EBUS_SUPPORT
1567         if (chip->flags & CS4231_FLAG_EBUS) {
1568                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1569                                                       snd_dma_pci_data(chip->dev_u.pdev),
1570                                                       64*1024, 128*1024);
1571         } else {
1572 #endif
1573 #ifdef SBUS_SUPPORT
1574                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_SBUS,
1575                                                       snd_dma_sbus_data(chip->dev_u.sdev),
1576                                                       64*1024, 128*1024);
1577 #endif
1578 #ifdef EBUS_SUPPORT
1579         }
1580 #endif
1581
1582         chip->pcm = pcm;
1583
1584         return 0;
1585 }
1586
1587 static void snd_cs4231_timer_free(snd_timer_t *timer)
1588 {
1589         cs4231_t *chip = timer->private_data;
1590         chip->timer = NULL;
1591 }
1592
1593 int snd_cs4231_timer(cs4231_t *chip)
1594 {
1595         snd_timer_t *timer;
1596         snd_timer_id_t tid;
1597         int err;
1598
1599         /* Timer initialization */
1600         tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1601         tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1602         tid.card = chip->card->number;
1603         tid.device = 0;
1604         tid.subdevice = 0;
1605         if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0)
1606                 return err;
1607         strcpy(timer->name, "CS4231");
1608         timer->private_data = chip;
1609         timer->private_free = snd_cs4231_timer_free;
1610         timer->hw = snd_cs4231_timer_table;
1611         chip->timer = timer;
1612
1613         return 0;
1614 }
1615
1616 /*
1617  *  MIXER part
1618  */
1619
1620 static int snd_cs4231_info_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1621 {
1622         static char *texts[4] = {
1623                 "Line", "CD", "Mic", "Mix"
1624         };
1625         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1626
1627         snd_assert(chip->card != NULL, return -EINVAL);
1628         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1629         uinfo->count = 2;
1630         uinfo->value.enumerated.items = 4;
1631         if (uinfo->value.enumerated.item > 3)
1632                 uinfo->value.enumerated.item = 3;
1633         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1634
1635         return 0;
1636 }
1637
1638 static int snd_cs4231_get_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1639 {
1640         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1641         unsigned long flags;
1642
1643         spin_lock_irqsave(&chip->lock, flags);
1644         ucontrol->value.enumerated.item[0] =
1645                 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1646         ucontrol->value.enumerated.item[1] =
1647                 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1648         spin_unlock_irqrestore(&chip->lock, flags);
1649
1650         return 0;
1651 }
1652
1653 static int snd_cs4231_put_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1654 {
1655         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1656         unsigned long flags;
1657         unsigned short left, right;
1658         int change;
1659
1660         if (ucontrol->value.enumerated.item[0] > 3 ||
1661             ucontrol->value.enumerated.item[1] > 3)
1662                 return -EINVAL;
1663         left = ucontrol->value.enumerated.item[0] << 6;
1664         right = ucontrol->value.enumerated.item[1] << 6;
1665
1666         spin_lock_irqsave(&chip->lock, flags);
1667
1668         left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1669         right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1670         change = left != chip->image[CS4231_LEFT_INPUT] ||
1671                  right != chip->image[CS4231_RIGHT_INPUT];
1672         snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1673         snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1674
1675         spin_unlock_irqrestore(&chip->lock, flags);
1676
1677         return change;
1678 }
1679
1680 int snd_cs4231_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1681 {
1682         int mask = (kcontrol->private_value >> 16) & 0xff;
1683
1684         uinfo->type = (mask == 1) ?
1685                 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1686         uinfo->count = 1;
1687         uinfo->value.integer.min = 0;
1688         uinfo->value.integer.max = mask;
1689
1690         return 0;
1691 }
1692
1693 int snd_cs4231_get_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1694 {
1695         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1696         unsigned long flags;
1697         int reg = kcontrol->private_value & 0xff;
1698         int shift = (kcontrol->private_value >> 8) & 0xff;
1699         int mask = (kcontrol->private_value >> 16) & 0xff;
1700         int invert = (kcontrol->private_value >> 24) & 0xff;
1701
1702         spin_lock_irqsave(&chip->lock, flags);
1703
1704         ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1705
1706         spin_unlock_irqrestore(&chip->lock, flags);
1707
1708         if (invert)
1709                 ucontrol->value.integer.value[0] =
1710                         (mask - ucontrol->value.integer.value[0]);
1711
1712         return 0;
1713 }
1714
1715 int snd_cs4231_put_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1716 {
1717         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1718         unsigned long flags;
1719         int reg = kcontrol->private_value & 0xff;
1720         int shift = (kcontrol->private_value >> 8) & 0xff;
1721         int mask = (kcontrol->private_value >> 16) & 0xff;
1722         int invert = (kcontrol->private_value >> 24) & 0xff;
1723         int change;
1724         unsigned short val;
1725
1726         val = (ucontrol->value.integer.value[0] & mask);
1727         if (invert)
1728                 val = mask - val;
1729         val <<= shift;
1730
1731         spin_lock_irqsave(&chip->lock, flags);
1732
1733         val = (chip->image[reg] & ~(mask << shift)) | val;
1734         change = val != chip->image[reg];
1735         snd_cs4231_out(chip, reg, val);
1736
1737         spin_unlock_irqrestore(&chip->lock, flags);
1738
1739         return change;
1740 }
1741
1742 int snd_cs4231_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
1743 {
1744         int mask = (kcontrol->private_value >> 24) & 0xff;
1745
1746         uinfo->type = mask == 1 ?
1747                 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1748         uinfo->count = 2;
1749         uinfo->value.integer.min = 0;
1750         uinfo->value.integer.max = mask;
1751
1752         return 0;
1753 }
1754
1755 int snd_cs4231_get_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1756 {
1757         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1758         unsigned long flags;
1759         int left_reg = kcontrol->private_value & 0xff;
1760         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1761         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1762         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1763         int mask = (kcontrol->private_value >> 24) & 0xff;
1764         int invert = (kcontrol->private_value >> 22) & 1;
1765
1766         spin_lock_irqsave(&chip->lock, flags);
1767
1768         ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1769         ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1770
1771         spin_unlock_irqrestore(&chip->lock, flags);
1772
1773         if (invert) {
1774                 ucontrol->value.integer.value[0] =
1775                         (mask - ucontrol->value.integer.value[0]);
1776                 ucontrol->value.integer.value[1] =
1777                         (mask - ucontrol->value.integer.value[1]);
1778         }
1779
1780         return 0;
1781 }
1782
1783 int snd_cs4231_put_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
1784 {
1785         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1786         unsigned long flags;
1787         int left_reg = kcontrol->private_value & 0xff;
1788         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1789         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1790         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1791         int mask = (kcontrol->private_value >> 24) & 0xff;
1792         int invert = (kcontrol->private_value >> 22) & 1;
1793         int change;
1794         unsigned short val1, val2;
1795
1796         val1 = ucontrol->value.integer.value[0] & mask;
1797         val2 = ucontrol->value.integer.value[1] & mask;
1798         if (invert) {
1799                 val1 = mask - val1;
1800                 val2 = mask - val2;
1801         }
1802         val1 <<= shift_left;
1803         val2 <<= shift_right;
1804
1805         spin_lock_irqsave(&chip->lock, flags);
1806
1807         val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1808         val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1809         change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1810         snd_cs4231_out(chip, left_reg, val1);
1811         snd_cs4231_out(chip, right_reg, val2);
1812
1813         spin_unlock_irqrestore(&chip->lock, flags);
1814
1815         return change;
1816 }
1817
1818 #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1819 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1820   .info = snd_cs4231_info_single, \
1821   .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1822   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1823
1824 #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1825 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1826   .info = snd_cs4231_info_double, \
1827   .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1828   .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1829
1830 static snd_kcontrol_new_t snd_cs4231_controls[] = {
1831 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1832 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1833 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1834 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1835 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1836 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1837 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1838 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1839 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1840 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1841 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1842 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1843 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
1844 {
1845         .iface  = SNDRV_CTL_ELEM_IFACE_MIXER,
1846         .name   = "Capture Source",
1847         .info   = snd_cs4231_info_mux,
1848         .get    = snd_cs4231_get_mux,
1849         .put    = snd_cs4231_put_mux,
1850 },
1851 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1, 0),
1852 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1853 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1854 /* SPARC specific uses of XCTL{0,1} general purpose outputs.  */
1855 CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1856 CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1857 };
1858
1859 int snd_cs4231_mixer(cs4231_t *chip)
1860 {
1861         snd_card_t *card;
1862         int err, idx;
1863
1864         snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1865
1866         card = chip->card;
1867
1868         strcpy(card->mixername, chip->pcm->name);
1869
1870         for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1871                 if ((err = snd_ctl_add(card,
1872                                        snd_ctl_new1(&snd_cs4231_controls[idx],
1873                                                     chip))) < 0)
1874                         return err;
1875         }
1876         return 0;
1877 }
1878
1879 static int dev;
1880
1881 static int cs4231_attach_begin(snd_card_t **rcard)
1882 {
1883         snd_card_t *card;
1884
1885         *rcard = NULL;
1886
1887         if (dev >= SNDRV_CARDS)
1888                 return -ENODEV;
1889
1890         if (!enable[dev]) {
1891                 dev++;
1892                 return -ENOENT;
1893         }
1894
1895         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1896         if (card == NULL)
1897                 return -ENOMEM;
1898
1899         strcpy(card->driver, "CS4231");
1900         strcpy(card->shortname, "Sun CS4231");
1901
1902         *rcard = card;
1903         return 0;
1904 }
1905
1906 static int cs4231_attach_finish(snd_card_t *card, cs4231_t *chip)
1907 {
1908         int err;
1909
1910         if ((err = snd_cs4231_pcm(chip)) < 0)
1911                 goto out_err;
1912
1913         if ((err = snd_cs4231_mixer(chip)) < 0)
1914                 goto out_err;
1915
1916         if ((err = snd_cs4231_timer(chip)) < 0)
1917                 goto out_err;
1918
1919         if ((err = snd_card_register(card)) < 0)
1920                 goto out_err;
1921
1922         chip->next = cs4231_list;
1923         cs4231_list = chip;
1924
1925         dev++;
1926         return 0;
1927
1928 out_err:
1929         snd_card_free(card);
1930         return err;
1931 }
1932
1933 #ifdef SBUS_SUPPORT
1934 static int snd_cs4231_sbus_free(cs4231_t *chip)
1935 {
1936         if (chip->irq[0])
1937                 free_irq(chip->irq[0], chip);
1938
1939         if (chip->port)
1940                 sbus_iounmap(chip->port, chip->regs_size);
1941
1942         if (chip->timer)
1943                 snd_device_free(chip->card, chip->timer);
1944
1945         kfree(chip);
1946
1947         return 0;
1948 }
1949
1950 static int snd_cs4231_sbus_dev_free(snd_device_t *device)
1951 {
1952         cs4231_t *cp = device->device_data;
1953
1954         return snd_cs4231_sbus_free(cp);
1955 }
1956
1957 static snd_device_ops_t snd_cs4231_sbus_dev_ops = {
1958         .dev_free       =       snd_cs4231_sbus_dev_free,
1959 };
1960
1961 static int __init snd_cs4231_sbus_create(snd_card_t *card,
1962                                          struct sbus_dev *sdev,
1963                                          int dev,
1964                                          cs4231_t **rchip)
1965 {
1966         cs4231_t *chip;
1967         int err;
1968
1969         *rchip = NULL;
1970         chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1971         if (chip == NULL)
1972                 return -ENOMEM;
1973
1974         spin_lock_init(&chip->lock);
1975         init_MUTEX(&chip->mce_mutex);
1976         init_MUTEX(&chip->open_mutex);
1977         chip->card = card;
1978         chip->dev_u.sdev = sdev;
1979         chip->regs_size = sdev->reg_addrs[0].reg_size;
1980         memcpy(&chip->image, &snd_cs4231_original_image,
1981                sizeof(snd_cs4231_original_image));
1982
1983         chip->port = sbus_ioremap(&sdev->resource[0], 0,
1984                                   chip->regs_size, "cs4231");
1985         if (!chip->port) {
1986                 snd_printk("cs4231-%d: Unable to map chip registers.\n", dev);
1987                 return -EIO;
1988         }
1989
1990         if (request_irq(sdev->irqs[0], snd_cs4231_sbus_interrupt,
1991                         SA_SHIRQ, "cs4231", chip)) {
1992                 snd_printk("cs4231-%d: Unable to grab SBUS IRQ %s\n",
1993                            dev,
1994                            __irq_itoa(sdev->irqs[0]));
1995                 snd_cs4231_sbus_free(chip);
1996                 return -EBUSY;
1997         }
1998         chip->irq[0] = sdev->irqs[0];
1999
2000         if (snd_cs4231_probe(chip) < 0) {
2001                 snd_cs4231_sbus_free(chip);
2002                 return -ENODEV;
2003         }
2004         snd_cs4231_init(chip);
2005
2006         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2007                                   chip, &snd_cs4231_sbus_dev_ops)) < 0) {
2008                 snd_cs4231_sbus_free(chip);
2009                 return err;
2010         }
2011
2012         *rchip = chip;
2013         return 0;
2014 }
2015
2016 static int cs4231_sbus_attach(struct sbus_dev *sdev)
2017 {
2018         struct resource *rp = &sdev->resource[0];
2019         cs4231_t *cp;
2020         snd_card_t *card;
2021         int err;
2022
2023         err = cs4231_attach_begin(&card);
2024         if (err)
2025                 return err;
2026
2027         sprintf(card->longname, "%s at 0x%02lx:0x%08lx, irq %s",
2028                 card->shortname,
2029                 rp->flags & 0xffL,
2030                 rp->start,
2031                 __irq_itoa(sdev->irqs[0]));
2032
2033         if ((err = snd_cs4231_sbus_create(card, sdev, dev, &cp)) < 0) {
2034                 snd_card_free(card);
2035                 return err;
2036         }
2037
2038         return cs4231_attach_finish(card, cp);
2039 }
2040 #endif
2041
2042 #ifdef EBUS_SUPPORT
2043 static int snd_cs4231_ebus_free(cs4231_t *chip)
2044 {
2045         if (chip->eb2c.regs) {
2046                 ebus_dma_unregister(&chip->eb2c);
2047                 iounmap(chip->eb2c.regs);
2048         }
2049         if (chip->eb2p.regs) {
2050                 ebus_dma_unregister(&chip->eb2p);
2051                 iounmap(chip->eb2p.regs);
2052         }
2053
2054         if (chip->port)
2055                 iounmap(chip->port);
2056         if (chip->timer)
2057                 snd_device_free(chip->card, chip->timer);
2058
2059         kfree(chip);
2060
2061         return 0;
2062 }
2063
2064 static int snd_cs4231_ebus_dev_free(snd_device_t *device)
2065 {
2066         cs4231_t *cp = device->device_data;
2067
2068         return snd_cs4231_ebus_free(cp);
2069 }
2070
2071 static snd_device_ops_t snd_cs4231_ebus_dev_ops = {
2072         .dev_free       =       snd_cs4231_ebus_dev_free,
2073 };
2074
2075 static int __init snd_cs4231_ebus_create(snd_card_t *card,
2076                                          struct linux_ebus_device *edev,
2077                                          int dev,
2078                                          cs4231_t **rchip)
2079 {
2080         cs4231_t *chip;
2081         int err;
2082
2083         *rchip = NULL;
2084         chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
2085         if (chip == NULL)
2086                 return -ENOMEM;
2087
2088         spin_lock_init(&chip->lock);
2089         spin_lock_init(&chip->eb2c.lock);
2090         spin_lock_init(&chip->eb2p.lock);
2091         init_MUTEX(&chip->mce_mutex);
2092         init_MUTEX(&chip->open_mutex);
2093         chip->flags |= CS4231_FLAG_EBUS;
2094         chip->card = card;
2095         chip->dev_u.pdev = edev->bus->self;
2096         memcpy(&chip->image, &snd_cs4231_original_image,
2097                sizeof(snd_cs4231_original_image));
2098         strcpy(chip->eb2c.name, "cs4231(capture)");
2099         chip->eb2c.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2100         chip->eb2c.callback = snd_cs4231_ebus_capture_callback;
2101         chip->eb2c.client_cookie = chip;
2102         chip->eb2c.irq = edev->irqs[0];
2103         strcpy(chip->eb2p.name, "cs4231(play)");
2104         chip->eb2p.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2105         chip->eb2p.callback = snd_cs4231_ebus_play_callback;
2106         chip->eb2p.client_cookie = chip;
2107         chip->eb2p.irq = edev->irqs[1];
2108
2109         chip->port = ioremap(edev->resource[0].start, 0x10);
2110         chip->eb2p.regs = ioremap(edev->resource[1].start, 0x10);
2111         chip->eb2c.regs = ioremap(edev->resource[2].start, 0x10);
2112         if (!chip->port || !chip->eb2p.regs || !chip->eb2c.regs) {
2113                 snd_cs4231_ebus_free(chip);
2114                 snd_printk("cs4231-%d: Unable to map chip registers.\n", dev);
2115                 return -EIO;
2116         }
2117
2118         if (ebus_dma_register(&chip->eb2c)) {
2119                 snd_cs4231_ebus_free(chip);
2120                 snd_printk("cs4231-%d: Unable to register EBUS capture DMA\n", dev);
2121                 return -EBUSY;
2122         }
2123         if (ebus_dma_irq_enable(&chip->eb2c, 1)) {
2124                 snd_cs4231_ebus_free(chip);
2125                 snd_printk("cs4231-%d: Unable to enable EBUS capture IRQ\n", dev);
2126                 return -EBUSY;
2127         }
2128
2129         if (ebus_dma_register(&chip->eb2p)) {
2130                 snd_cs4231_ebus_free(chip);
2131                 snd_printk("cs4231-%d: Unable to register EBUS play DMA\n", dev);
2132                 return -EBUSY;
2133         }
2134         if (ebus_dma_irq_enable(&chip->eb2p, 1)) {
2135                 snd_cs4231_ebus_free(chip);
2136                 snd_printk("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2137                 return -EBUSY;
2138         }
2139
2140         if (snd_cs4231_probe(chip) < 0) {
2141                 snd_cs4231_ebus_free(chip);
2142                 return -ENODEV;
2143         }
2144         snd_cs4231_init(chip);
2145
2146         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2147                                   chip, &snd_cs4231_ebus_dev_ops)) < 0) {
2148                 snd_cs4231_ebus_free(chip);
2149                 return err;
2150         }
2151
2152         *rchip = chip;
2153         return 0;
2154 }
2155
2156 static int cs4231_ebus_attach(struct linux_ebus_device *edev)
2157 {
2158         snd_card_t *card;
2159         cs4231_t *chip;
2160         int err;
2161
2162         err = cs4231_attach_begin(&card);
2163         if (err)
2164                 return err;
2165
2166         sprintf(card->longname, "%s at 0x%lx, irq %s",
2167                 card->shortname,
2168                 edev->resource[0].start,
2169                 __irq_itoa(edev->irqs[0]));
2170
2171         if ((err = snd_cs4231_ebus_create(card, edev, dev, &chip)) < 0) {
2172                 snd_card_free(card);
2173                 return err;
2174         }
2175
2176         return cs4231_attach_finish(card, chip);
2177 }
2178 #endif
2179
2180 static int __init cs4231_init(void)
2181 {
2182 #ifdef SBUS_SUPPORT
2183         struct sbus_bus *sbus;
2184         struct sbus_dev *sdev;
2185 #endif
2186 #ifdef EBUS_SUPPORT
2187         struct linux_ebus *ebus;
2188         struct linux_ebus_device *edev;
2189 #endif
2190         int found;
2191
2192         found = 0;
2193
2194 #ifdef SBUS_SUPPORT
2195         for_all_sbusdev(sdev, sbus) {
2196                 if (!strcmp(sdev->prom_name, "SUNW,CS4231")) {
2197                         if (cs4231_sbus_attach(sdev) == 0)
2198                                 found++;
2199                 }
2200         }
2201 #endif
2202 #ifdef EBUS_SUPPORT
2203         for_each_ebus(ebus) {
2204                 for_each_ebusdev(edev, ebus) {
2205                         int match = 0;
2206
2207                         if (!strcmp(edev->prom_name, "SUNW,CS4231")) {
2208                                 match = 1;
2209                         } else if (!strcmp(edev->prom_name, "audio")) {
2210                                 char compat[16];
2211
2212                                 prom_getstring(edev->prom_node, "compatible",
2213                                                compat, sizeof(compat));
2214                                 compat[15] = '\0';
2215                                 if (!strcmp(compat, "SUNW,CS4231"))
2216                                         match = 1;
2217                         }
2218
2219                         if (match &&
2220                             cs4231_ebus_attach(edev) == 0)
2221                                 found++;
2222                 }
2223         }
2224 #endif
2225
2226
2227         return (found > 0) ? 0 : -EIO;
2228 }
2229
2230 static void __exit cs4231_exit(void)
2231 {
2232         cs4231_t *p = cs4231_list;
2233
2234         while (p != NULL) {
2235                 cs4231_t *next = p->next;
2236
2237                 snd_card_free(p->card);
2238
2239                 p = next;
2240         }
2241
2242         cs4231_list = NULL;
2243 }
2244
2245 module_init(cs4231_init);
2246 module_exit(cs4231_exit);