register int bcpu = boot_cpuid;
#ifdef CONFIG_SMP
- register unsigned long cpm = cpu_present_mask;
+ cpumask_t cpm = cpu_present_mask;
volatile unsigned long *dim0, *dim1, *dim2, *dim3;
unsigned long mask0, mask1, mask2, mask3, dummy;
dim1 = &cchip->dim1.csr;
dim2 = &cchip->dim2.csr;
dim3 = &cchip->dim3.csr;
- if ((cpm & 1) == 0) dim0 = &dummy;
- if ((cpm & 2) == 0) dim1 = &dummy;
- if ((cpm & 4) == 0) dim2 = &dummy;
- if ((cpm & 8) == 0) dim3 = &dummy;
+ if (!cpu_isset(0, cpm)) dim0 = &dummy;
+ if (!cpu_isset(1, cpm)) dim1 = &dummy;
+ if (!cpu_isset(2, cpm)) dim2 = &dummy;
+ if (!cpu_isset(3, cpm)) dim3 = &dummy;
*dim0 = mask0;
*dim1 = mask1;
}
static void
-titan_cpu_set_irq_affinity(unsigned int irq, unsigned long affinity)
+titan_cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity)
{
int cpu;
for (cpu = 0; cpu < 4; cpu++) {
- if (affinity & (1UL << cpu))
+ if (cpu_isset(cpu, affinity))
titan_cpu_irq_affinity[cpu] |= 1UL << irq;
else
titan_cpu_irq_affinity[cpu] &= ~(1UL << irq);
}
static void
-titan_set_irq_affinity(unsigned int irq, unsigned long affinity)
+titan_set_irq_affinity(unsigned int irq, cpumask_t affinity)
{
spin_lock(&titan_irq_lock);
titan_cpu_set_irq_affinity(irq - 16, affinity);
DO_EV6_MMU,
DO_DEFAULT_RTC,
DO_TITAN_IO,
- DO_TITAN_BUS,
.machine_check = titan_machine_check,
.max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
DO_EV6_MMU,
DO_DEFAULT_RTC,
DO_TITAN_IO,
- DO_TITAN_BUS,
.machine_check = privateer_machine_check,
.max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,