.type __xscale_setup, #function
__xscale_setup:
- mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
- msr cpsr_c, r0
mcr p15, 0, ip, c7, c7, 0 @ invalidate I, D caches & BTB
mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer
mcr p15, 0, ip, c8, c7, 0 @ invalidate I, D TLBs
- mcr p15, 0, r4, c2, c0, 0 @ load page table pointer
- mov r0, #0x1f @ Domains 0, 1 = client
- mcr p15, 0, r0, c3, c0, 0 @ load domain access register
#ifdef CONFIG_IWMMXT
mov r0, #0 @ initially disallow access to CP0/CP1
#else
orr r0, r0, #1 << 13 @ Its undefined whether this
mcr p15, 0, r0, c15, c1, 0 @ affects USR or SVC modes
mrc p15, 0, r0, c1, c0, 0 @ get control register
- bic r0, r0, #0x0200 @ .... ..R. .... ....
- bic r0, r0, #0x0002 @ .... .... .... ..A.
- orr r0, r0, #0x0005 @ .... .... .... .C.M
- orr r0, r0, #0x3900 @ ..VI Z..S .... ....
+ ldr r5, xscale_cr1_clear
+ bic r0, r0, r5
+ ldr r5, xscale_cr1_set
+ orr r0, r0, r5
mov pc, lr
.size __xscale_setup, . - __xscale_setup
+ /*
+ * R
+ * .RVI ZFRS BLDP WCAM
+ * ..11 1.01 .... .101
+ *
+ */
+ .type xscale_cr1_clear, #object
+ .type xscale_cr1_set, #object
+xscale_cr1_clear:
+ .word 0x3b07
+xscale_cr1_set:
+ .word 0x3905
+
__INITDATA
/*
.asciz "XScale-IXP42x Family"
.size cpu_ixp42x_name, . - cpu_ixp42x_name
+ .type cpu_ixp46x_name, #object
+cpu_ixp46x_name:
+ .asciz "XScale-IXP46x Family"
+ .size cpu_ixp46x_name, . - cpu_ixp46x_name
+
.type cpu_ixp2400_name, #object
cpu_ixp2400_name:
.asciz "XScale-IXP2400"
__80200_proc_info:
.long 0x69052000
.long 0xfffffff0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
__8032x_proc_info:
.long 0x69052420
.long 0xfffff5e0 @ mask should accomodate IOP80219 also
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
.type __8033x_proc_info,#object
__8033x_proc_info:
- .long 0x69054090
- .long 0xffffffb0
- .long 0x00000c0e
+ .long 0x69054010
+ .long 0xffffff30
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
__pxa250_proc_info:
.long 0x69052100
.long 0xfffff7f0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
__pxa210_proc_info:
.long 0x69052120
.long 0xfffff3f0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
__ixp2400_proc_info:
.long 0x69054190
.long 0xfffffff0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
__ixp2800_proc_info:
.long 0x690541a0
.long 0xfffffff0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
__ixp42x_proc_info:
.long 0x690541c0
.long 0xffffffc0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
.long xscale_cache_fns
.size __ixp42x_proc_info, . - __ixp42x_proc_info
+ .type __ixp46x_proc_info, #object
+__ixp46x_proc_info:
+ .long 0x69054200
+ .long 0xffffff00
+ .long 0x00000c0e
+ b __xscale_setup
+ .long cpu_arch_name
+ .long cpu_elf_name
+ .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
+ .long cpu_ixp46x_name
+ .long xscale_processor_functions
+ .long v4wbi_tlb_fns
+ .long xscale_mc_user_fns
+ .long xscale_cache_fns
+ .size __ixp46x_proc_info, . - __ixp46x_proc_info
+
.type __pxa255_proc_info,#object
__pxa255_proc_info:
.long 0x69052d00
.long 0xfffffff0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
__pxa270_proc_info:
.long 0x69054110
.long 0xfffffff0
- .long 0x00000c0e
+ .long PMD_TYPE_SECT | \
+ PMD_SECT_BUFFERABLE | \
+ PMD_SECT_CACHEABLE | \
+ PMD_SECT_AP_WRITE | \
+ PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name