/*
- * arch/ppc/platforms/85xx/stx_gp3.c
- *
* STx GP3 board specific routines
*
* Dan Malek <dan@embeddededge.com>
* option) any later version.
*/
-#include <linux/config.h>
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/init.h>
mdata->irq[2] = MPC85xx_IRQ_EXT5;
mdata->irq[4] = MPC85xx_IRQ_EXT5;
- mdata->irq[31] = -1;
+ mdata->irq[31] = PHY_POLL;
/* setup the board related information for the enet controllers */
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
printk ("bi_immr_base = %8.8lx\n", binfo->bi_immr_base);
}
-static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t cpm2_cascade(int irq, void *dev_id)
{
- while ((irq = cpm2_get_irq(regs)) >= 0)
- __do_IRQ(irq, regs);
+ while ((irq = cpm2_get_irq()) >= 0)
+ __do_IRQ(irq);
return IRQ_HANDLED;
}
static struct irqaction cpm2_irqaction = {
.handler = cpm2_cascade,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.mask = CPU_MASK_NONE,
.name = "cpm2_cascade",
};