+
/*
+ * arch/ppc/platforms/hdpu_setup.c
+ *
* Board setup routines for the Sky Computers HDPU Compute Blade.
*
* Written by Brian Waite <waite@skycomputers.com>
* option) any later version.
*/
+#include <linux/config.h>
#include <linux/pci.h>
#include <linux/delay.h>
struct mv643xx_eth_platform_data *eth_pd;
eth_pd = pd->dev.platform_data;
+ eth_pd->port_serial_control =
+ mv64x60_read(&bh, MV643XX_ETH_PORT_SERIAL_CONTROL_REG(pd->id) & ~1);
+
eth_pd->force_phy_addr = 1;
eth_pd->phy_addr = pd->id;
- eth_pd->speed = SPEED_100;
- eth_pd->duplex = DUPLEX_FULL;
eth_pd->tx_queue_size = 400;
eth_pd->rx_queue_size = 800;
}
}
#endif
-static int hdpu_platform_notify(struct device *dev)
+static int __init hdpu_platform_notify(struct device *dev)
{
static struct {
char *bus_id;
mv64x60_write(&bh, MV64360_CPU0_DOORBELL_CLR, 0xff);
mv64x60_write(&bh, MV64360_CPU0_DOORBELL_MASK, 0xff);
request_irq(60, hdpu_smp_cpu0_int_handler,
- IRQF_DISABLED, hdpu_smp0, 0);
+ SA_INTERRUPT, hdpu_smp0, 0);
}
if (cpu_nr == 1) {
mv64x60_write(&bh, MV64360_CPU1_DOORBELL_CLR, 0x0);
mv64x60_write(&bh, MV64360_CPU1_DOORBELL_MASK, 0xff);
request_irq(28, hdpu_smp_cpu1_int_handler,
- IRQF_DISABLED, hdpu_smp1, 0);
+ SA_INTERRUPT, hdpu_smp1, 0);
}
}