/*
- * arch/ppc/kernel/mv64360_pic.c
- *
* Interrupt controller support for Marvell's MV64360.
*
* Author: Rabeeh Khoury <rabeeh@galileo.co.il>
static void mv64360_unmask_irq(unsigned int);
static void mv64360_mask_irq(unsigned int);
-static irqreturn_t mv64360_cpu_error_int_handler(int, void *, struct pt_regs *);
-static irqreturn_t mv64360_sram_error_int_handler(int, void *,
- struct pt_regs *);
-static irqreturn_t mv64360_pci_error_int_handler(int, void *, struct pt_regs *);
+static irqreturn_t mv64360_cpu_error_int_handler(int, void *);
+static irqreturn_t mv64360_sram_error_int_handler(int, void *);
+static irqreturn_t mv64360_pci_error_int_handler(int, void *);
/* ========================== local declarations =========================== */
/* All interrupts are level interrupts */
for (i = mv64360_irq_base; i < (mv64360_irq_base + 96); i++) {
irq_desc[i].status |= IRQ_LEVEL;
- irq_desc[i].handler = &mv64360_pic;
+ irq_desc[i].chip = &mv64360_pic;
}
if (ppc_md.progress)
* This function returns the lowest interrupt number of all interrupts that
* are currently asserted.
*
- * Input Variable(s):
- * struct pt_regs* not used
- *
* Output Variable(s):
* None.
*
*
*/
int
-mv64360_get_irq(struct pt_regs *regs)
+mv64360_get_irq(void)
{
int irq;
int irq_gpp;
}
static irqreturn_t
-mv64360_cpu_error_int_handler(int irq, void *dev_id, struct pt_regs *regs)
+mv64360_cpu_error_int_handler(int irq, void *dev_id)
{
printk(KERN_ERR "mv64360_cpu_error_int_handler: %s 0x%08x\n",
"Error on CPU interface - Cause regiser",
}
static irqreturn_t
-mv64360_sram_error_int_handler(int irq, void *dev_id, struct pt_regs *regs)
+mv64360_sram_error_int_handler(int irq, void *dev_id)
{
printk(KERN_ERR "mv64360_sram_error_int_handler: %s 0x%08x\n",
"Error in internal SRAM - Cause register",
}
static irqreturn_t
-mv64360_pci_error_int_handler(int irq, void *dev_id, struct pt_regs *regs)
+mv64360_pci_error_int_handler(int irq, void *dev_id)
{
u32 val;
unsigned int pci_bus = (unsigned int)dev_id;
/* Clear old errors and register CPU interface error intr handler */
mv64x60_write(&bh, MV64x60_CPU_ERR_CAUSE, 0);
if ((rc = request_irq(MV64x60_IRQ_CPU_ERR + mv64360_irq_base,
- mv64360_cpu_error_int_handler, SA_INTERRUPT, CPU_INTR_STR, 0)))
+ mv64360_cpu_error_int_handler, IRQF_DISABLED, CPU_INTR_STR, NULL)))
printk(KERN_WARNING "Can't register cpu error handler: %d", rc);
mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0);
/* Clear old errors and register internal SRAM error intr handler */
mv64x60_write(&bh, MV64360_SRAM_ERR_CAUSE, 0);
if ((rc = request_irq(MV64360_IRQ_SRAM_PAR_ERR + mv64360_irq_base,
- mv64360_sram_error_int_handler,SA_INTERRUPT,SRAM_INTR_STR, 0)))
+ mv64360_sram_error_int_handler,IRQF_DISABLED,SRAM_INTR_STR, NULL)))
printk(KERN_WARNING "Can't register SRAM error handler: %d",rc);
/* Clear old errors and register PCI 0 error intr handler */
mv64x60_write(&bh, MV64x60_PCI0_ERR_CAUSE, 0);
if ((rc = request_irq(MV64360_IRQ_PCI0 + mv64360_irq_base,
mv64360_pci_error_int_handler,
- SA_INTERRUPT, PCI0_INTR_STR, (void *)0)))
+ IRQF_DISABLED, PCI0_INTR_STR, (void *)0)))
printk(KERN_WARNING "Can't register pci 0 error handler: %d",
rc);
mv64x60_write(&bh, MV64x60_PCI1_ERR_CAUSE, 0);
if ((rc = request_irq(MV64360_IRQ_PCI1 + mv64360_irq_base,
mv64360_pci_error_int_handler,
- SA_INTERRUPT, PCI1_INTR_STR, (void *)1)))
+ IRQF_DISABLED, PCI1_INTR_STR, (void *)1)))
printk(KERN_WARNING "Can't register pci 1 error handler: %d",
rc);