#include <linux/skbuff.h>
#include <linux/if_arp.h>
#include <linux/ioport.h>
+#include <linux/bitops.h>
#include <pcmcia/version.h>
#include <pcmcia/cs_types.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/system.h>
-#include <asm/bitops.h>
/* ----------------------------------------------------------------------------
Defines
MODULE_DESCRIPTION("New Media PCMCIA ethernet driver");
MODULE_LICENSE("GPL");
-#define INT_MODULE_PARM(n, v) static int n = v; MODULE_PARM(n, "i")
-
-static int irq_list[4] = { -1 };
-MODULE_PARM(irq_list, "1-4i");
+#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
/* 0=auto, 1=10baseT, 2 = 10base2, default=auto */
INT_MODULE_PARM(if_port, 0);
-/* Bit map of interrupts to choose from */
-INT_MODULE_PARM(irq_mask, 0xdeb8);
#ifdef PCMCIA_DEBUG
INT_MODULE_PARM(pc_debug, PCMCIA_DEBUG);
dev_link_t *link;
struct net_device *dev;
client_reg_t client_reg;
- int i, ret;
+ int ret;
DEBUG(0, "nmclan_attach()\n");
DEBUG(1, "%s\n", rcsid);
link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
link->io.IOAddrLines = 5;
link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
- link->irq.IRQInfo1 = IRQ_INFO2_VALID|IRQ_LEVEL_ID;
- if (irq_list[0] == -1)
- link->irq.IRQInfo2 = irq_mask;
- else
- for (i = 0; i < 4; i++)
- link->irq.IRQInfo2 |= 1 << irq_list[i];
+ link->irq.IRQInfo1 = IRQ_LEVEL_ID;
link->irq.Handler = &mace_interrupt;
link->irq.Instance = dev;
link->conf.Attributes = CONF_ENABLE_IRQ;
link->next = dev_list;
dev_list = link;
client_reg.dev_info = &dev_info;
- client_reg.Attributes = INFO_IO_CLIENT | INFO_CARD_SHARE;
client_reg.EventMask =
CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL |
CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET |
assuming that during normal operation, the MACE is always in
bank 0.
---------------------------------------------------------------------------- */
-static int mace_read(mace_private *lp, ioaddr_t ioaddr, int reg)
+static int mace_read(mace_private *lp, kio_addr_t ioaddr, int reg)
{
int data = 0xFF;
unsigned long flags;
are assuming that during normal operation, the MACE is always in
bank 0.
---------------------------------------------------------------------------- */
-static void mace_write(mace_private *lp, ioaddr_t ioaddr, int reg, int data)
+static void mace_write(mace_private *lp, kio_addr_t ioaddr, int reg, int data)
{
unsigned long flags;
mace_init
Resets the MACE chip.
---------------------------------------------------------------------------- */
-static int mace_init(mace_private *lp, ioaddr_t ioaddr, char *enet_addr)
+static int mace_init(mace_private *lp, kio_addr_t ioaddr, char *enet_addr)
{
int i;
int ct = 0;
cisparse_t parse;
u_char buf[64];
int i, last_ret, last_fn;
- ioaddr_t ioaddr;
+ kio_addr_t ioaddr;
DEBUG(0, "nmclan_config(0x%p)\n", link);
link->dev = &lp->node;
link->state &= ~DEV_CONFIG_PENDING;
+ SET_NETDEV_DEV(dev, &handle_to_dev(handle));
i = register_netdev(dev);
if (i != 0) {
---------------------------------------------------------------------------- */
static int mace_open(struct net_device *dev)
{
- ioaddr_t ioaddr = dev->base_addr;
+ kio_addr_t ioaddr = dev->base_addr;
mace_private *lp = netdev_priv(dev);
dev_link_t *link = &lp->link;
---------------------------------------------------------------------------- */
static int mace_close(struct net_device *dev)
{
- ioaddr_t ioaddr = dev->base_addr;
+ kio_addr_t ioaddr = dev->base_addr;
mace_private *lp = netdev_priv(dev);
dev_link_t *link = &lp->link;
static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
mace_private *lp = netdev_priv(dev);
- ioaddr_t ioaddr = dev->base_addr;
+ kio_addr_t ioaddr = dev->base_addr;
netif_stop_queue(dev);
{
struct net_device *dev = (struct net_device *) dev_id;
mace_private *lp = netdev_priv(dev);
- ioaddr_t ioaddr = dev->base_addr;
+ kio_addr_t ioaddr = dev->base_addr;
int status;
int IntrCnt = MACE_MAX_IR_ITERATIONS;
static int mace_rx(struct net_device *dev, unsigned char RxCnt)
{
mace_private *lp = netdev_priv(dev);
- ioaddr_t ioaddr = dev->base_addr;
+ kio_addr_t ioaddr = dev->base_addr;
unsigned char rx_framecnt;
unsigned short rx_status;
card's SRAM fast enough. If this happens, something is
seriously wrong with the hardware.
---------------------------------------------------------------------------- */
-static void update_stats(ioaddr_t ioaddr, struct net_device *dev)
+static void update_stats(kio_addr_t ioaddr, struct net_device *dev)
{
mace_private *lp = netdev_priv(dev);
mace_private *lp = netdev_priv(dev);
int num_addrs = lp->multicast_num_addrs;
int *ladrf = lp->multicast_ladrf;
- ioaddr_t ioaddr = dev->base_addr;
+ kio_addr_t ioaddr = dev->base_addr;
int i;
DEBUG(2, "%s: restoring Rx mode to %d addresses.\n",
static void restore_multicast_list(struct net_device *dev)
{
- ioaddr_t ioaddr = dev->base_addr;
+ kio_addr_t ioaddr = dev->base_addr;
mace_private *lp = netdev_priv(dev);
DEBUG(2, "%s: restoring Rx mode to %d addresses.\n", dev->name,
static void __exit exit_nmclan_cs(void)
{
pcmcia_unregister_driver(&nmclan_cs_driver);
- while (dev_list != NULL)
- nmclan_detach(dev_list);
+ BUG_ON(dev_list != NULL);
}
module_init(init_nmclan_cs);