+ struct platform_device *platdev;
+ int uart;
+
+ for (uart = 0; uart < no; uart++, cfg++) {
+ platdev = uart_devices[cfg->hwport];
+
+ s3c24xx_uart_devs[uart] = platdev;
+ platdev->dev.platform_data = cfg;
+ }
+
+ s3c2440_uart_count = uart;
+}
+
+/* s3c2440 specific clock sources */
+
+static struct clk s3c2440_clk_cam = {
+ .name = "camera",
+ .enable = s3c24xx_clkcon_enable,
+ .ctrlbit = S3C2440_CLKCON_CAMERA
+};
+
+static struct clk s3c2440_clk_ac97 = {
+ .name = "ac97",
+ .enable = s3c24xx_clkcon_enable,
+ .ctrlbit = S3C2440_CLKCON_CAMERA
+};
+
+#ifdef CONFIG_PM
+
+struct sleep_save s3c2440_sleep[] = {
+ SAVE_ITEM(S3C2440_DSC0),
+ SAVE_ITEM(S3C2440_DSC1),
+ SAVE_ITEM(S3C2440_GPJDAT),
+ SAVE_ITEM(S3C2440_GPJCON),
+ SAVE_ITEM(S3C2440_GPJUP)
+};
+
+static int s3c2440_suspend(struct sys_device *dev, u32 state)
+{
+ s3c2410_pm_do_save(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
+ return 0;
+}