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fedora core 6 1.2949 + vserver 2.2.0
[linux-2.6.git]
/
arch
/
arm
/
mach-s3c2410
/
s3c2442-clock.c
diff --git
a/arch/arm/mach-s3c2410/s3c2442-clock.c
b/arch/arm/mach-s3c2410/s3c2442-clock.c
index
d9f54b5
..
4e292ca
100644
(file)
--- a/
arch/arm/mach-s3c2410/s3c2442-clock.c
+++ b/
arch/arm/mach-s3c2410/s3c2442-clock.c
@@
-117,18
+117,18
@@
static int s3c2442_clk_add(struct sys_device *sysdev)
{
unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
unsigned long clkdivn;
{
unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
unsigned long clkdivn;
- struct clk *clk_h;
- struct clk *clk_p;
- struct clk *clk_upll;
+ struct clk *cl
oc
k_h;
+ struct clk *cl
oc
k_p;
+ struct clk *cl
oc
k_upll;
printk("S3C2442: Clock Support, DVS %s\n",
(camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
printk("S3C2442: Clock Support, DVS %s\n",
(camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
- clk_p = clk_get(NULL, "pclk");
- clk_h = clk_get(NULL, "hclk");
- clk_upll = clk_get(NULL, "upll");
+ cl
oc
k_p = clk_get(NULL, "pclk");
+ cl
oc
k_h = clk_get(NULL, "hclk");
+ cl
oc
k_upll = clk_get(NULL, "upll");
- if (IS_ERR(cl
k_p) || IS_ERR(clk_h) || IS_ERR(cl
k_upll)) {
+ if (IS_ERR(cl
ock_p) || IS_ERR(clock_h) || IS_ERR(cloc
k_upll)) {
printk(KERN_ERR "S3C2442: Failed to get parent clocks\n");
return -EINVAL;
}
printk(KERN_ERR "S3C2442: Failed to get parent clocks\n");
return -EINVAL;
}
@@
-136,8
+136,8
@@
static int s3c2442_clk_add(struct sys_device *sysdev)
/* check rate of UPLL, and if it is near 96MHz, then change
* to using half the UPLL rate for the system */
/* check rate of UPLL, and if it is near 96MHz, then change
* to using half the UPLL rate for the system */
- if (clk_get_rate(clk_upll) > (94 * MHZ)) {
- clk_usb_bus.rate = clk_get_rate(clk_upll) / 2;
+ if (clk_get_rate(cl
oc
k_upll) > (94 * MHZ)) {
+ clk_usb_bus.rate = clk_get_rate(cl
oc
k_upll) / 2;
mutex_lock(&clocks_mutex);
mutex_lock(&clocks_mutex);
@@
-148,8
+148,8
@@
static int s3c2442_clk_add(struct sys_device *sysdev)
mutex_unlock(&clocks_mutex);
}
mutex_unlock(&clocks_mutex);
}
- s3c2442_clk_cam.parent = clk_h;
- s3c2442_clk_cam_upll.parent = clk_upll;
+ s3c2442_clk_cam.parent = cl
oc
k_h;
+ s3c2442_clk_cam_upll.parent = cl
oc
k_upll;
s3c24xx_register_clock(&s3c2442_clk_cam);
s3c24xx_register_clock(&s3c2442_clk_cam_upll);
s3c24xx_register_clock(&s3c2442_clk_cam);
s3c24xx_register_clock(&s3c2442_clk_cam_upll);