+#ifdef CONFIG_XEN_IA64_VDSO_PARAVIRT
+ // The page in which hyperprivop lives must be pinned by ITR.
+ // However vDSO area isn't pinned. So issuing hyperprivop
+ // from vDSO page causes trouble that Kevin pointed out.
+ // After clearing vpsr.ic, the vcpu is pre-empted and the itlb
+ // is flushed. Then vcpu get cpu again, tlb miss fault occures.
+ // However it results in nested dtlb fault because vpsr.ic is off.
+ // To avoid such a situation, we jump into the kernel text area
+ // which is pinned, and then issue hyperprivop and return back
+ // to vDSO page.
+ // This is Dan Magenheimer's idea.
+
+ // Currently is_running_on_xen() is defined as running_on_xen.
+ // If is_running_on_xen() is a real function, we must update
+ // according to it.
+ .section ".data.patch.running_on_xen", "a"
+ .previous
+#define LOAD_RUNNING_ON_XEN(reg) \
+[1:] movl reg=0; \
+ .xdata4 ".data.patch.running_on_xen", 1b-.
+
+ .section ".data.patch.brl_xen_rsm_be_i", "a"
+ .previous
+#define BRL_COND_XEN_RSM_BE_I(pr) \
+[1:](pr)brl.cond.sptk 0; \
+ .xdata4 ".data.patch.brl_xen_rsm_be_i", 1b-.
+
+ .section ".data.patch.brl_xen_get_psr", "a"
+ .previous
+#define BRL_COND_XEN_GET_PSR(pr) \
+[1:](pr)brl.cond.sptk 0; \
+ .xdata4 ".data.patch.brl_xen_get_psr", 1b-.
+
+ .section ".data.patch.brl_xen_ssm_i_0", "a"
+ .previous
+#define BRL_COND_XEN_SSM_I_0(pr) \
+[1:](pr)brl.cond.sptk 0; \
+ .xdata4 ".data.patch.brl_xen_ssm_i_0", 1b-.
+
+ .section ".data.patch.brl_xen_ssm_i_1", "a"
+ .previous
+#define BRL_COND_XEN_SSM_I_1(pr) \
+[1:](pr)brl.cond.sptk 0; \
+ .xdata4 ".data.patch.brl_xen_ssm_i_1", 1b-.
+#endif
+