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fedora core 6 1.2949 + vserver 2.2.0
[linux-2.6.git]
/
arch
/
ia64
/
kernel
/
pal.S
diff --git
a/arch/ia64/kernel/pal.S
b/arch/ia64/kernel/pal.S
index
5018c7f
..
fc8c852
100644
(file)
--- a/
arch/ia64/kernel/pal.S
+++ b/
arch/ia64/kernel/pal.S
@@
-16,16
+16,18
@@
#include <asm/processor.h>
.data
#include <asm/processor.h>
.data
+ .globl pal_entry_point
pal_entry_point:
data8 ia64_pal_default_handler
.text
/*
pal_entry_point:
data8 ia64_pal_default_handler
.text
/*
- * Set the PAL entry point address. This could be written in C code, but we
do it here
- * to keep it all in one module (besides, it's so trivial that it's
+ * Set the PAL entry point address. This could be written in C code, but we
+ *
do it here
to keep it all in one module (besides, it's so trivial that it's
* not a big deal).
*
* not a big deal).
*
- * in0 Address of the PAL entry point (text address, NOT a function descriptor).
+ * in0 Address of the PAL entry point (text address, NOT a function
+ * descriptor).
*/
GLOBAL_ENTRY(ia64_pal_handler_init)
alloc r3=ar.pfs,1,0,0,0
*/
GLOBAL_ENTRY(ia64_pal_handler_init)
alloc r3=ar.pfs,1,0,0,0
@@
-36,9
+38,9
@@
GLOBAL_ENTRY(ia64_pal_handler_init)
END(ia64_pal_handler_init)
/*
END(ia64_pal_handler_init)
/*
- * Default PAL call handler. This needs to be coded in assembly because it
uses
- *
the static calling convention, i.e., the RSE may not be used and calls are
- * done via "br.cond" (not "br.call").
+ * Default PAL call handler. This needs to be coded in assembly because it
+ *
uses the static calling convention, i.e., the RSE may not be used and
+ *
calls are
done via "br.cond" (not "br.call").
*/
GLOBAL_ENTRY(ia64_pal_default_handler)
mov r8=-1
*/
GLOBAL_ENTRY(ia64_pal_default_handler)
mov r8=-1
@@
-50,12
+52,10
@@
END(ia64_pal_default_handler)
*
* in0 Index of PAL service
* in1 - in3 Remaining PAL arguments
*
* in0 Index of PAL service
* in1 - in3 Remaining PAL arguments
- * in4 1 ==> clear psr.ic, 0 ==> don't clear psr.ic
- *
*/
GLOBAL_ENTRY(ia64_pal_call_static)
*/
GLOBAL_ENTRY(ia64_pal_call_static)
- .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(
5
)
- alloc loc1 = ar.pfs,
5
,5,0,0
+ .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(
4
)
+ alloc loc1 = ar.pfs,
4
,5,0,0
movl loc2 = pal_entry_point
1: {
mov r28 = in0
movl loc2 = pal_entry_point
1: {
mov r28 = in0
@@
-64,7
+64,6
@@
GLOBAL_ENTRY(ia64_pal_call_static)
}
;;
ld8 loc2 = [loc2] // loc2 <- entry point
}
;;
ld8 loc2 = [loc2] // loc2 <- entry point
- tbit.nz p6,p7 = in4, 0
adds r8 = 1f-1b,r8
mov loc4=ar.rsc // save RSE configuration
;;
adds r8 = 1f-1b,r8
mov loc4=ar.rsc // save RSE configuration
;;
@@
-74,13
+73,11
@@
GLOBAL_ENTRY(ia64_pal_call_static)
.body
mov r30 = in2
.body
mov r30 = in2
-(p6) rsm psr.i | psr.ic
mov r31 = in3
mov b7 = loc2
mov r31 = in3
mov b7 = loc2
-
(p7)
rsm psr.i
+
rsm psr.i
;;
;;
-(p6) srlz.i
mov rp = r8
br.cond.sptk.many b7
1: mov psr.l = loc3
mov rp = r8
br.cond.sptk.many b7
1: mov psr.l = loc3
@@
-90,14
+87,14
@@
GLOBAL_ENTRY(ia64_pal_call_static)
;;
srlz.d // seralize restoration of psr.l
br.ret.sptk.many b0
;;
srlz.d // seralize restoration of psr.l
br.ret.sptk.many b0
-END(ia64_pal_call_static)
+END(
__
ia64_pal_call_static)
/*
* Make a PAL call using the stacked registers calling convention.
*
* Inputs:
/*
* Make a PAL call using the stacked registers calling convention.
*
* Inputs:
- * in0 Index of PAL service
- * in2 - in3 Remaning PAL arguments
+ * in0 Index of PAL service
+ * in2 - in3 Rema
i
ning PAL arguments
*/
GLOBAL_ENTRY(ia64_pal_call_stacked)
.prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(4)
*/
GLOBAL_ENTRY(ia64_pal_call_stacked)
.prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(4)
@@
-131,18
+128,18
@@
END(ia64_pal_call_stacked)
* Make a physical mode PAL call using the static registers calling convention.
*
* Inputs:
* Make a physical mode PAL call using the static registers calling convention.
*
* Inputs:
- * in0 Index of PAL service
- * in2 - in3 Remaning PAL arguments
+ * in0 Index of PAL service
+ * in2 - in3 Rema
i
ning PAL arguments
*
* PSR_LP, PSR_TB, PSR_ID, PSR_DA are never set by the kernel.
* So we don't need to clear them.
*/
*
* PSR_LP, PSR_TB, PSR_ID, PSR_DA are never set by the kernel.
* So we don't need to clear them.
*/
-#define PAL_PSR_BITS_TO_CLEAR
\
- (IA64_PSR_I | IA64_PSR_IT | IA64_PSR_DT | IA64_PSR_DB | IA64_PSR_RT |
\
- IA64_PSR_DD | IA64_PSR_SS | IA64_PSR_RI | IA64_PSR_ED |
\
+#define PAL_PSR_BITS_TO_CLEAR \
+ (IA64_PSR_I | IA64_PSR_IT | IA64_PSR_DT | IA64_PSR_DB | IA64_PSR_RT |\
+ IA64_PSR_DD | IA64_PSR_SS | IA64_PSR_RI | IA64_PSR_ED | \
IA64_PSR_DFL | IA64_PSR_DFH)
IA64_PSR_DFL | IA64_PSR_DFH)
-#define PAL_PSR_BITS_TO_SET
\
+#define PAL_PSR_BITS_TO_SET \
(IA64_PSR_BN)
(IA64_PSR_BN)
@@
-178,7
+175,7
@@
GLOBAL_ENTRY(ia64_pal_call_phys_static)
;;
andcm r16=loc3,r16 // removes bits to clear from psr
br.call.sptk.many rp=ia64_switch_mode_phys
;;
andcm r16=loc3,r16 // removes bits to clear from psr
br.call.sptk.many rp=ia64_switch_mode_phys
-
.ret1:
mov rp = r8 // install return address (physical)
+
mov rp = r8 // install return address (physical)
mov loc5 = r19
mov loc6 = r20
br.cond.sptk.many b7
mov loc5 = r19
mov loc6 = r20
br.cond.sptk.many b7
@@
-188,7
+185,6
@@
GLOBAL_ENTRY(ia64_pal_call_phys_static)
mov r19=loc5
mov r20=loc6
br.call.sptk.many rp=ia64_switch_mode_virt // return to virtual mode
mov r19=loc5
mov r20=loc6
br.call.sptk.many rp=ia64_switch_mode_virt // return to virtual mode
-.ret2:
mov psr.l = loc3 // restore init PSR
mov ar.pfs = loc1
mov psr.l = loc3 // restore init PSR
mov ar.pfs = loc1
@@
-203,8
+199,8
@@
END(ia64_pal_call_phys_static)
* Make a PAL call using the stacked registers in physical mode.
*
* Inputs:
* Make a PAL call using the stacked registers in physical mode.
*
* Inputs:
- * in0 Index of PAL service
- * in2 - in3 Remaning PAL arguments
+ * in0 Index of PAL service
+ * in2 - in3 Rema
i
ning PAL arguments
*/
GLOBAL_ENTRY(ia64_pal_call_phys_stacked)
.prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(5)
*/
GLOBAL_ENTRY(ia64_pal_call_phys_stacked)
.prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(5)
@@
-212,17
+208,12
@@
GLOBAL_ENTRY(ia64_pal_call_phys_stacked)
movl loc2 = pal_entry_point
1: {
mov r28 = in0 // copy procedure index
movl loc2 = pal_entry_point
1: {
mov r28 = in0 // copy procedure index
- mov loc0 = rp // save rp
+ mov loc0 = rp
// save rp
}
.body
;;
ld8 loc2 = [loc2] // loc2 <- entry point
}
.body
;;
ld8 loc2 = [loc2] // loc2 <- entry point
- mov out0 = in0 // first argument
- mov out1 = in1 // copy arg2
- mov out2 = in2 // copy arg3
- mov out3 = in3 // copy arg3
- ;;
- mov loc3 = psr // save psr
+ mov loc3 = psr // save psr
;;
mov loc4=ar.rsc // save RSE configuration
dep.z loc2=loc2,0,61 // convert pal entry point to physical
;;
mov loc4=ar.rsc // save RSE configuration
dep.z loc2=loc2,0,61 // convert pal entry point to physical
@@
-236,18
+227,23
@@
GLOBAL_ENTRY(ia64_pal_call_phys_stacked)
;;
andcm r16=loc3,r16 // removes bits to clear from psr
br.call.sptk.many rp=ia64_switch_mode_phys
;;
andcm r16=loc3,r16 // removes bits to clear from psr
br.call.sptk.many rp=ia64_switch_mode_phys
-.ret6:
+
+ mov out0 = in0 // first argument
+ mov out1 = in1 // copy arg2
+ mov out2 = in2 // copy arg3
+ mov out3 = in3 // copy arg3
mov loc5 = r19
mov loc6 = r20
mov loc5 = r19
mov loc6 = r20
+
br.call.sptk.many rp=b7 // now make the call
br.call.sptk.many rp=b7 // now make the call
-.ret7:
+
mov ar.rsc=0 // put RSE in enforced lazy, LE mode
mov r16=loc3 // r16= original psr
mov r19=loc5
mov r20=loc6
mov ar.rsc=0 // put RSE in enforced lazy, LE mode
mov r16=loc3 // r16= original psr
mov r19=loc5
mov r20=loc6
- br.call.sptk.many rp=ia64_switch_mode_virt
// return to virtual mode
+ br.call.sptk.many rp=ia64_switch_mode_virt // return to virtual mode
-
.ret8:
mov psr.l = loc3 // restore init PSR
+
mov psr.l = loc3 // restore init PSR
mov ar.pfs = loc1
mov rp = loc0
;;
mov ar.pfs = loc1
mov rp = loc0
;;
@@
-257,10
+253,11
@@
GLOBAL_ENTRY(ia64_pal_call_phys_stacked)
END(ia64_pal_call_phys_stacked)
/*
END(ia64_pal_call_phys_stacked)
/*
- * Save scratch fp scratch regs which aren't saved in pt_regs already (fp10-fp15).
+ * Save scratch fp scratch regs which aren't saved in pt_regs already
+ * (fp10-fp15).
*
*
- * NOTE: We need to do this since firmware (SAL and PAL) may use any of the
scratch
- * regs fp-low partition.
+ * NOTE: We need to do this since firmware (SAL and PAL) may use any of the
+ *
scratch
regs fp-low partition.
*
* Inputs:
* in0 Address of stack storage for fp regs
*
* Inputs:
* in0 Address of stack storage for fp regs