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fedora core 6 1.2949 + vserver 2.2.0
[linux-2.6.git]
/
arch
/
m32r
/
kernel
/
setup_oaks32r.c
diff --git
a/arch/m32r/kernel/setup_oaks32r.c
b/arch/m32r/kernel/setup_oaks32r.c
index
b048345
..
cd62598
100644
(file)
--- a/
arch/m32r/kernel/setup_oaks32r.c
+++ b/
arch/m32r/kernel/setup_oaks32r.c
@@
-3,11
+3,10
@@
*
* Setup routines for OAKS32R Board
*
*
* Setup routines for OAKS32R Board
*
- * Copyright (c) 2002-200
4
Hiroyuki Kondo, Hirokazu Takata,
- *
Hitoshi Yamamoto, Mamoru Sakugawa
+ * Copyright (c) 2002-200
5
Hiroyuki Kondo, Hirokazu Takata,
+ * Hitoshi Yamamoto, Mamoru Sakugawa
*/
*/
-#include <linux/config.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/init.h>
@@
-18,12
+17,6
@@
#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
-#ifndef CONFIG_SMP
-typedef struct {
- unsigned long icucr; /* ICU Control Register */
-} icu_data_t;
-#endif /* CONFIG_SMP */
-
icu_data_t icu_data[NR_IRQS];
static void disable_oaks32r_irq(unsigned int irq)
icu_data_t icu_data[NR_IRQS];
static void disable_oaks32r_irq(unsigned int irq)
@@
-70,13
+63,13
@@
static void shutdown_oaks32r_irq(unsigned int irq)
static struct hw_interrupt_type oaks32r_irq_type =
{
static struct hw_interrupt_type oaks32r_irq_type =
{
- "OAKS32R-IRQ",
- startup_oaks32r_irq,
- shutdown_oaks32r_irq,
- enable_oaks32r_irq,
- disable_oaks32r_irq,
- mask_and_ack_mappi,
- end_oaks32r_irq
+
.typename =
"OAKS32R-IRQ",
+
.startup =
startup_oaks32r_irq,
+
.shutdown =
shutdown_oaks32r_irq,
+
.enable =
enable_oaks32r_irq,
+
.disable =
disable_oaks32r_irq,
+
.ack =
mask_and_ack_mappi,
+
.end =
end_oaks32r_irq
};
void __init init_IRQ(void)
};
void __init init_IRQ(void)
@@
-91,7
+84,7
@@
void __init init_IRQ(void)
#ifdef CONFIG_NE2000
/* INT3 : LAN controller (RTL8019AS) */
irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
#ifdef CONFIG_NE2000
/* INT3 : LAN controller (RTL8019AS) */
irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
- irq_desc[M32R_IRQ_INT3].
handler
= &oaks32r_irq_type;
+ irq_desc[M32R_IRQ_INT3].
chip
= &oaks32r_irq_type;
irq_desc[M32R_IRQ_INT3].action = 0;
irq_desc[M32R_IRQ_INT3].depth = 1;
icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
irq_desc[M32R_IRQ_INT3].action = 0;
irq_desc[M32R_IRQ_INT3].depth = 1;
icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@
-100,7
+93,7
@@
void __init init_IRQ(void)
/* MFT2 : system timer */
irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
/* MFT2 : system timer */
irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
- irq_desc[M32R_IRQ_MFT2].
handler
= &oaks32r_irq_type;
+ irq_desc[M32R_IRQ_MFT2].
chip
= &oaks32r_irq_type;
irq_desc[M32R_IRQ_MFT2].action = 0;
irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
irq_desc[M32R_IRQ_MFT2].action = 0;
irq_desc[M32R_IRQ_MFT2].depth = 1;
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@
-109,7
+102,7
@@
void __init init_IRQ(void)
#ifdef CONFIG_SERIAL_M32R_SIO
/* SIO0_R : uart receive data */
irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
#ifdef CONFIG_SERIAL_M32R_SIO
/* SIO0_R : uart receive data */
irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
- irq_desc[M32R_IRQ_SIO0_R].
handler
= &oaks32r_irq_type;
+ irq_desc[M32R_IRQ_SIO0_R].
chip
= &oaks32r_irq_type;
irq_desc[M32R_IRQ_SIO0_R].action = 0;
irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
irq_desc[M32R_IRQ_SIO0_R].action = 0;
irq_desc[M32R_IRQ_SIO0_R].depth = 1;
icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@
-117,7
+110,7
@@
void __init init_IRQ(void)
/* SIO0_S : uart send data */
irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
/* SIO0_S : uart send data */
irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
- irq_desc[M32R_IRQ_SIO0_S].
handler
= &oaks32r_irq_type;
+ irq_desc[M32R_IRQ_SIO0_S].
chip
= &oaks32r_irq_type;
irq_desc[M32R_IRQ_SIO0_S].action = 0;
irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
irq_desc[M32R_IRQ_SIO0_S].action = 0;
irq_desc[M32R_IRQ_SIO0_S].depth = 1;
icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@
-125,7
+118,7
@@
void __init init_IRQ(void)
/* SIO1_R : uart receive data */
irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
/* SIO1_R : uart receive data */
irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
- irq_desc[M32R_IRQ_SIO1_R].
handler
= &oaks32r_irq_type;
+ irq_desc[M32R_IRQ_SIO1_R].
chip
= &oaks32r_irq_type;
irq_desc[M32R_IRQ_SIO1_R].action = 0;
irq_desc[M32R_IRQ_SIO1_R].depth = 1;
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
irq_desc[M32R_IRQ_SIO1_R].action = 0;
irq_desc[M32R_IRQ_SIO1_R].depth = 1;
icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@
-133,11
+126,10
@@
void __init init_IRQ(void)
/* SIO1_S : uart send data */
irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
/* SIO1_S : uart send data */
irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
- irq_desc[M32R_IRQ_SIO1_S].
handler
= &oaks32r_irq_type;
+ irq_desc[M32R_IRQ_SIO1_S].
chip
= &oaks32r_irq_type;
irq_desc[M32R_IRQ_SIO1_S].action = 0;
irq_desc[M32R_IRQ_SIO1_S].depth = 1;
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
disable_oaks32r_irq(M32R_IRQ_SIO1_S);
#endif /* CONFIG_SERIAL_M32R_SIO */
irq_desc[M32R_IRQ_SIO1_S].action = 0;
irq_desc[M32R_IRQ_SIO1_S].depth = 1;
icu_data[M32R_IRQ_SIO1_S].icucr = 0;
disable_oaks32r_irq(M32R_IRQ_SIO1_S);
#endif /* CONFIG_SERIAL_M32R_SIO */
-
}
}