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Fedora kernel-2.6.17-1.2142_FC4 patched with stable patch-2.6.17.4-vs2.0.2-rc26.diff
[linux-2.6.git]
/
arch
/
mips
/
dec
/
int-handler.S
diff --git
a/arch/mips/dec/int-handler.S
b/arch/mips/dec/int-handler.S
index
3b37909
..
e8ec93e
100644
(file)
--- a/
arch/mips/dec/int-handler.S
+++ b/
arch/mips/dec/int-handler.S
@@
-2,9
+2,9
@@
* arch/mips/dec/int-handler.S
*
* Copyright (C) 1995, 1996, 1997 Paul M. Antoine and Harald Koerfgen
* arch/mips/dec/int-handler.S
*
* Copyright (C) 1995, 1996, 1997 Paul M. Antoine and Harald Koerfgen
- * Copyright (C) 2000, 2001, 2002, 2003 Maciej W. Rozycki
+ * Copyright (C) 2000, 2001, 2002, 2003
, 2005
Maciej W. Rozycki
*
*
- * Written by Ralf Baechle and Andreas Busse, modified for DEC
S
tation
+ * Written by Ralf Baechle and Andreas Busse, modified for DEC
s
tation
* support by Paul Antoine and Harald Koerfgen.
*
* completly rewritten:
* support by Paul Antoine and Harald Koerfgen.
*
* completly rewritten:
@@
-14,11
+14,12
@@
* by Maciej W. Rozycki.
*/
#include <linux/config.h>
* by Maciej W. Rozycki.
*/
#include <linux/config.h>
+
+#include <asm/addrspace.h>
#include <asm/asm.h>
#include <asm/asm.h>
-#include <asm/regdef.h>
#include <asm/mipsregs.h>
#include <asm/mipsregs.h>
+#include <asm/regdef.h>
#include <asm/stackframe.h>
#include <asm/stackframe.h>
-#include <asm/addrspace.h>
#include <asm/dec/interrupts.h>
#include <asm/dec/ioasic_addrs.h>
#include <asm/dec/interrupts.h>
#include <asm/dec/ioasic_addrs.h>
@@
-28,11
+29,14
@@
#include <asm/dec/kn02xa.h>
#include <asm/dec/kn03.h>
#include <asm/dec/kn02xa.h>
#include <asm/dec/kn03.h>
+#define KN02_CSR_BASE CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR)
+#define KN02XA_IOASIC_BASE CKSEG1ADDR(KN02XA_SLOT_BASE + IOASIC_IOCTL)
+#define KN03_IOASIC_BASE CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_IOCTL)
.text
.set noreorder
/*
.text
.set noreorder
/*
- *
decstation_handle_int: Interrupt handler for DECS
tations
+ *
plat_irq_dispatch: Interrupt handler for DECs
tations
*
* We follow the model in the Indy interrupt code by David Miller, where he
* says: a lot of complication here is taken away because:
*
* We follow the model in the Indy interrupt code by David Miller, where he
* says: a lot of complication here is taken away because:
@@
-48,7
+52,7
@@
* 3) Linux only thinks in terms of all IRQs on or all IRQs
* off, nothing in between like BSD spl() brain-damage.
*
* 3) Linux only thinks in terms of all IRQs on or all IRQs
* off, nothing in between like BSD spl() brain-damage.
*
- * Furthermore, the IRQs on the DEC
S
tations look basically (barring
+ * Furthermore, the IRQs on the DEC
s
tations look basically (barring
* software IRQs which we don't use at all) like...
*
* DS2100/3100's, aka kn01, aka Pmax:
* software IRQs which we don't use at all) like...
*
* DS2100/3100's, aka kn01, aka Pmax:
@@
-61,7
+65,7
@@
* 3 Lance Ethernet
* 4 DZ11 serial
* 5 RTC
* 3 Lance Ethernet
* 4 DZ11 serial
* 5 RTC
- * 6 Memory Controller
+ * 6 Memory Controller
& Video
* 7 FPU
*
* DS5000/200, aka kn02, aka 3max:
* 7 FPU
*
* DS5000/200, aka kn02, aka 3max:
@@
-121,11
+125,7
@@
* just take another exception, big deal.
*/
.align 5
* just take another exception, big deal.
*/
.align 5
- NESTED(decstation_handle_int, PT_SIZE, ra)
- .set noat
- SAVE_ALL
- CLI # TEST: interrupts should be off
- .set at
+ NESTED(plat_irq_dispatch, PT_SIZE, ra)
.set noreorder
/*
.set noreorder
/*
@@
-133,7
+133,7
@@
*/
mfc0 t0,CP0_CAUSE # get pending interrupts
mfc0 t1,CP0_STATUS
*/
mfc0 t0,CP0_CAUSE # get pending interrupts
mfc0 t1,CP0_STATUS
-#ifdef CONFIG_
MIPS32
+#ifdef CONFIG_
32BIT
lw t2,cpu_fpu_mask
#endif
andi t0,ST0_IM # CAUSE.CE may be non-zero!
lw t2,cpu_fpu_mask
#endif
andi t0,ST0_IM # CAUSE.CE may be non-zero!
@@
-141,7
+141,7
@@
beqz t0,spurious
beqz t0,spurious
-#ifdef CONFIG_
MIPS32
+#ifdef CONFIG_
32BIT
and t2,t0
bnez t2,fpu # handle FPU immediately
#endif
and t2,t0
bnez t2,fpu # handle FPU immediately
#endif
@@
-271,16
+271,18
@@
handle_it:
j ret_from_irq
nop
j ret_from_irq
nop
-#ifdef CONFIG_
MIPS32
+#ifdef CONFIG_
32BIT
fpu:
j handle_fpe_int
nop
#endif
spurious:
fpu:
j handle_fpe_int
nop
#endif
spurious:
- j spurious_interrupt
+ jal spurious_interrupt
+ nop
+ j ret_from_irq
nop
nop
- END(
decstation_handle_int
)
+ END(
plat_irq_dispatch
)
/*
* Generic unimplemented interrupt routines -- cpu_mask_nr_tbl
/*
* Generic unimplemented interrupt routines -- cpu_mask_nr_tbl