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linux 2.6.16.38 w/ vs2.0.3-rc1
[linux-2.6.git]
/
arch
/
mips
/
kernel
/
irq-msc01.c
diff --git
a/arch/mips/kernel/irq-msc01.c
b/arch/mips/kernel/irq-msc01.c
index
97ebdc7
..
3f653c7
100644
(file)
--- a/
arch/mips/kernel/irq-msc01.c
+++ b/
arch/mips/kernel/irq-msc01.c
@@
-76,11
+76,6
@@
static void level_mask_and_ack_msc_irq(unsigned int irq)
mask_msc_irq(irq);
if (!cpu_has_veic)
MSCIC_WRITE(MSC01_IC_EOI, 0);
mask_msc_irq(irq);
if (!cpu_has_veic)
MSCIC_WRITE(MSC01_IC_EOI, 0);
-#ifdef CONFIG_MIPS_MT_SMTC
- /* This actually needs to be a call into platform code */
- if (irq_hwmask[irq] & ST0_IM)
- set_c0_status(irq_hwmask[irq] & ST0_IM);
-#endif /* CONFIG_MIPS_MT_SMTC */
}
/*
}
/*
@@
-97,10
+92,6
@@
static void edge_mask_and_ack_msc_irq(unsigned int irq)
MSCIC_WRITE(MSC01_IC_SUP+irq*8, r | ~MSC01_IC_SUP_EDGE_BIT);
MSCIC_WRITE(MSC01_IC_SUP+irq*8, r);
}
MSCIC_WRITE(MSC01_IC_SUP+irq*8, r | ~MSC01_IC_SUP_EDGE_BIT);
MSCIC_WRITE(MSC01_IC_SUP+irq*8, r);
}
-#ifdef CONFIG_MIPS_MT_SMTC
- if (irq_hwmask[irq] & ST0_IM)
- set_c0_status(irq_hwmask[irq] & ST0_IM);
-#endif /* CONFIG_MIPS_MT_SMTC */
}
/*
}
/*