+/* Define a table of names to identify CPM interrupt handlers in
+ * /proc/interrupts.
+ */
+const char *cpm_int_name[] =
+ { "error", "PC4", "PC5", "SMC2",
+ "SMC1", "SPI", "PC6", "Timer 4",
+ "", "PC7", "PC8", "PC9",
+ "Timer 3", "", "PC10", "PC11",
+ "I2C", "RISC Timer", "Timer 2", "",
+ "IDMA2", "IDMA1", "SDMA error", "PC12",
+ "PC13", "Timer 1", "PC14", "SCC4",
+ "SCC3", "SCC2", "SCC1", "PC15"
+ };
+
+static void
+cpm_mask_irq(unsigned int irq)
+{
+ int cpm_vec = irq - CPM_IRQ_OFFSET;
+
+ clrbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, (1 << cpm_vec));
+}
+
+static void
+cpm_unmask_irq(unsigned int irq)
+{
+ int cpm_vec = irq - CPM_IRQ_OFFSET;
+
+ setbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, (1 << cpm_vec));
+}
+
+static void
+cpm_ack(unsigned int irq)
+{
+ /* We do not need to do anything here. */
+}
+
+static void
+cpm_eoi(unsigned int irq)
+{
+ int cpm_vec = irq - CPM_IRQ_OFFSET;
+
+ out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr, (1 << cpm_vec));
+}
+
+struct hw_interrupt_type cpm_pic = {
+ .typename = " CPM ",
+ .enable = cpm_unmask_irq,
+ .disable = cpm_mask_irq,
+ .ack = cpm_ack,
+ .end = cpm_eoi,
+};