-#ifdef CONFIG_MV64360_SRAM_CACHEABLE
- io_block_mapping(CHESTNUT_INTERNAL_SRAM_BASE,
- CHESTNUT_INTERNAL_SRAM_BASE,
- CHESTNUT_INTERNAL_SRAM_SIZE,
- _PAGE_KERNEL | _PAGE_GUARDED);
-#else
-#ifdef CONFIG_MV64360_SRAM_CACHE_COHERENT
- io_block_mapping(CHESTNUT_INTERNAL_SRAM_BASE,
- CHESTNUT_INTERNAL_SRAM_BASE,
- CHESTNUT_INTERNAL_SRAM_SIZE,
- _PAGE_KERNEL | _PAGE_GUARDED | _PAGE_COHERENT);
-#else
- io_block_mapping(CHESTNUT_INTERNAL_SRAM_BASE,
- CHESTNUT_INTERNAL_SRAM_BASE,
- CHESTNUT_INTERNAL_SRAM_SIZE,
- _PAGE_IO);
-#endif /* !CONFIG_MV64360_SRAM_CACHE_COHERENT */
-#endif /* !CONFIG_MV64360_SRAM_CACHEABLE */
-