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vserver 1.9.3
[linux-2.6.git]
/
arch
/
ppc
/
syslib
/
mpc52xx_pic.c
diff --git
a/arch/ppc/syslib/mpc52xx_pic.c
b/arch/ppc/syslib/mpc52xx_pic.c
index
0f88e63
..
4de79d3
100644
(file)
--- a/
arch/ppc/syslib/mpc52xx_pic.c
+++ b/
arch/ppc/syslib/mpc52xx_pic.c
@@
-114,7
+114,7
@@
mpc52xx_ic_ack(unsigned int irq)
/*
* Only some irqs are reset here, others in interrupting hardware.
*/
/*
* Only some irqs are reset here, others in interrupting hardware.
*/
-
+
switch (irq) {
case MPC52xx_IRQ0:
val = in_be32(&intr->ctrl);
switch (irq) {
case MPC52xx_IRQ0:
val = in_be32(&intr->ctrl);
@@
-180,13
+180,14
@@
void __init
mpc52xx_init_irq(void)
{
int i;
mpc52xx_init_irq(void)
{
int i;
+ u32 intr_ctrl;
/* Remap the necessary zones */
intr = (struct mpc52xx_intr *)
ioremap(MPC52xx_INTR, sizeof(struct mpc52xx_intr));
sdma = (struct mpc52xx_sdma *)
ioremap(MPC52xx_SDMA, sizeof(struct mpc52xx_sdma));
/* Remap the necessary zones */
intr = (struct mpc52xx_intr *)
ioremap(MPC52xx_INTR, sizeof(struct mpc52xx_intr));
sdma = (struct mpc52xx_sdma *)
ioremap(MPC52xx_SDMA, sizeof(struct mpc52xx_sdma));
-
+
if ((intr==NULL) || (sdma==NULL))
panic("Can't ioremap PIC/SDMA register for init_irq !");
if ((intr==NULL) || (sdma==NULL))
panic("Can't ioremap PIC/SDMA register for init_irq !");
@@
-195,12
+196,13
@@
mpc52xx_init_irq(void)
out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */
out_be32(&intr->per_mask, 0x7ffffc00); /* 1 means disabled */
out_be32(&intr->main_mask, 0x00010fff); /* 1 means disabled */
out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */
out_be32(&intr->per_mask, 0x7ffffc00); /* 1 means disabled */
out_be32(&intr->main_mask, 0x00010fff); /* 1 means disabled */
- out_be32(&intr->ctrl,
-
0x0f000000 | /* clear IRQ 0-3
*/
-
0x00c00000 | /* IRQ0: level-sensitive, active low
*/
+ intr_ctrl = in_be32(&intr->ctrl);
+
intr_ctrl &= 0x00ff0000; /* Keeps IRQ[0-3] config
*/
+
intr_ctrl |= 0x0f000000 | /* clear IRQ 0-3
*/
0x00001000 | /* MEE master external enable */
0x00000000 | /* 0 means disable IRQ 0-3 */
0x00001000 | /* MEE master external enable */
0x00000000 | /* 0 means disable IRQ 0-3 */
- 0x00000001); /* CEb route critical normally */
+ 0x00000001; /* CEb route critical normally */
+ out_be32(&intr->ctrl, intr_ctrl);
/* Zero a bunch of the priority settings. */
out_be32(&intr->per_pri1, 0);
/* Zero a bunch of the priority settings. */
out_be32(&intr->per_pri1, 0);
@@
-214,6
+216,14
@@
mpc52xx_init_irq(void)
irq_desc[i].handler = &mpc52xx_ic;
irq_desc[i].status = IRQ_LEVEL;
}
irq_desc[i].handler = &mpc52xx_ic;
irq_desc[i].status = IRQ_LEVEL;
}
+
+ #define IRQn_MODE(intr_ctrl,irq) (((intr_ctrl) >> (22-(i<<1))) & 0x03)
+ for (i=0 ; i<4 ; i++) {
+ int mode;
+ mode = IRQn_MODE(intr_ctrl,i);
+ if ((mode == 0x1) || (mode == 0x2))
+ irq_desc[i?MPC52xx_IRQ1+i-1:MPC52xx_IRQ0].status = 0;
+ }
}
int
}
int