-static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
- enum edac_type edac_mode)
-{
- struct csrow_info *csrow;
- u32 mba, mba_base, mba_mask, dms;
- int index;
-
- for (index = 0; index < mci->nr_csrows; index++) {
- csrow = &mci->csrows[index];
-
- /* find the DRAM Chip Select Base address and mask */
- pci_read_config_dword(pdev,
- AMD76X_MEM_BASE_ADDR + (index * 4),
- &mba);
-
- if (!(mba & BIT(0)))
- continue;
-
- mba_base = mba & 0xff800000UL;
- mba_mask = ((mba & 0xff80) << 16) | 0x7fffffUL;
- pci_read_config_dword(pdev, AMD76X_DRAM_MODE_STATUS, &dms);
- csrow->first_page = mba_base >> PAGE_SHIFT;
- csrow->nr_pages = (mba_mask + 1) >> PAGE_SHIFT;
- csrow->last_page = csrow->first_page + csrow->nr_pages - 1;
- csrow->page_mask = mba_mask >> PAGE_SHIFT;
- csrow->grain = csrow->nr_pages << PAGE_SHIFT;
- csrow->mtype = MEM_RDDR;
- csrow->dtype = ((dms >> index) & 0x1) ? DEV_X4 : DEV_UNKNOWN;
- csrow->edac_mode = edac_mode;
- }
-}
-