+
+
+int ttpci_budget_debiread(struct budget *budget, u32 config, int addr, int count,
+ int uselocks, int nobusyloop)
+{
+ struct saa7146_dev *saa = budget->dev;
+ int result = 0;
+ unsigned long flags = 0;
+
+ if (count > 4 || count <= 0)
+ return 0;
+
+ if (uselocks)
+ spin_lock_irqsave(&budget->debilock, flags);
+
+ if ((result = saa7146_wait_for_debi_done(saa, nobusyloop)) < 0) {
+ if (uselocks)
+ spin_unlock_irqrestore(&budget->debilock, flags);
+ return result;
+ }
+
+ saa7146_write(saa, DEBI_COMMAND, (count << 17) | 0x10000 | (addr & 0xffff));
+ saa7146_write(saa, DEBI_CONFIG, config);
+ saa7146_write(saa, DEBI_PAGE, 0);
+ saa7146_write(saa, MC2, (2 << 16) | 2);
+
+ if ((result = saa7146_wait_for_debi_done(saa, nobusyloop)) < 0) {
+ if (uselocks)
+ spin_unlock_irqrestore(&budget->debilock, flags);
+ return result;
+ }
+
+ result = saa7146_read(saa, DEBI_AD);
+ result &= (0xffffffffUL >> ((4 - count) * 8));
+
+ if (uselocks)
+ spin_unlock_irqrestore(&budget->debilock, flags);
+
+ return result;
+}
+
+int ttpci_budget_debiwrite(struct budget *budget, u32 config, int addr,
+ int count, u32 value, int uselocks, int nobusyloop)
+{
+ struct saa7146_dev *saa = budget->dev;
+ unsigned long flags = 0;
+ int result;
+
+ if (count > 4 || count <= 0)
+ return 0;
+
+ if (uselocks)
+ spin_lock_irqsave(&budget->debilock, flags);
+
+ if ((result = saa7146_wait_for_debi_done(saa, nobusyloop)) < 0) {
+ if (uselocks)
+ spin_unlock_irqrestore(&budget->debilock, flags);
+ return result;
+ }
+
+ saa7146_write(saa, DEBI_COMMAND, (count << 17) | 0x00000 | (addr & 0xffff));
+ saa7146_write(saa, DEBI_CONFIG, config);
+ saa7146_write(saa, DEBI_PAGE, 0);
+ saa7146_write(saa, DEBI_AD, value);
+ saa7146_write(saa, MC2, (2 << 16) | 2);
+
+ if ((result = saa7146_wait_for_debi_done(saa, nobusyloop)) < 0) {
+ if (uselocks)
+ spin_unlock_irqrestore(&budget->debilock, flags);
+ return result;
+ }
+
+ if (uselocks)
+ spin_unlock_irqrestore(&budget->debilock, flags);
+ return 0;