-#define VINO_BASE 0x00080000 /* In EISA address space */
-
-#define VINO_REVID 0x0000
-#define VINO_CTRL 0x0008
-#define VINO_INTSTAT 0x0010 /* Interrupt status */
-#define VINO_I2C_CTRL 0x0018
-#define VINO_I2C_DATA 0x0020
-#define VINO_A_ALPHA 0x0028 /* Channel A ... */
-#define VINO_A_CLIPS 0x0030 /* Clipping start */
-#define VINO_A_CLIPE 0x0038 /* Clipping end */
-#define VINO_A_FRAMERT 0x0040 /* Framerate */
-#define VINO_A_FLDCNT 0x0048 /* Field counter */
-#define VINO_A_LNSZ 0x0050
-#define VINO_A_LNCNT 0x0058
-#define VINO_A_PGIX 0x0060 /* Page index */
-#define VINO_A_DESC_PTR 0x0068 /* Ptr to next four descriptors */
-#define VINO_A_DESC_TLB_PTR 0x0070 /* Ptr to start of descriptor table */
-#define VINO_A_DESC_DATA0 0x0078 /* Descriptor data 0 */
-#define VINO_A_DESC_DATA1 0x0080 /* ... */
-#define VINO_A_DESC_DATA2 0x0088
-#define VINO_A_DESC_DATA3 0x0090
-#define VINO_A_FIFO_THRESHOLD 0x0098 /* FIFO threshold */
-#define VINO_A_FIFO_RP 0x00a0
-#define VINO_A_FIFO_WP 0x00a8
-#define VINO_B_ALPHA 0x00b0 /* Channel B ... */
-#define VINO_B_CLIPS 0x00b8
-#define VINO_B_CLIPE 0x00c0
-#define VINO_B_FRAMERT 0x00c8
-#define VINO_B_FLDCNT 0x00d0
-#define VINO_B_LNSZ 0x00d8
-#define VINO_B_LNCNT 0x00e0
-#define VINO_B_PGIX 0x00e8
-#define VINO_B_DESC_PTR 0x00f0
-#define VINO_B_DESC_TLB_PTR 0x00f8
-#define VINO_B_DESC_DATA0 0x0100
-#define VINO_B_DESC_DATA1 0x0108
-#define VINO_B_DESC_DATA2 0x0110
-#define VINO_B_DESC_DATA3 0x0118
-#define VINO_B_FIFO_THRESHOLD 0x0120
-#define VINO_B_FIFO_RP 0x0128
-#define VINO_B_FIFO_WP 0x0130
-
-/* Bits in the VINO_REVID register */
-
-#define VINO_REVID_REV_MASK 0x000f /* bits 0:3 */
-#define VINO_REVID_ID_MASK 0x00f0 /* bits 4:7 */
-
-/* Bits in the VINO_CTRL register */
+#ifndef VINO_H
+#define VINO_H
+
+#define VINO_BASE 0x00080000 /* Vino is in the EISA address space,
+ * but it is not an EISA bus card */
+
+struct sgi_vino_channel {
+ u32 _pad_alpha;
+ volatile u32 alpha;
+
+#define VINO_CLIP_X(x) ((x) & 0x3ff) /* bits 0:9 */
+#define VINO_CLIP_ODD(x) (((x) & 0x1ff) << 10) /* bits 10:18 */
+#define VINO_CLIP_EVEN(x) (((x) & 0x1ff) << 19) /* bits 19:27 */
+ u32 _pad_clip_start;
+ volatile u32 clip_start;
+ u32 _pad_clip_end;
+ volatile u32 clip_end;
+
+#define VINO_FRAMERT_PAL (1<<0) /* 0=NTSC 1=PAL */
+#define VINO_FRAMERT_RT(x) (((x) & 0x1fff) << 1) /* bits 1:12 */
+ u32 _pad_frame_rate;
+ volatile u32 frame_rate;
+
+ u32 _pad_field_counter;
+ volatile u32 field_counter;
+ u32 _pad_line_size;
+ volatile u32 line_size;
+ u32 _pad_line_count;
+ volatile u32 line_count;
+ u32 _pad_page_index;
+ volatile u32 page_index;
+ u32 _pad_next_4_desc;
+ volatile u32 next_4_desc;
+ u32 _pad_start_desc_tbl;
+ volatile u32 start_desc_tbl;
+
+#define VINO_DESC_JUMP (1<<30)
+#define VINO_DESC_STOP (1<<31)
+#define VINO_DESC_VALID (1<<32)
+ u32 _pad_desc_0;
+ volatile u32 desc_0;
+ u32 _pad_desc_1;
+ volatile u32 desc_1;
+ u32 _pad_desc_2;
+ volatile u32 desc_2;
+ u32 _pad_Bdesc_3;
+ volatile u32 desc_3;
+
+ u32 _pad_fifo_thres;
+ volatile u32 fifo_thres;
+ u32 _pad_fifo_read;
+ volatile u32 fifo_read;
+ u32 _pad_fifo_write;
+ volatile u32 fifo_write;
+};
+
+struct sgi_vino {
+#define VINO_CHIP_ID 0xb
+#define VINO_REV_NUM(x) ((x) & 0x0f)
+#define VINO_ID_VALUE(x) (((x) & 0xf0) >> 4)
+ u32 _pad_rev_id;
+ volatile u32 rev_id;