* Page Identifiers
* (Swap Paging Register, PAGING, bits 3:0, Offset 0x02)
*/
* Page Identifiers
* (Swap Paging Register, PAGING, bits 3:0, Offset 0x02)
*/
* Hardware ID Register I (Always available, HW_ID, Offset 0x00)
*/
#define HP100_HW_ID_CASCADE 0x4850 /* Identifies Cascade Chip */
* Hardware ID Register I (Always available, HW_ID, Offset 0x00)
*/
#define HP100_HW_ID_CASCADE 0x4850 /* Identifies Cascade Chip */
* Hardware ID Register 2 & Paging Register
* (Always available, PAGING, Offset 0x02)
* Hardware ID Register 2 & Paging Register
* (Always available, PAGING, Offset 0x02)
* (Always available, OPTION_LSW, Offset 0x04-0x05)
*/
#define HP100_DEBUG_EN 0x8000 /* 0:Dis., 1:Enable Debug Dump Ptr. */
* (Always available, OPTION_LSW, Offset 0x04-0x05)
*/
#define HP100_DEBUG_EN 0x8000 /* 0:Dis., 1:Enable Debug Dump Ptr. */
* (Always available, OPTION_MSW, Offset 0x06)
*/
#define HP100_PRIORITY_TX 0x0080 /* 1:Do all Tx pkts as priority */
* (Always available, OPTION_MSW, Offset 0x06)
*/
#define HP100_PRIORITY_TX 0x0080 /* 1:Do all Tx pkts as priority */
* Mode Control Register I
* (Page HW_MAP, MODECTRL1, Offset0x10)
*/
* Mode Control Register I
* (Page HW_MAP, MODECTRL1, Offset0x10)
*/
* PCI Configuration and Control Register I
* (Page HW_MAP, PCICTRL1, Offset 0x12)
*/
* PCI Configuration and Control Register I
* (Page HW_MAP, PCICTRL1, Offset 0x12)
*/
*/
#define HP100_VG_SEL 0x80 /* 0:No, 1:Yes use 100 Mbit MAC */
#define HP100_LINK_UP_ST 0x40 /* 0:No, 1:Yes endnode logged in */
*/
#define HP100_VG_SEL 0x80 /* 0:No, 1:Yes use 100 Mbit MAC */
#define HP100_LINK_UP_ST 0x40 /* 0:No, 1:Yes endnode logged in */
* (Page MAC_CTRL, MAC_CFG_2, Offset 0x0d)
*/
#define HP100_TR_MODE 0x80 /* 0:No, 1:Yes support Token Ring formats */
* (Page MAC_CTRL, MAC_CFG_2, Offset 0x0d)
*/
#define HP100_TR_MODE 0x80 /* 0:No, 1:Yes support Token Ring formats */
- * MAC Configuration Register III
- * (Page MAC_CTRL, MAC_CFG_3, Offset 0x0e)
+ * MAC Configuration Register III
+ * (Page MAC_CTRL, MAC_CFG_3, Offset 0x0e)
* (Page MAC_CTRL, MAC_CFG_4, Offset 0x0f)
*/
#define HP100_MAC_SEL_ST 0x01 /* (R): Status of external VGSEL
* (Page MAC_CTRL, MAC_CFG_4, Offset 0x0f)
*/
#define HP100_MAC_SEL_ST 0x01 /* (R): Status of external VGSEL
* a cascaded repeater
* 0: ... wants to be a DTE */
#define HP100_MACRQ_PROMSC 0x0006 /* 2 bits: Promiscious mode
* 00: Rcv only unicast packets
* specifically addr to this
* endnode
* a cascaded repeater
* 0: ... wants to be a DTE */
#define HP100_MACRQ_PROMSC 0x0006 /* 2 bits: Promiscious mode
* 00: Rcv only unicast packets
* specifically addr to this
* endnode
* the local repeater */
#define HP100_MACRQ_FRAMEFMT_EITHER 0x0018 /* 11: either format allowed */
#define HP100_MACRQ_FRAMEFMT_802_3 0x0000 /* 00: 802.3 is requested */
* the local repeater */
#define HP100_MACRQ_FRAMEFMT_EITHER 0x0018 /* 11: either format allowed */
#define HP100_MACRQ_FRAMEFMT_802_3 0x0000 /* 00: 802.3 is requested */
#define HP100_LAN_COAX 9 /* lan_type value for Coax */
#define HP100_LAN_ERR (-1) /* lan_type value for link down */
#define HP100_LAN_COAX 9 /* lan_type value for Coax */
#define HP100_LAN_ERR (-1) /* lan_type value for link down */
bit in the MAC Configuration Register 1 is set. */
#define HP100_RX_PRI 0x8000 /* 0:No, 1:Yes packet is priority */
#define HP100_SDF_ERR 0x4000 /* 0:No, 1:Yes start of frame error */
bit in the MAC Configuration Register 1 is set. */
#define HP100_RX_PRI 0x8000 /* 0:No, 1:Yes packet is priority */
#define HP100_SDF_ERR 0x4000 /* 0:No, 1:Yes start of frame error */