+ gsc_asic_assign_irq(ctrl, irq, &dev->irq);
+
+ switch (dev->id.sversion) {
+ case 0x73: irq = 2; break; /* i8042 High-priority */
+ case 0x90: irq = 0; break; /* EISA NMI */
+ default: return; /* No secondary IRQ */
+ }
+
+ gsc_asic_assign_irq(ctrl, irq, &dev->aux_irq);