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vserver 1.9.3
[linux-2.6.git]
/
drivers
/
pci
/
hotplug
/
ibmphp_hpc.c
diff --git
a/drivers/pci/hotplug/ibmphp_hpc.c
b/drivers/pci/hotplug/ibmphp_hpc.c
index
105dc70
..
04459b7
100644
(file)
--- a/
drivers/pci/hotplug/ibmphp_hpc.c
+++ b/
drivers/pci/hotplug/ibmphp_hpc.c
@@
-29,6
+29,7
@@
#include <linux/wait.h>
#include <linux/time.h>
#include <linux/wait.h>
#include <linux/time.h>
+#include <linux/delay.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/smp_lock.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/smp_lock.h>
@@
-205,7
+206,7
@@
static u8 i2c_ctrl_read (struct controller *ctlr_ptr, void *WPGBbar, u8 index)
// READ - step 4 : wait until start operation bit clears
i = CMD_COMPLETE_TOUT_SEC;
while (i) {
// READ - step 4 : wait until start operation bit clears
i = CMD_COMPLETE_TOUT_SEC;
while (i) {
-
long_delay (1 * HZ / 10
0);
+
msleep(1
0);
wpg_addr = WPGBbar + WPG_I2CMCNTL_OFFSET;
wpg_data = readl (wpg_addr);
data = swab32 (wpg_data);
wpg_addr = WPGBbar + WPG_I2CMCNTL_OFFSET;
wpg_data = readl (wpg_addr);
data = swab32 (wpg_data);
@@
-221,7
+222,7
@@
static u8 i2c_ctrl_read (struct controller *ctlr_ptr, void *WPGBbar, u8 index)
// READ - step 5 : read I2C status register
i = CMD_COMPLETE_TOUT_SEC;
while (i) {
// READ - step 5 : read I2C status register
i = CMD_COMPLETE_TOUT_SEC;
while (i) {
-
long_delay (1 * HZ / 10
0);
+
msleep(1
0);
wpg_addr = WPGBbar + WPG_I2CSTAT_OFFSET;
wpg_data = readl (wpg_addr);
data = swab32 (wpg_data);
wpg_addr = WPGBbar + WPG_I2CSTAT_OFFSET;
wpg_data = readl (wpg_addr);
data = swab32 (wpg_data);
@@
-316,7
+317,7
@@
static u8 i2c_ctrl_write (struct controller *ctlr_ptr, void *WPGBbar, u8 index,
// WRITE - step 4 : wait until start operation bit clears
i = CMD_COMPLETE_TOUT_SEC;
while (i) {
// WRITE - step 4 : wait until start operation bit clears
i = CMD_COMPLETE_TOUT_SEC;
while (i) {
-
long_delay (1 * HZ / 10
0);
+
msleep(1
0);
wpg_addr = WPGBbar + WPG_I2CMCNTL_OFFSET;
wpg_data = readl (wpg_addr);
data = swab32 (wpg_data);
wpg_addr = WPGBbar + WPG_I2CMCNTL_OFFSET;
wpg_data = readl (wpg_addr);
data = swab32 (wpg_data);
@@
-333,7
+334,7
@@
static u8 i2c_ctrl_write (struct controller *ctlr_ptr, void *WPGBbar, u8 index,
// WRITE - step 5 : read I2C status register
i = CMD_COMPLETE_TOUT_SEC;
while (i) {
// WRITE - step 5 : read I2C status register
i = CMD_COMPLETE_TOUT_SEC;
while (i) {
-
long_delay (1 * HZ / 10
0);
+
msleep(1
0);
wpg_addr = WPGBbar + WPG_I2CSTAT_OFFSET;
wpg_data = readl (wpg_addr);
data = swab32 (wpg_data);
wpg_addr = WPGBbar + WPG_I2CSTAT_OFFSET;
wpg_data = readl (wpg_addr);
data = swab32 (wpg_data);
@@
-748,7
+749,7
@@
int ibmphp_hpc_writeslot (struct slot * pslot, u8 cmd)
done = TRUE;
}
if (!done) {
done = TRUE;
}
if (!done) {
-
long_delay (1 * HZ
);
+
msleep(1000
);
if (timeout < 1) {
done = TRUE;
err ("%s - Error command complete timeout\n", __FUNCTION__);
if (timeout < 1) {
done = TRUE;
err ("%s - Error command complete timeout\n", __FUNCTION__);
@@
-891,7
+892,7
@@
static void poll_hpc (void)
case POLL_SLEEP:
/* don't sleep with a lock on the hardware */
up (&semOperations);
case POLL_SLEEP:
/* don't sleep with a lock on the hardware */
up (&semOperations);
-
long_delay (POLL_INTERVAL_SEC * HZ
);
+
msleep(POLL_INTERVAL_SEC * 1000
);
if (ibmphp_shutdown)
break;
if (ibmphp_shutdown)
break;
@@
-908,8
+909,7
@@
static void poll_hpc (void)
/* give up the harware semaphore */
up (&semOperations);
/* sleep for a short time just for good measure */
/* give up the harware semaphore */
up (&semOperations);
/* sleep for a short time just for good measure */
- set_current_state (TASK_INTERRUPTIBLE);
- schedule_timeout (HZ/10);
+ msleep(100);
}
up (&sem_exit);
debug ("%s - Exit\n", __FUNCTION__);
}
up (&sem_exit);
debug ("%s - Exit\n", __FUNCTION__);
@@
-974,7
+974,7
@@
static int process_changeinstatus (struct slot *pslot, struct slot *poldslot)
if (SLOT_PWRGD (pslot->status)) {
// power goes on and off after closing latch
// check again to make sure power is still ON
if (SLOT_PWRGD (pslot->status)) {
// power goes on and off after closing latch
// check again to make sure power is still ON
-
long_delay (1 * HZ
);
+
msleep(1000
);
rc = ibmphp_hpc_readslot (pslot, READ_SLOTSTATUS, &status);
if (SLOT_PWRGD (status))
update = TRUE;
rc = ibmphp_hpc_readslot (pslot, READ_SLOTSTATUS, &status);
if (SLOT_PWRGD (status))
update = TRUE;
@@
-1147,7
+1147,7
@@
static int hpc_wait_ctlr_notworking (int timeout, struct controller *ctlr_ptr, v
if (CTLR_WORKING (*pstatus) == HPC_CTLR_WORKING_NO)
done = TRUE;
if (!done) {
if (CTLR_WORKING (*pstatus) == HPC_CTLR_WORKING_NO)
done = TRUE;
if (!done) {
-
long_delay (1 * HZ
);
+
msleep(1000
);
if (timeout < 1) {
done = TRUE;
err ("HPCreadslot - Error ctlr timeout\n");
if (timeout < 1) {
done = TRUE;
err ("HPCreadslot - Error ctlr timeout\n");