- vga_out8 (0x3d4, 0x31, par);
- par->CR31 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x32, par);
- par->CR32 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x34, par);
- par->CR34 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x36, par);
- par->CR36 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x3a, par);
- par->CR3A = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x40, par);
- par->CR40 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x42, par);
- par->CR42 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x45, par);
- par->CR45 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x50, par);
- par->CR50 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x51, par);
- par->CR51 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x53, par);
- par->CR53 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x58, par);
- par->CR58 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x60, par);
- par->CR60 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x66, par);
- par->CR66 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x67, par);
- par->CR67 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x68, par);
- par->CR68 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x69, par);
- par->CR69 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x6f, par);
- par->CR6F = vga_in8 (0x3d5, par);
-
- vga_out8 (0x3d4, 0x33, par);
- par->CR33 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x86, par);
- par->CR86 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x88, par);
- par->CR88 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x90, par);
- par->CR90 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0x91, par);
- par->CR91 = vga_in8 (0x3d5, par);
- vga_out8 (0x3d4, 0xb0, par);
- par->CRB0 = vga_in8 (0x3d5, par) | 0x80;
+ vga_out8(0x3d4, 0x31, par);
+ reg->CR31 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x32, par);
+ reg->CR32 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x34, par);
+ reg->CR34 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x36, par);
+ reg->CR36 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x3a, par);
+ reg->CR3A = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x40, par);
+ reg->CR40 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x42, par);
+ reg->CR42 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x45, par);
+ reg->CR45 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x50, par);
+ reg->CR50 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x51, par);
+ reg->CR51 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x53, par);
+ reg->CR53 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x58, par);
+ reg->CR58 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x60, par);
+ reg->CR60 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x66, par);
+ reg->CR66 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x67, par);
+ reg->CR67 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x68, par);
+ reg->CR68 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x69, par);
+ reg->CR69 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x6f, par);
+ reg->CR6F = vga_in8(0x3d5, par);
+
+ vga_out8(0x3d4, 0x33, par);
+ reg->CR33 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x86, par);
+ reg->CR86 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x88, par);
+ reg->CR88 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x90, par);
+ reg->CR90 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x91, par);
+ reg->CR91 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0xb0, par);
+ reg->CRB0 = vga_in8(0x3d5, par) | 0x80;
+
+ /* extended mode timing regs */
+ vga_out8(0x3d4, 0x3b, par);
+ reg->CR3B = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x3c, par);
+ reg->CR3C = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x43, par);
+ reg->CR43 = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x5d, par);
+ reg->CR5D = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x5e, par);
+ reg->CR5E = vga_in8(0x3d5, par);
+ vga_out8(0x3d4, 0x65, par);
+ reg->CR65 = vga_in8(0x3d5, par);
+
+ /* save seq extended regs for DCLK PLL programming */
+ vga_out8(0x3c4, 0x0e, par);
+ reg->SR0E = vga_in8(0x3c5, par);
+ vga_out8(0x3c4, 0x0f, par);
+ reg->SR0F = vga_in8(0x3c5, par);
+ vga_out8(0x3c4, 0x10, par);
+ reg->SR10 = vga_in8(0x3c5, par);
+ vga_out8(0x3c4, 0x11, par);
+ reg->SR11 = vga_in8(0x3c5, par);
+ vga_out8(0x3c4, 0x12, par);
+ reg->SR12 = vga_in8(0x3c5, par);
+ vga_out8(0x3c4, 0x13, par);
+ reg->SR13 = vga_in8(0x3c5, par);
+ vga_out8(0x3c4, 0x29, par);
+ reg->SR29 = vga_in8(0x3c5, par);
+
+ vga_out8(0x3c4, 0x15, par);
+ reg->SR15 = vga_in8(0x3c5, par);
+ vga_out8(0x3c4, 0x30, par);
+ reg->SR30 = vga_in8(0x3c5, par);
+ vga_out8(0x3c4, 0x18, par);
+ reg->SR18 = vga_in8(0x3c5, par);
+
+ /* Save flat panel expansion regsters. */
+ if (par->chip == S3_SAVAGE_MX) {
+ int i;
+
+ for (i = 0; i < 8; i++) {
+ vga_out8(0x3c4, 0x54+i, par);
+ reg->SR54[i] = vga_in8(0x3c5, par);
+ }
+ }
+
+ vga_out8(0x3d4, 0x66, par);
+ cr66 = vga_in8(0x3d5, par);
+ vga_out8(0x3d5, cr66 | 0x80, par);
+ vga_out8(0x3d4, 0x3a, par);
+ cr3a = vga_in8(0x3d5, par);
+ vga_out8(0x3d5, cr3a | 0x80, par);
+
+ /* now save MIU regs */
+ if (par->chip != S3_SAVAGE_MX) {
+ reg->MMPR0 = savage_in32(FIFO_CONTROL_REG, par);
+ reg->MMPR1 = savage_in32(MIU_CONTROL_REG, par);
+ reg->MMPR2 = savage_in32(STREAMS_TIMEOUT_REG, par);
+ reg->MMPR3 = savage_in32(MISC_TIMEOUT_REG, par);
+ }
+
+ vga_out8(0x3d4, 0x3a, par);
+ vga_out8(0x3d5, cr3a, par);
+ vga_out8(0x3d4, 0x66, par);
+ vga_out8(0x3d5, cr66, par);
+}
+
+static void savage_set_default_par(struct savagefb_par *par,
+ struct savage_reg *reg)
+{
+ unsigned char cr3a, cr53, cr66;
+
+ vga_out16(0x3d4, 0x4838, par);
+ vga_out16(0x3d4, 0xa039, par);
+ vga_out16(0x3c4, 0x0608, par);
+
+ vga_out8(0x3d4, 0x66, par);
+ cr66 = vga_in8(0x3d5, par);
+ vga_out8(0x3d5, cr66 | 0x80, par);
+ vga_out8(0x3d4, 0x3a, par);
+ cr3a = vga_in8(0x3d5, par);
+ vga_out8(0x3d5, cr3a | 0x80, par);
+ vga_out8(0x3d4, 0x53, par);
+ cr53 = vga_in8(0x3d5, par);
+ vga_out8(0x3d5, cr53 & 0x7f, par);
+
+ vga_out8(0x3d4, 0x66, par);
+ vga_out8(0x3d5, cr66, par);
+ vga_out8(0x3d4, 0x3a, par);
+ vga_out8(0x3d5, cr3a, par);
+
+ vga_out8(0x3d4, 0x66, par);
+ vga_out8(0x3d5, cr66, par);
+ vga_out8(0x3d4, 0x3a, par);
+ vga_out8(0x3d5, cr3a, par);
+
+ /* unlock extended seq regs */
+ vga_out8(0x3c4, 0x08, par);
+ vga_out8(0x3c5, reg->SR08, par);
+ vga_out8(0x3c5, 0x06, par);
+
+ /* now restore all the extended regs we need */
+ vga_out8(0x3d4, 0x31, par);
+ vga_out8(0x3d5, reg->CR31, par);
+ vga_out8(0x3d4, 0x32, par);
+ vga_out8(0x3d5, reg->CR32, par);
+ vga_out8(0x3d4, 0x34, par);
+ vga_out8(0x3d5, reg->CR34, par);
+ vga_out8(0x3d4, 0x36, par);
+ vga_out8(0x3d5,reg->CR36, par);
+ vga_out8(0x3d4, 0x3a, par);
+ vga_out8(0x3d5, reg->CR3A, par);
+ vga_out8(0x3d4, 0x40, par);
+ vga_out8(0x3d5, reg->CR40, par);
+ vga_out8(0x3d4, 0x42, par);
+ vga_out8(0x3d5, reg->CR42, par);
+ vga_out8(0x3d4, 0x45, par);
+ vga_out8(0x3d5, reg->CR45, par);
+ vga_out8(0x3d4, 0x50, par);
+ vga_out8(0x3d5, reg->CR50, par);
+ vga_out8(0x3d4, 0x51, par);
+ vga_out8(0x3d5, reg->CR51, par);
+ vga_out8(0x3d4, 0x53, par);
+ vga_out8(0x3d5, reg->CR53, par);
+ vga_out8(0x3d4, 0x58, par);
+ vga_out8(0x3d5, reg->CR58, par);
+ vga_out8(0x3d4, 0x60, par);
+ vga_out8(0x3d5, reg->CR60, par);
+ vga_out8(0x3d4, 0x66, par);
+ vga_out8(0x3d5, reg->CR66, par);
+ vga_out8(0x3d4, 0x67, par);
+ vga_out8(0x3d5, reg->CR67, par);
+ vga_out8(0x3d4, 0x68, par);
+ vga_out8(0x3d5, reg->CR68, par);
+ vga_out8(0x3d4, 0x69, par);
+ vga_out8(0x3d5, reg->CR69, par);
+ vga_out8(0x3d4, 0x6f, par);
+ vga_out8(0x3d5, reg->CR6F, par);
+
+ vga_out8(0x3d4, 0x33, par);
+ vga_out8(0x3d5, reg->CR33, par);
+ vga_out8(0x3d4, 0x86, par);
+ vga_out8(0x3d5, reg->CR86, par);
+ vga_out8(0x3d4, 0x88, par);
+ vga_out8(0x3d5, reg->CR88, par);
+ vga_out8(0x3d4, 0x90, par);
+ vga_out8(0x3d5, reg->CR90, par);
+ vga_out8(0x3d4, 0x91, par);
+ vga_out8(0x3d5, reg->CR91, par);
+ vga_out8(0x3d4, 0xb0, par);
+ vga_out8(0x3d5, reg->CRB0, par);