-
-static void w100_InitExtMem(u32 mode)
-{
- switch(mode) {
- case LCD_SHARP_QVGA:
- /* QVGA doesn't use external memory
- nothing to do, really. */
- break;
- case LCD_SHARP_VGA:
- writel(0x00007800, remapped_regs + mmMC_BIST_CTRL);
- writel(0x00040003, remapped_regs + mmMEM_EXT_CNTL);
- writel(0x00200021, remapped_regs + mmMEM_SDRAM_MODE_REG);
- udelay(100);
- writel(0x80200021, remapped_regs + mmMEM_SDRAM_MODE_REG);
- udelay(100);
- writel(0x00650021, remapped_regs + mmMEM_SDRAM_MODE_REG);
- udelay(100);
- writel(0x10002a4a, remapped_regs + mmMEM_EXT_TIMING_CNTL);
- writel(0x7ff87012, remapped_regs + mmMEM_IO_CNTL);
- break;
- default:
- break;
- }
-}
-
-
-#define RESCTL_ADRS 0x00
-#define PHACTRL_ADRS 0x01
-#define DUTYCTRL_ADRS 0x02
-#define POWERREG0_ADRS 0x03
-#define POWERREG1_ADRS 0x04
-#define GPOR3_ADRS 0x05
-#define PICTRL_ADRS 0x06
-#define POLCTRL_ADRS 0x07
-
-#define RESCTL_QVGA 0x01
-#define RESCTL_VGA 0x00
-
-#define POWER1_VW_ON 0x01 /* VW Supply FET ON */
-#define POWER1_GVSS_ON 0x02 /* GVSS(-8V) Power Supply ON */
-#define POWER1_VDD_ON 0x04 /* VDD(8V),SVSS(-4V) Power Supply ON */
-
-#define POWER1_VW_OFF 0x00 /* VW Supply FET OFF */
-#define POWER1_GVSS_OFF 0x00 /* GVSS(-8V) Power Supply OFF */
-#define POWER1_VDD_OFF 0x00 /* VDD(8V),SVSS(-4V) Power Supply OFF */
-
-#define POWER0_COM_DCLK 0x01 /* COM Voltage DC Bias DAC Serial Data Clock */
-#define POWER0_COM_DOUT 0x02 /* COM Voltage DC Bias DAC Serial Data Out */
-#define POWER0_DAC_ON 0x04 /* DAC Power Supply ON */
-#define POWER0_COM_ON 0x08 /* COM Powewr Supply ON */
-#define POWER0_VCC5_ON 0x10 /* VCC5 Power Supply ON */
-
-#define POWER0_DAC_OFF 0x00 /* DAC Power Supply OFF */
-#define POWER0_COM_OFF 0x00 /* COM Powewr Supply OFF */
-#define POWER0_VCC5_OFF 0x00 /* VCC5 Power Supply OFF */
-
-#define PICTRL_INIT_STATE 0x01
-#define PICTRL_INIOFF 0x02
-#define PICTRL_POWER_DOWN 0x04
-#define PICTRL_COM_SIGNAL_OFF 0x08
-#define PICTRL_DAC_SIGNAL_OFF 0x10
-
-#define PICTRL_POWER_ACTIVE (0)
-
-#define POLCTRL_SYNC_POL_FALL 0x01
-#define POLCTRL_EN_POL_FALL 0x02
-#define POLCTRL_DATA_POL_FALL 0x04
-#define POLCTRL_SYNC_ACT_H 0x08
-#define POLCTRL_EN_ACT_L 0x10
-
-#define POLCTRL_SYNC_POL_RISE 0x00
-#define POLCTRL_EN_POL_RISE 0x00
-#define POLCTRL_DATA_POL_RISE 0x00
-#define POLCTRL_SYNC_ACT_L 0x00
-#define POLCTRL_EN_ACT_H 0x00
-
-#define PHACTRL_PHASE_MANUAL 0x01
-
-#define PHAD_QVGA_DEFAULT_VAL (9)
-#define COMADJ_DEFAULT (125)
-
-static void lcdtg_ssp_send(u8 adrs, u8 data)
-{
- w100fb_ssp_send(adrs,data);
-}
-
-/*
- * This is only a psuedo I2C interface. We can't use the standard kernel
- * routines as the interface is write only. We just assume the data is acked...
- */
-static void lcdtg_ssp_i2c_send(u8 data)
-{
- lcdtg_ssp_send(POWERREG0_ADRS, data);
- udelay(10);
-}
-
-static void lcdtg_i2c_send_bit(u8 data)
-{
- lcdtg_ssp_i2c_send(data);
- lcdtg_ssp_i2c_send(data | POWER0_COM_DCLK);
- lcdtg_ssp_i2c_send(data);
-}
-
-static void lcdtg_i2c_send_start(u8 base)
-{
- lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT);
- lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK);
- lcdtg_ssp_i2c_send(base);
-}
-
-static void lcdtg_i2c_send_stop(u8 base)
-{
- lcdtg_ssp_i2c_send(base);
- lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK);
- lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT);
-}
-
-static void lcdtg_i2c_send_byte(u8 base, u8 data)
-{
- int i;
- for (i = 0; i < 8; i++) {
- if (data & 0x80)
- lcdtg_i2c_send_bit(base | POWER0_COM_DOUT);
- else
- lcdtg_i2c_send_bit(base);
- data <<= 1;
- }
-}
-
-static void lcdtg_i2c_wait_ack(u8 base)
-{
- lcdtg_i2c_send_bit(base);
-}
-
-static void lcdtg_set_common_voltage(u8 base_data, u8 data)
-{
- /* Set Common Voltage to M62332FP via I2C */
- lcdtg_i2c_send_start(base_data);
- lcdtg_i2c_send_byte(base_data, 0x9c);
- lcdtg_i2c_wait_ack(base_data);
- lcdtg_i2c_send_byte(base_data, 0x00);
- lcdtg_i2c_wait_ack(base_data);
- lcdtg_i2c_send_byte(base_data, data);
- lcdtg_i2c_wait_ack(base_data);
- lcdtg_i2c_send_stop(base_data);
-}
-
-static struct lcdtg_register_setting {
- u8 adrs;
- u8 data;
- u32 wait;
-} lcdtg_power_on_table[] = {
-
- /* Initialize Internal Logic & Port */
- { PICTRL_ADRS,
- PICTRL_POWER_DOWN | PICTRL_INIOFF | PICTRL_INIT_STATE |
- PICTRL_COM_SIGNAL_OFF | PICTRL_DAC_SIGNAL_OFF,
- 0 },
-
- { POWERREG0_ADRS,
- POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_OFF | POWER0_COM_OFF |
- POWER0_VCC5_OFF,
- 0 },
-
- { POWERREG1_ADRS,
- POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF,
- 0 },
-
- /* VDD(+8V),SVSS(-4V) ON */
- { POWERREG1_ADRS,
- POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON /* VDD ON */,
- 3000 },
-
- /* DAC ON */
- { POWERREG0_ADRS,
- POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON /* DAC ON */ |
- POWER0_COM_OFF | POWER0_VCC5_OFF,
- 0 },
-
- /* INIB = H, INI = L */
- { PICTRL_ADRS,
- /* PICTL[0] = H , PICTL[1] = PICTL[2] = PICTL[4] = L */
- PICTRL_INIT_STATE | PICTRL_COM_SIGNAL_OFF,
- 0 },
-
- /* Set Common Voltage */
- { 0xfe, 0, 0 },
-
- /* VCC5 ON */
- { POWERREG0_ADRS,
- POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON /* DAC ON */ |
- POWER0_COM_OFF | POWER0_VCC5_ON /* VCC5 ON */,
- 0 },
-
- /* GVSS(-8V) ON */
- { POWERREG1_ADRS,
- POWER1_VW_OFF | POWER1_GVSS_ON /* GVSS ON */ |
- POWER1_VDD_ON /* VDD ON */,
- 2000 },
-
- /* COM SIGNAL ON (PICTL[3] = L) */
- { PICTRL_ADRS,
- PICTRL_INIT_STATE,
- 0 },
-
- /* COM ON */
- { POWERREG0_ADRS,
- POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON /* DAC ON */ |
- POWER0_COM_ON /* COM ON */ | POWER0_VCC5_ON /* VCC5_ON */,
- 0 },
-
- /* VW ON */
- { POWERREG1_ADRS,
- POWER1_VW_ON /* VW ON */ | POWER1_GVSS_ON /* GVSS ON */ |
- POWER1_VDD_ON /* VDD ON */,
- 0 /* Wait 100ms */ },
-
- /* Signals output enable */
- { PICTRL_ADRS,
- 0 /* Signals output enable */,
- 0 },
-
- { PHACTRL_ADRS,
- PHACTRL_PHASE_MANUAL,
- 0 },
-
- /* Initialize for Input Signals from ATI */
- { POLCTRL_ADRS,
- POLCTRL_SYNC_POL_RISE | POLCTRL_EN_POL_RISE | POLCTRL_DATA_POL_RISE |
- POLCTRL_SYNC_ACT_L | POLCTRL_EN_ACT_H,
- 1000 /*100000*/ /* Wait 100ms */ },
-
- /* end mark */
- { 0xff, 0, 0 }
-};
-
-static void lcdtg_resume(void)
-{
- if (current_par->lcdMode == LCD_MODE_480 || current_par->lcdMode == LCD_MODE_640) {
- lcdtg_hw_init(LCD_SHARP_VGA);
- } else {
- lcdtg_hw_init(LCD_SHARP_QVGA);
- }
-}
-
-static void lcdtg_suspend(void)
-{
- int i;
-
- for (i = 0; i < (current_par->xres * current_par->yres); i++) {
- writew(0xffff, remapped_fbuf + (2*i));
- }
-
- /* 60Hz x 2 frame = 16.7msec x 2 = 33.4 msec */
- mdelay(34);
-
- /* (1)VW OFF */
- lcdtg_ssp_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON);
-
- /* (2)COM OFF */
- lcdtg_ssp_send(PICTRL_ADRS, PICTRL_COM_SIGNAL_OFF);
- lcdtg_ssp_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON);
-
- /* (3)Set Common Voltage Bias 0V */
- lcdtg_set_common_voltage(POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON, 0);
-
- /* (4)GVSS OFF */
- lcdtg_ssp_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON);
-
- /* (5)VCC5 OFF */
- lcdtg_ssp_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF);
-
- /* (6)Set PDWN, INIOFF, DACOFF */
- lcdtg_ssp_send(PICTRL_ADRS, PICTRL_INIOFF | PICTRL_DAC_SIGNAL_OFF |
- PICTRL_POWER_DOWN | PICTRL_COM_SIGNAL_OFF);
-
- /* (7)DAC OFF */
- lcdtg_ssp_send(POWERREG0_ADRS, POWER0_DAC_OFF | POWER0_COM_OFF | POWER0_VCC5_OFF);
-
- /* (8)VDD OFF */
- lcdtg_ssp_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF);
-
-}
-
-static void lcdtg_set_phadadj(u32 mode)
-{
- int adj;
-
- if (mode == LCD_SHARP_VGA) {
- /* Setting for VGA */
- adj = current_par->phadadj;
- if (adj < 0) {
- adj = PHACTRL_PHASE_MANUAL;
- } else {
- adj = ((adj & 0x0f) << 1) | PHACTRL_PHASE_MANUAL;
- }
- } else {
- /* Setting for QVGA */
- adj = (PHAD_QVGA_DEFAULT_VAL << 1) | PHACTRL_PHASE_MANUAL;
- }
- lcdtg_ssp_send(PHACTRL_ADRS, adj);
-}
-
-static void lcdtg_hw_init(u32 mode)
-{
- int i;
- int comadj;
-
- i = 0;
- while(lcdtg_power_on_table[i].adrs != 0xff) {
- if (lcdtg_power_on_table[i].adrs == 0xfe) {
- /* Set Common Voltage */
- comadj = current_par->comadj;
- if (comadj < 0) {
- comadj = COMADJ_DEFAULT;
- }
- lcdtg_set_common_voltage((POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF), comadj);
- } else if (lcdtg_power_on_table[i].adrs == PHACTRL_ADRS) {
- /* Set Phase Adjuct */
- lcdtg_set_phadadj(mode);
- } else {
- /* Other */
- lcdtg_ssp_send(lcdtg_power_on_table[i].adrs, lcdtg_power_on_table[i].data);
- }
- if (lcdtg_power_on_table[i].wait != 0)
- udelay(lcdtg_power_on_table[i].wait);
- i++;
- }
-
- switch(mode) {
- case LCD_SHARP_QVGA:
- /* Set Lcd Resolution (QVGA) */
- lcdtg_ssp_send(RESCTL_ADRS, RESCTL_QVGA);
- break;
- case LCD_SHARP_VGA:
- /* Set Lcd Resolution (VGA) */
- lcdtg_ssp_send(RESCTL_ADRS, RESCTL_VGA);
- break;
- default:
- break;
- }
-}
-
-static void lcdtg_lcd_change(u32 mode)
-{
- /* Set Phase Adjuct */
- lcdtg_set_phadadj(mode);
-
- if (mode == LCD_SHARP_VGA)
- /* Set Lcd Resolution (VGA) */
- lcdtg_ssp_send(RESCTL_ADRS, RESCTL_VGA);
- else if (mode == LCD_SHARP_QVGA)
- /* Set Lcd Resolution (QVGA) */
- lcdtg_ssp_send(RESCTL_ADRS, RESCTL_QVGA);
-}
-
-
-static struct device_driver w100fb_driver = {
- .name = "w100fb",
- .bus = &platform_bus_type,