+enum omap24xx_save_state {
+ OMAP24XX_SLEEP_SAVE_START = 0,
+ OMAP24XX_SLEEP_SAVE_INTC_MIR0,
+ OMAP24XX_SLEEP_SAVE_INTC_MIR1,
+ OMAP24XX_SLEEP_SAVE_INTC_MIR2,
+
+ OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_MPU,
+ OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_CORE,
+ OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_GFX,
+ OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_DSP,
+ OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_MDM,
+
+ OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_MPU,
+ OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_CORE,
+ OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_GFX,
+ OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_DSP,
+ OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_MDM,
+
+ OMAP24XX_SLEEP_SAVE_CM_IDLEST1_CORE,
+ OMAP24XX_SLEEP_SAVE_CM_IDLEST2_CORE,
+ OMAP24XX_SLEEP_SAVE_CM_IDLEST3_CORE,
+ OMAP24XX_SLEEP_SAVE_CM_IDLEST4_CORE,
+ OMAP24XX_SLEEP_SAVE_CM_IDLEST_GFX,
+ OMAP24XX_SLEEP_SAVE_CM_IDLEST_WKUP,
+ OMAP24XX_SLEEP_SAVE_CM_IDLEST_CKGEN,
+ OMAP24XX_SLEEP_SAVE_CM_IDLEST_DSP,
+ OMAP24XX_SLEEP_SAVE_CM_IDLEST_MDM,
+
+ OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE1_CORE,
+ OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE2_CORE,
+ OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE3_CORE,
+ OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE4_CORE,
+ OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_WKUP,
+ OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_PLL,
+ OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_DSP,
+ OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_MDM,
+
+ OMAP24XX_SLEEP_SAVE_CM_FCLKEN1_CORE,
+ OMAP24XX_SLEEP_SAVE_CM_FCLKEN2_CORE,
+ OMAP24XX_SLEEP_SAVE_CM_ICLKEN1_CORE,
+ OMAP24XX_SLEEP_SAVE_CM_ICLKEN2_CORE,
+ OMAP24XX_SLEEP_SAVE_CM_ICLKEN3_CORE,
+ OMAP24XX_SLEEP_SAVE_CM_ICLKEN4_CORE,
+ OMAP24XX_SLEEP_SAVE_GPIO1_IRQENABLE1,
+ OMAP24XX_SLEEP_SAVE_GPIO2_IRQENABLE1,
+ OMAP24XX_SLEEP_SAVE_GPIO3_IRQENABLE1,
+ OMAP24XX_SLEEP_SAVE_GPIO4_IRQENABLE1,
+ OMAP24XX_SLEEP_SAVE_GPIO3_OE,
+ OMAP24XX_SLEEP_SAVE_GPIO4_OE,
+ OMAP24XX_SLEEP_SAVE_GPIO3_RISINGDETECT,
+ OMAP24XX_SLEEP_SAVE_GPIO3_FALLINGDETECT,
+ OMAP24XX_SLEEP_SAVE_CONTROL_PADCONF_SPI1_NCS2,
+ OMAP24XX_SLEEP_SAVE_CONTROL_PADCONF_MCBSP1_DX,
+ OMAP24XX_SLEEP_SAVE_CONTROL_PADCONF_SSI1_FLAG_TX,
+ OMAP24XX_SLEEP_SAVE_CONTROL_PADCONF_SYS_NIRQW0,
+ OMAP24XX_SLEEP_SAVE_SIZE
+};
+