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fedora core 6 1.2949 + vserver 2.2.0
[linux-2.6.git]
/
include
/
asm-arm
/
arch-s3c2410
/
regs-irq.h
diff --git
a/include/asm-arm/arch-s3c2410/regs-irq.h
b/include/asm-arm/arch-s3c2410/regs-irq.h
index
b6b0223
..
498184c
100644
(file)
--- a/
include/asm-arm/arch-s3c2410/regs-irq.h
+++ b/
include/asm-arm/arch-s3c2410/regs-irq.h
@@
-1,4
+1,4
@@
-/* linux/include/asm/arch-s3c2410/regs-irq.h
+/* linux/include/asm
-arm
/arch-s3c2410/regs-irq.h
*
* Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
* http://www.simtec.co.uk/products/SWLINUX/
*
* Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
* http://www.simtec.co.uk/products/SWLINUX/
@@
-6,13
+6,7
@@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
- *
- *
- *
- * Changelog:
- * 19-06-2003 BJD Created file
- * 12-03-2004 BJD Updated include protection
- */
+*/
#ifndef ___ASM_ARCH_REGS_IRQ_H
#ifndef ___ASM_ARCH_REGS_IRQ_H
@@
-20,8
+14,9
@@
/* interrupt controller */
/* interrupt controller */
-#define S3C2410_IRQREG(x) ((x) + S3C2410_VA_IRQ)
-#define S3C2410_EINTREG(x) ((x) + S3C2410_VA_GPIO)
+#define S3C2410_IRQREG(x) ((x) + S3C24XX_VA_IRQ)
+#define S3C2410_EINTREG(x) ((x) + S3C24XX_VA_GPIO)
+#define S3C24XX_EINTREG(x) ((x) + S3C24XX_VA_GPIO2)
#define S3C2410_SRCPND S3C2410_IRQREG(0x000)
#define S3C2410_INTMOD S3C2410_IRQREG(0x004)
#define S3C2410_SRCPND S3C2410_IRQREG(0x000)
#define S3C2410_INTMOD S3C2410_IRQREG(0x004)
@@
-32,7
+27,17
@@
#define S3C2410_SUBSRCPND S3C2410_IRQREG(0x018)
#define S3C2410_INTSUBMSK S3C2410_IRQREG(0x01C)
#define S3C2410_SUBSRCPND S3C2410_IRQREG(0x018)
#define S3C2410_INTSUBMSK S3C2410_IRQREG(0x01C)
+/* mask: 0=enable, 1=disable
+ * 1 bit EINT, 4=EINT4, 23=EINT23
+ * EINT0,1,2,3 are not handled here.
+*/
+
#define S3C2410_EINTMASK S3C2410_EINTREG(0x0A4)
#define S3C2410_EINTPEND S3C2410_EINTREG(0X0A8)
#define S3C2410_EINTMASK S3C2410_EINTREG(0x0A4)
#define S3C2410_EINTPEND S3C2410_EINTREG(0X0A8)
+#define S3C2412_EINTMASK S3C2410_EINTREG(0x0B4)
+#define S3C2412_EINTPEND S3C2410_EINTREG(0X0B8)
+
+#define S3C24XX_EINTMASK S3C24XX_EINTREG(0x0A4)
+#define S3C24XX_EINTPEND S3C24XX_EINTREG(0X0A8)
#endif /* ___ASM_ARCH_REGS_IRQ_H */
#endif /* ___ASM_ARCH_REGS_IRQ_H */