-static inline int
-futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
-{
- int retval;
-
- if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
- return -EFAULT;
-
- if (cpu_has_llsc && R10000_LLSC_WAR) {
- __asm__ __volatile__(
- "# futex_atomic_cmpxchg_inatomic \n"
- " .set push \n"
- " .set noat \n"
- " .set mips3 \n"
- "1: ll %0, %2 \n"
- " bne %0, %z3, 3f \n"
- " .set mips0 \n"
- " move $1, %z4 \n"
- " .set mips3 \n"
- "2: sc $1, %1 \n"
- " beqzl $1, 1b \n"
- __FUTEX_SMP_SYNC
- "3: \n"
- " .set pop \n"
- " .section .fixup,\"ax\" \n"
- "4: li %0, %5 \n"
- " j 3b \n"
- " .previous \n"
- " .section __ex_table,\"a\" \n"
- " "__UA_ADDR "\t1b, 4b \n"
- " "__UA_ADDR "\t2b, 4b \n"
- " .previous \n"
- : "=&r" (retval), "=R" (*uaddr)
- : "R" (*uaddr), "Jr" (oldval), "Jr" (newval), "i" (-EFAULT)
- : "memory");
- } else if (cpu_has_llsc) {
- __asm__ __volatile__(
- "# futex_atomic_cmpxchg_inatomic \n"
- " .set push \n"
- " .set noat \n"
- " .set mips3 \n"
- "1: ll %0, %2 \n"
- " bne %0, %z3, 3f \n"
- " .set mips0 \n"
- " move $1, %z4 \n"
- " .set mips3 \n"
- "2: sc $1, %1 \n"
- " beqz $1, 1b \n"
- __FUTEX_SMP_SYNC
- "3: \n"
- " .set pop \n"
- " .section .fixup,\"ax\" \n"
- "4: li %0, %5 \n"
- " j 3b \n"
- " .previous \n"
- " .section __ex_table,\"a\" \n"
- " "__UA_ADDR "\t1b, 4b \n"
- " "__UA_ADDR "\t2b, 4b \n"
- " .previous \n"
- : "=&r" (retval), "=R" (*uaddr)
- : "R" (*uaddr), "Jr" (oldval), "Jr" (newval), "i" (-EFAULT)
- : "memory");
- } else
- return -ENOSYS;
-
- return retval;
-}
-