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linux 2.6.16.38 w/ vs2.0.3-rc1
[linux-2.6.git]
/
include
/
asm-mips
/
pgtable-32.h
diff --git
a/include/asm-mips/pgtable-32.h
b/include/asm-mips/pgtable-32.h
index
087c207
..
0cff64c
100644
(file)
--- a/
include/asm-mips/pgtable-32.h
+++ b/
include/asm-mips/pgtable-32.h
@@
-177,67
+177,48
@@
pfn_pte(unsigned long pfn, pgprot_t prot)
((swp_entry_t) { ((type) << 10) | ((offset) << 15) })
/*
((swp_entry_t) { ((type) << 10) | ((offset) << 15) })
/*
- * Bits 0, 4, 8, and 9 are taken, split up 28 bits of offset into this range:
+ * Bits 0, 1, 2, 9 and 10 are taken, split up the 27 bits of offset
+ * into this range:
*/
*/
-#define PTE_FILE_MAX_BITS 2
8
+#define PTE_FILE_MAX_BITS 2
7
-#define pte_to_pgoff(_pte) ((((_pte).pte >> 1 ) & 0x07) | \
- (((_pte).pte >> 2 ) & 0x38) | \
- (((_pte).pte >> 10) << 6 ))
+#define pte_to_pgoff(_pte) \
+ ((((_pte).pte >> 3) & 0x3f ) + (((_pte).pte >> 11) << 8 ))
-#define pgoff_to_pte(off) ((pte_t) { (((off) & 0x07) << 1 ) | \
- (((off) & 0x38) << 2 ) | \
- (((off) >> 6 ) << 10) | \
- _PAGE_FILE })
+#define pgoff_to_pte(off) \
+ ((pte_t) { (((off) & 0x3f) << 3) + (((off) >> 8) << 11) + _PAGE_FILE })
#else
/* Swap entries must have VALID and GLOBAL bits cleared. */
#else
/* Swap entries must have VALID and GLOBAL bits cleared. */
-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
-#define __swp_type(x) (((x).val >> 2) & 0x1f)
-#define __swp_offset(x) ((x).val >> 7)
-#define __swp_entry(type,offset) \
- ((swp_entry_t) { ((type) << 2) | ((offset) << 7) })
-#else
#define __swp_type(x) (((x).val >> 8) & 0x1f)
#define __swp_type(x) (((x).val >> 8) & 0x1f)
-#define __swp_offset(x) ((x).val >> 13)
+#define __swp_offset(x)
((x).val >> 13)
#define __swp_entry(type,offset) \
#define __swp_entry(type,offset) \
- ((swp_entry_t) { ((type) << 8) | ((offset) << 13) })
-#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) */
+ ((swp_entry_t) { ((type) << 8) | ((offset) << 13) })
-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
/*
/*
- * Bits 0 and 1 of pte_high are taken, use the rest for the page offset...
+ * Bits 0, 1, 2, 7 and 8 are taken, split up the 27 bits of offset
+ * into this range:
*/
*/
-#define PTE_FILE_MAX_BITS
30
+#define PTE_FILE_MAX_BITS
27
-#define pte_to_pgoff(_pte) ((_pte).pte_high >> 2)
-#define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) << 2 })
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
+ /* fixme */
+#define pte_to_pgoff(_pte) (((_pte).pte_high >> 6) + ((_pte).pte_high & 0x3f))
+#define pgoff_to_pte(off) \
+ ((pte_t){(((off) & 0x3f) + ((off) << 6) + _PAGE_FILE)})
#else
#else
-/*
- * Bits 0, 4, 6, and 7 are taken, split up 28 bits of offset into this range:
- */
-#define PTE_FILE_MAX_BITS 28
-
-#define pte_to_pgoff(_pte) ((((_pte).pte >> 1) & 0x7) | \
- (((_pte).pte >> 2) & 0x8) | \
- (((_pte).pte >> 8) << 4))
+#define pte_to_pgoff(_pte) \
+ ((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 ))
-#define pgoff_to_pte(off) ((pte_t) { (((off) & 0x7) << 1) | \
- (((off) & 0x8) << 2) | \
- (((off) >> 4) << 8) | \
- _PAGE_FILE })
+#define pgoff_to_pte(off) \
+ ((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE })
#endif
#endif
#endif
#endif
-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
-#define __pte_to_swp_entry(pte) ((swp_entry_t) { (pte).pte_high })
-#define __swp_entry_to_pte(x) ((pte_t) { 0, (x).val })
-#else
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
-#endif
#endif /* _ASM_PGTABLE_32_H */
#endif /* _ASM_PGTABLE_32_H */