+#elif defined(CONFIG_CPU_RM9000)
+
+#define _CACHE_WT (0 << 9)
+#define _CACHE_WTWA (1 << 9)
+#define _CACHE_UC_B (2 << 9)
+#define _CACHE_WB (3 << 9)
+#define _CACHE_CWBEA (4 << 9)
+#define _CACHE_CWB (5 << 9)
+#define _CACHE_UCNB (6 << 9)
+#define _CACHE_FPC (7 << 9)
+
+#define _CACHE_UNCACHED _CACHE_UC_B
+#define _CACHE_CACHABLE_NONCOHERENT _CACHE_WB
+