- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# _raw_spin_trylock\n\t"
- "1:\tll\t%0, %3\n\t"
- "ori\t%2, %0, 1\n\t"
- "sc\t%2, %1\n\t"
- "beqz\t%2, 1b\n\t"
- " andi\t%2, %0, 1\n\t"
- ".set\treorder"
- : "=&r" (temp), "=m" (lock->lock), "=&r" (res)
- : "m" (lock->lock)
- : "memory");
+ if (R10000_LLSC_WAR) {
+ __asm__ __volatile__(
+ " .set noreorder # __raw_spin_trylock \n"
+ "1: ll %0, %3 \n"
+ " ori %2, %0, 1 \n"
+ " sc %2, %1 \n"
+ " beqzl %2, 1b \n"
+ " nop \n"
+ " andi %2, %0, 1 \n"
+ " sync \n"
+ " .set reorder"
+ : "=&r" (temp), "=m" (lock->lock), "=&r" (res)
+ : "m" (lock->lock)
+ : "memory");
+ } else {
+ __asm__ __volatile__(
+ " .set noreorder # __raw_spin_trylock \n"
+ "1: ll %0, %3 \n"
+ " ori %2, %0, 1 \n"
+ " sc %2, %1 \n"
+ " beqz %2, 1b \n"
+ " andi %2, %0, 1 \n"
+ " sync \n"
+ " .set reorder"
+ : "=&r" (temp), "=m" (lock->lock), "=&r" (res)
+ : "m" (lock->lock)
+ : "memory");
+ }