-
-/*
- * OCP Related Definitions
- */
-typedef struct {
- u8 mirror_regs;
- u8 cache_mgmt;
- u8 max_idle;
- int default_baud;
- int default_bits;
- int default_parity;
- int default_flow;
- u32 chr_1_val;
- u32 chr_2_val;
- u32 chr_10_val;
- u32 mpcr_val;
- u32 mrr_val;
- u32 rcrr_val;
- u32 tcrr_val;
- u32 intr_mask_val;
- u32 bcr_val;
- u32 sdma_irq;
- u8 brg_can_tune;
- u8 brg_clk_src;
- u32 brg_clk_freq;
-} mv64x60_ocp_mpsc_data_t;
-
-#define MV64x60_OCP_SYSFS_MPSC_DATA() \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "%d\n", mpsc, mirror_regs) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "%d\n", mpsc, cache_mgmt) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "%d\n", mpsc, max_idle) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "%d\n", mpsc, default_baud) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "%d\n", mpsc, default_bits) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "%c\n", mpsc, default_parity) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "%c\n", mpsc, default_flow) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "0x%x\n", mpsc, chr_1_val) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "0x%x\n", mpsc, chr_2_val) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "0x%x\n", mpsc, chr_10_val) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "0x%x\n", mpsc, mpcr_val) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "0x%x\n", mpsc, mrr_val) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "0x%x\n", mpsc, rcrr_val) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "0x%x\n", mpsc, tcrr_val) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "0x%x\n", mpsc, intr_mask_val) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "0x%x\n", mpsc, bcr_val) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "%d\n", mpsc, sdma_irq) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "%d\n", mpsc, brg_can_tune) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "%d\n", mpsc, brg_clk_src) \
-OCP_SYSFS_ADDTL(mv64x60_ocp_mpsc_data_t, "%d\n", mpsc, brg_clk_freq) \
- \
-void \
-mv64x60_ocp_show_mpsc(struct device *dev) \
-{ \
- device_create_file(dev, &dev_attr_mpsc_mirror_regs); \
- device_create_file(dev, &dev_attr_mpsc_cache_mgmt); \
- device_create_file(dev, &dev_attr_mpsc_max_idle); \
- device_create_file(dev, &dev_attr_mpsc_default_baud); \
- device_create_file(dev, &dev_attr_mpsc_default_bits); \
- device_create_file(dev, &dev_attr_mpsc_default_parity); \
- device_create_file(dev, &dev_attr_mpsc_default_flow); \
- device_create_file(dev, &dev_attr_mpsc_chr_1_val); \
- device_create_file(dev, &dev_attr_mpsc_chr_2_val); \
- device_create_file(dev, &dev_attr_mpsc_chr_10_val); \
- device_create_file(dev, &dev_attr_mpsc_mpcr_val); \
- device_create_file(dev, &dev_attr_mpsc_mrr_val); \
- device_create_file(dev, &dev_attr_mpsc_rcrr_val); \
- device_create_file(dev, &dev_attr_mpsc_tcrr_val); \
- device_create_file(dev, &dev_attr_mpsc_intr_mask_val); \
- device_create_file(dev, &dev_attr_mpsc_bcr_val); \
- device_create_file(dev, &dev_attr_mpsc_sdma_irq); \
- device_create_file(dev, &dev_attr_mpsc_brg_can_tune); \
- device_create_file(dev, &dev_attr_mpsc_brg_clk_src); \
- device_create_file(dev, &dev_attr_mpsc_brg_clk_freq); \
-}
+void mv64360_init_irq(void);
+int mv64360_get_irq(struct pt_regs *regs);
+
+u32 mv64x60_mask(u32 val, u32 num_bits);
+u32 mv64x60_shift_left(u32 val, u32 num_bits);
+u32 mv64x60_shift_right(u32 val, u32 num_bits);
+u32 mv64x60_calc_mem_size(struct mv64x60_handle *bh,
+ u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2]);
+
+void mv64x60_progress_init(u32 base);
+void mv64x60_mpsc_progress(char *s, unsigned short hex);
+
+extern struct mv64x60_32bit_window
+ gt64260_32bit_windows[MV64x60_32BIT_WIN_COUNT];
+extern struct mv64x60_64bit_window
+ gt64260_64bit_windows[MV64x60_64BIT_WIN_COUNT];
+extern struct mv64x60_32bit_window
+ mv64360_32bit_windows[MV64x60_32BIT_WIN_COUNT];
+extern struct mv64x60_64bit_window
+ mv64360_64bit_windows[MV64x60_64BIT_WIN_COUNT];