-/*=====================================================================================
- * CACHE_LINE_1 0x0000 - 0x007F
- *=====================================================================================
- */
- struct ItLpPaca *xLpPacaPtr; /* Pointer to LpPaca for PLIC 0x00 */
- struct ItLpRegSave *xLpRegSavePtr; /* Pointer to LpRegSave for PLIC 0x08 */
- u64 xCurrent; /* Pointer to current 0x10 */
- u16 xPacaIndex; /* Logical processor number 0x18 */
- u16 xHwProcNum; /* Physical processor number 0x1A */
- u32 default_decr; /* Default decrementer value 0x1c */
- u64 xKsave; /* Saved Kernel stack addr or zero 0x20 */
- struct ItLpQueue *lpQueuePtr; /* LpQueue handled by this processor 0x28 */
- u64 xTOC; /* Kernel TOC address 0x30 */
- STAB xStab_data; /* Segment table information 0x38,0x40,0x48 */
- u8 *exception_sp; /* 0x50 */
- u8 xProcEnabled; /* 0x58 */
- u8 prof_enabled; /* 1=iSeries profiling enabled 0x59 */
- u8 resv1[38]; /* 0x5a-0x7f*/
+ /*
+ * Because hw_cpu_id, unlike other paca fields, is accessed
+ * routinely from other CPUs (from the IRQ code), we stick to
+ * read-only (after boot) fields in the first cacheline to
+ * avoid cacheline bouncing.
+ */