-#define INTC_IRR0 0xA4140004UL
-
-#define PORT_PACR 0xA4050100UL
-#define PORT_PBCR 0xA4050102UL
-#define PORT_PCCR 0xA4050104UL
-#define PORT_PDCR 0xA4050106UL
-#define PORT_PECR 0xA4050108UL
-#define PORT_PFCR 0xA405010AUL
-#define PORT_PGCR 0xA405010CUL
-#define PORT_PHCR 0xA405010EUL
-#define PORT_PJCR 0xA4050110UL
-#define PORT_PKCR 0xA4050112UL
-#define PORT_PLCR 0xA4050114UL
-#define PORT_SCPCR 0xA4050116UL
-#define PORT_PMCR 0xA4050118UL
-#define PORT_PNCR 0xA405011AUL
-#define PORT_PQCR 0xA405011CUL
-
-#define PORT_PSELA 0xA4050140UL
-#define PORT_PSELB 0xA4050142UL
-#define PORT_PSELC 0xA4050144UL
-
-#define PORT_HIZCRA 0xA4050146UL
-#define PORT_HIZCRB 0xA4050148UL
-#define PORT_DRVCR 0xA4050150UL
-
-#define PORT_PADR 0xA4050120UL
-#define PORT_PBDR 0xA4050122UL
-#define PORT_PCDR 0xA4050124UL
-#define PORT_PDDR 0xA4050126UL
-#define PORT_PEDR 0xA4050128UL
-#define PORT_PFDR 0xA405012AUL
-#define PORT_PGDR 0xA405012CUL
-#define PORT_PHDR 0xA405012EUL
-#define PORT_PJDR 0xA4050130UL
-#define PORT_PKDR 0xA4050132UL
-#define PORT_PLDR 0xA4050134UL
-#define PORT_SCPDR 0xA4050136UL
-#define PORT_PMDR 0xA4050138UL
-#define PORT_PNDR 0xA405013AUL
-#define PORT_PQDR 0xA405013CUL
-
-#define IRQ0_IRQ 32
-#define IRQ1_IRQ 33
-#define IRQ2_IRQ 34
-#define IRQ3_IRQ 35
-#define IRQ4_IRQ 36
-#define IRQ5_IRQ 37
-
-#define IRQ0_IPR_ADDR INTC_IPRC
-#define IRQ1_IPR_ADDR INTC_IPRC
-#define IRQ2_IPR_ADDR INTC_IPRC
-#define IRQ3_IPR_ADDR INTC_IPRC
-#define IRQ4_IPR_ADDR INTC_IPRD
-#define IRQ5_IPR_ADDR INTC_IPRD
-
-#define IRQ0_IPR_POS 0
-#define IRQ1_IPR_POS 1
-#define IRQ2_IPR_POS 2
-#define IRQ3_IPR_POS 3
-#define IRQ4_IPR_POS 0
-#define IRQ5_IPR_POS 1
-
-#define IRQ0_PRIORITY 1
-#define IRQ1_PRIORITY 1
-#define IRQ2_PRIORITY 1
-#define IRQ3_PRIORITY 1
-#define IRQ4_PRIORITY 1
-#define IRQ5_PRIORITY 1
-
-extern int ipr_irq_demux(int irq);
-#define __irq_demux(irq) ipr_irq_demux(irq)
-
-#elif defined(CONFIG_CPU_SUBTYPE_SH7604)
-#define INTC_IPRA 0xfffffee2UL
-#define INTC_IPRB 0xfffffe60UL
-
-#define INTC_VCRA 0xfffffe62UL
-#define INTC_VCRB 0xfffffe64UL
-#define INTC_VCRC 0xfffffe66UL
-#define INTC_VCRD 0xfffffe68UL
-
-#define INTC_VCRWDT 0xfffffee4UL
-#define INTC_VCRDIV 0xffffff0cUL
-#define INTC_VCRDMA0 0xffffffa0UL
-#define INTC_VCRDMA1 0xffffffa8UL
-
-#define INTC_ICR 0xfffffee0UL
-#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
- defined(CONFIG_CPU_SUBTYPE_SH7707) || \
- defined(CONFIG_CPU_SUBTYPE_SH7709)
-#define INTC_IRR0 0xa4000004UL
-#define INTC_IRR1 0xa4000006UL
-#define INTC_IRR2 0xa4000008UL
-
-#define INTC_ICR0 0xfffffee0UL
-#define INTC_ICR1 0xa4000010UL
-#define INTC_ICR2 0xa4000012UL
-#define INTC_INTER 0xa4000014UL
-
-#define INTC_IPRC 0xa4000016UL
-#define INTC_IPRD 0xa4000018UL
-#define INTC_IPRE 0xa400001aUL
-#if defined(CONFIG_CPU_SUBTYPE_SH7707)
-#define INTC_IPRF 0xa400001cUL
-#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
-#define INTC_IPRF 0xa4080000UL
-#define INTC_IPRG 0xa4080002UL
-#define INTC_IPRH 0xa4080004UL
-#endif
-
-#define PORT_PACR 0xa4000100UL
-#define PORT_PBCR 0xa4000102UL
-#define PORT_PCCR 0xa4000104UL
-#define PORT_PFCR 0xa400010aUL
-#define PORT_PADR 0xa4000120UL
-#define PORT_PBDR 0xa4000122UL
-#define PORT_PCDR 0xa4000124UL
-#define PORT_PFDR 0xa400012aUL
-
-#define IRQ0_IRQ 32
-#define IRQ1_IRQ 33
-#define IRQ2_IRQ 34
-#define IRQ3_IRQ 35
-#define IRQ4_IRQ 36
-#define IRQ5_IRQ 37
-
-#define IRQ0_IPR_ADDR INTC_IPRC
-#define IRQ1_IPR_ADDR INTC_IPRC
-#define IRQ2_IPR_ADDR INTC_IPRC
-#define IRQ3_IPR_ADDR INTC_IPRC
-#define IRQ4_IPR_ADDR INTC_IPRD
-#define IRQ5_IPR_ADDR INTC_IPRD
-
-#define IRQ0_IPR_POS 0
-#define IRQ1_IPR_POS 1
-#define IRQ2_IPR_POS 2
-#define IRQ3_IPR_POS 3
-#define IRQ4_IPR_POS 0
-#define IRQ5_IPR_POS 1
-
-#define IRQ0_PRIORITY 1
-#define IRQ1_PRIORITY 1
-#define IRQ2_PRIORITY 1
-#define IRQ3_PRIORITY 1
-#define IRQ4_PRIORITY 1
-#define IRQ5_PRIORITY 1
-
-#define PINT0_IRQ 40
-#define PINT8_IRQ 41
-
-#define PINT0_IPR_ADDR INTC_IPRD
-#define PINT8_IPR_ADDR INTC_IPRD
-
-#define PINT0_IPR_POS 3
-#define PINT8_IPR_POS 2
-#define PINT0_PRIORITY 2
-#define PINT8_PRIORITY 2
-
-extern int ipr_irq_demux(int irq);
-#define __irq_demux(irq) ipr_irq_demux(irq)
-#endif /* CONFIG_CPU_SUBTYPE_SH7707 || CONFIG_CPU_SUBTYPE_SH7709 */
-
-#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) || \
- defined(CONFIG_CPU_SUBTYPE_ST40STB1) || defined(CONFIG_CPU_SUBTYPE_SH4_202)
-#define INTC_ICR 0xffd00000
-#define INTC_ICR_NMIL (1<<15)
-#define INTC_ICR_MAI (1<<14)
-#define INTC_ICR_NMIB (1<<9)
-#define INTC_ICR_NMIE (1<<8)
-#define INTC_ICR_IRLM (1<<7)
-#endif
-
-#ifdef CONFIG_CPU_SUBTYPE_SH7780
-#include <asm/irq-sh7780.h>
-#endif