an SDTR with an offset of 0 to be sure the target
knows we are async. This works around a firmware defect
in the Quantum Atlas 10K.
- - Implement controller susupend and resume.
+ - Implement controller suspend and resume.
- Clear PCI error state during driver attach so that we
don't disable memory mapped I/O due to a stray write
by some other driver probe that occurred before we
- Add support for scsi_report_device_reset() found in
2.5.X kernels.
- Add 7901B support.
- - Simplify handling of the packtized lun Rev A workaround.
+ - Simplify handling of the packetized lun Rev A workaround.
- Correct and simplify handling of the ignore wide residue
message. The previous code would fail to report a residual
if the transaction data length was even and we received
- Correct a reference to free'ed memory during controller
shutdown.
- Reset the bus on an SE->LVD change. This is required
- to reset our transcievers.
+ to reset our transceivers.
1.3.5 (March 24th, 2003)
- Fix a few register window mode bugs.
1.3.0 (January 21st, 2003)
- Full regression testing for all U320 products completed.
- Added abort and target/lun reset error recovery handler and
- interrupt coalessing.
+ interrupt coalescing.
1.2.0 (November 14th, 2002)
- Added support for Domain Validation