* Started hacking from linux-2.3.30pre6/arch/i386/kernel/i8259.c.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/cache.h>
#include <linux/sched.h>
/* Note mask bit is true for DISABLED irqs. */
static unsigned int cached_irq_mask = 0xffff;
-static spinlock_t i8259_irq_lock = SPIN_LOCK_UNLOCKED;
+static DEFINE_SPINLOCK(i8259_irq_lock);
static inline void
i8259_update_irq_hw(unsigned int irq, unsigned long mask)
for (i = 0; i < 16; i++) {
irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].handler = &i8259a_irq_type;
+ irq_desc[i].chip = &i8259a_irq_type;
}
setup_irq(2, &cascade);
#if defined(IACK_SC)
void
-isa_device_interrupt(unsigned long vector, struct pt_regs *regs)
+isa_device_interrupt(unsigned long vector)
{
/*
* Generate a PCI interrupt acknowledge cycle. The PIC will
*/
int j = *(vuip) IACK_SC;
j &= 0xff;
- handle_irq(j, regs);
+ handle_irq(j);
}
#endif
#if defined(CONFIG_ALPHA_GENERIC) || !defined(IACK_SC)
void
-isa_no_iack_sc_device_interrupt(unsigned long vector, struct pt_regs *regs)
+isa_no_iack_sc_device_interrupt(unsigned long vector)
{
unsigned long pic;
while (pic) {
int j = ffz(~pic);
pic &= pic - 1;
- handle_irq(j, regs);
+ handle_irq(j);
}
}
#endif