fedora core 6 1.2949 + vserver 2.2.0
[linux-2.6.git] / arch / alpha / kernel / sys_titan.c
index 1114bf7..29ab7db 100644 (file)
  *     Granite
  */
 
-#include <linux/config.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <linux/mm.h>
 #include <linux/sched.h>
 #include <linux/pci.h>
 #include <linux/init.h>
+#include <linux/bitops.h>
 
 #include <asm/ptrace.h>
 #include <asm/system.h>
 #include <asm/dma.h>
 #include <asm/irq.h>
-#include <asm/bitops.h>
 #include <asm/mmu_context.h>
 #include <asm/io.h>
 #include <asm/pgtable.h>
@@ -56,7 +55,7 @@ static unsigned long titan_cached_irq_mask;
 /*
  * Need SMP-safe access to interrupt CSRs
  */
-spinlock_t titan_irq_lock = SPIN_LOCK_UNLOCKED;
+DEFINE_SPINLOCK(titan_irq_lock);
 
 static void
 titan_update_irq_hw(unsigned long mask)
@@ -66,7 +65,7 @@ titan_update_irq_hw(unsigned long mask)
        register int bcpu = boot_cpuid;
 
 #ifdef CONFIG_SMP
-       register unsigned long cpm = cpu_present_mask;
+       cpumask_t cpm = cpu_present_map;
        volatile unsigned long *dim0, *dim1, *dim2, *dim3;
        unsigned long mask0, mask1, mask2, mask3, dummy;
 
@@ -85,10 +84,10 @@ titan_update_irq_hw(unsigned long mask)
        dim1 = &cchip->dim1.csr;
        dim2 = &cchip->dim2.csr;
        dim3 = &cchip->dim3.csr;
-       if ((cpm & 1) == 0) dim0 = &dummy;
-       if ((cpm & 2) == 0) dim1 = &dummy;
-       if ((cpm & 4) == 0) dim2 = &dummy;
-       if ((cpm & 8) == 0) dim3 = &dummy;
+       if (!cpu_isset(0, cpm)) dim0 = &dummy;
+       if (!cpu_isset(1, cpm)) dim1 = &dummy;
+       if (!cpu_isset(2, cpm)) dim2 = &dummy;
+       if (!cpu_isset(3, cpm)) dim3 = &dummy;
 
        *dim0 = mask0;
        *dim1 = mask1;
@@ -145,12 +144,12 @@ titan_end_irq(unsigned int irq)
 }
 
 static void
-titan_cpu_set_irq_affinity(unsigned int irq, unsigned long affinity)
+titan_cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity)
 {
        int cpu;
 
        for (cpu = 0; cpu < 4; cpu++) {
-               if (affinity & (1UL << cpu))
+               if (cpu_isset(cpu, affinity))
                        titan_cpu_irq_affinity[cpu] |= 1UL << irq;
                else
                        titan_cpu_irq_affinity[cpu] &= ~(1UL << irq);
@@ -159,7 +158,7 @@ titan_cpu_set_irq_affinity(unsigned int irq, unsigned long affinity)
 }
 
 static void
-titan_set_irq_affinity(unsigned int irq, unsigned long affinity)
+titan_set_irq_affinity(unsigned int irq, cpumask_t affinity)
 { 
        spin_lock(&titan_irq_lock);
        titan_cpu_set_irq_affinity(irq - 16, affinity);
@@ -168,18 +167,18 @@ titan_set_irq_affinity(unsigned int irq, unsigned long affinity)
 }
 
 static void
-titan_device_interrupt(unsigned long vector, struct pt_regs * regs)
+titan_device_interrupt(unsigned long vector)
 {
        printk("titan_device_interrupt: NOT IMPLEMENTED YET!! \n");
 }
 
 static void 
-titan_srm_device_interrupt(unsigned long vector, struct pt_regs * regs)
+titan_srm_device_interrupt(unsigned long vector)
 {
        int irq;
 
        irq = (vector - 0x800) >> 4;
-       handle_irq(irq, regs);
+       handle_irq(irq);
 }
 
 
@@ -189,7 +188,7 @@ init_titan_irqs(struct hw_interrupt_type * ops, int imin, int imax)
        long i;
        for (i = imin; i <= imax; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = ops;
+               irq_desc[i].chip = ops;
        }
 }
 
@@ -205,7 +204,7 @@ static struct hw_interrupt_type titan_irq_type = {
 };
 
 static irqreturn_t
-titan_intr_nop(int irq, void *dev_id, struct pt_regs *regs)                    
+titan_intr_nop(int irq, void *dev_id)
 {
       /*
        * This is a NOP interrupt handler for the purposes of
@@ -244,7 +243,7 @@ titan_legacy_init_irq(void)
 }
 
 void
-titan_dispatch_irqs(u64 mask, struct pt_regs *regs)
+titan_dispatch_irqs(u64 mask)
 {
        unsigned long vector;
 
@@ -264,7 +263,7 @@ titan_dispatch_irqs(u64 mask, struct pt_regs *regs)
                vector = 0x900 + (vector << 4); /* convert to SRM vector */
                
                /* dispatch it */
-               alpha_mv.device_interrupt(vector, regs);
+               alpha_mv.device_interrupt(vector);
        }
 }
   
@@ -280,15 +279,15 @@ titan_late_init(void)
         * all reported to the kernel as machine checks, so the handler
         * is a nop so it can be called to count the individual events.
         */
-       request_irq(63+16, titan_intr_nop, SA_INTERRUPT, 
+       request_irq(63+16, titan_intr_nop, IRQF_DISABLED,
                    "CChip Error", NULL);
-       request_irq(62+16, titan_intr_nop, SA_INTERRUPT, 
+       request_irq(62+16, titan_intr_nop, IRQF_DISABLED,
                    "PChip 0 H_Error", NULL);
-       request_irq(61+16, titan_intr_nop, SA_INTERRUPT, 
+       request_irq(61+16, titan_intr_nop, IRQF_DISABLED,
                    "PChip 1 H_Error", NULL);
-       request_irq(60+16, titan_intr_nop, SA_INTERRUPT, 
+       request_irq(60+16, titan_intr_nop, IRQF_DISABLED,
                    "PChip 0 C_Error", NULL);
-       request_irq(59+16, titan_intr_nop, SA_INTERRUPT, 
+       request_irq(59+16, titan_intr_nop, IRQF_DISABLED,
                    "PChip 1 C_Error", NULL);
 
        /* 
@@ -349,9 +348,9 @@ privateer_init_pci(void)
         * Hook a couple of extra err interrupts that the
         * common titan code won't.
         */
-       request_irq(53+16, titan_intr_nop, SA_INTERRUPT, 
+       request_irq(53+16, titan_intr_nop, IRQF_DISABLED,
                    "NMI", NULL);
-       request_irq(50+16, titan_intr_nop, SA_INTERRUPT, 
+       request_irq(50+16, titan_intr_nop, IRQF_DISABLED,
                    "Temperature Warning", NULL);
 
        /*
@@ -369,7 +368,6 @@ struct alpha_machine_vector titan_mv __initmv = {
        DO_EV6_MMU,
        DO_DEFAULT_RTC,
        DO_TITAN_IO,
-       DO_TITAN_BUS,
        .machine_check          = titan_machine_check,
        .max_isa_dma_address    = ALPHA_MAX_ISA_DMA_ADDRESS,
        .min_io_address         = DEFAULT_IO_BASE,
@@ -397,7 +395,6 @@ struct alpha_machine_vector privateer_mv __initmv = {
        DO_EV6_MMU,
        DO_DEFAULT_RTC,
        DO_TITAN_IO,
-       DO_TITAN_BUS,
        .machine_check          = privateer_machine_check,
        .max_isa_dma_address    = ALPHA_MAX_ISA_DMA_ADDRESS,
        .min_io_address         = DEFAULT_IO_BASE,