Fedora kernel-2.6.17-1.2142_FC4 patched with stable patch-2.6.17.4-vs2.0.2-rc26.diff
[linux-2.6.git] / arch / arm / mach-integrator / integrator_cp.c
index 0f5fc78..9f55f5a 100644 (file)
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/list.h>
-#include <linux/device.h>
+#include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/slab.h>
 #include <linux/string.h>
 #include <linux/sysdev.h>
+#include <linux/amba/bus.h>
+#include <linux/amba/kmi.h>
+#include <linux/amba/clcd.h>
 
 #include <asm/hardware.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/setup.h>
 #include <asm/mach-types.h>
-#include <asm/hardware/amba.h>
-#include <asm/hardware/amba_kmi.h>
-#include <asm/hardware/amba_clcd.h>
 #include <asm/hardware/icst525.h>
 
 #include <asm/arch/cm.h>
@@ -35,7 +35,9 @@
 #include <asm/mach/irq.h>
 #include <asm/mach/mmc.h>
 #include <asm/mach/map.h>
+#include <asm/mach/time.h>
 
+#include "common.h"
 #include "clock.h"
 
 #define INTCP_PA_MMC_BASE              0x1c000000
  */
 
 static struct map_desc intcp_io_desc[] __initdata = {
- { IO_ADDRESS(INTEGRATOR_HDR_BASE),   INTEGRATOR_HDR_BASE,   SZ_4K,  MT_DEVICE },
- { IO_ADDRESS(INTEGRATOR_SC_BASE),    INTEGRATOR_SC_BASE,    SZ_4K,  MT_DEVICE },
- { IO_ADDRESS(INTEGRATOR_EBI_BASE),   INTEGRATOR_EBI_BASE,   SZ_4K,  MT_DEVICE },
- { IO_ADDRESS(INTEGRATOR_CT_BASE),    INTEGRATOR_CT_BASE,    SZ_4K,  MT_DEVICE },
- { IO_ADDRESS(INTEGRATOR_IC_BASE),    INTEGRATOR_IC_BASE,    SZ_4K,  MT_DEVICE },
- { IO_ADDRESS(INTEGRATOR_UART0_BASE), INTEGRATOR_UART0_BASE, SZ_4K,  MT_DEVICE },
- { IO_ADDRESS(INTEGRATOR_UART1_BASE), INTEGRATOR_UART1_BASE, SZ_4K,  MT_DEVICE },
- { IO_ADDRESS(INTEGRATOR_DBG_BASE),   INTEGRATOR_DBG_BASE,   SZ_4K,  MT_DEVICE },
- { IO_ADDRESS(INTEGRATOR_GPIO_BASE),  INTEGRATOR_GPIO_BASE,  SZ_4K,  MT_DEVICE },
- { 0xfc900000, 0xc9000000, SZ_4K, MT_DEVICE },
- { 0xfca00000, 0xca000000, SZ_4K, MT_DEVICE },
- { 0xfcb00000, 0xcb000000, SZ_4K, MT_DEVICE },
+       {
+               .virtual        = IO_ADDRESS(INTEGRATOR_HDR_BASE),
+               .pfn            = __phys_to_pfn(INTEGRATOR_HDR_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE
+       }, {
+               .virtual        = IO_ADDRESS(INTEGRATOR_SC_BASE),
+               .pfn            = __phys_to_pfn(INTEGRATOR_SC_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE
+       }, {
+               .virtual        = IO_ADDRESS(INTEGRATOR_EBI_BASE),
+               .pfn            = __phys_to_pfn(INTEGRATOR_EBI_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE
+       }, {
+               .virtual        = IO_ADDRESS(INTEGRATOR_CT_BASE),
+               .pfn            = __phys_to_pfn(INTEGRATOR_CT_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE
+       }, {
+               .virtual        = IO_ADDRESS(INTEGRATOR_IC_BASE),
+               .pfn            = __phys_to_pfn(INTEGRATOR_IC_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE
+       }, {
+               .virtual        = IO_ADDRESS(INTEGRATOR_UART0_BASE),
+               .pfn            = __phys_to_pfn(INTEGRATOR_UART0_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE
+       }, {
+               .virtual        = IO_ADDRESS(INTEGRATOR_UART1_BASE),
+               .pfn            = __phys_to_pfn(INTEGRATOR_UART1_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE
+       }, {
+               .virtual        = IO_ADDRESS(INTEGRATOR_DBG_BASE),
+               .pfn            = __phys_to_pfn(INTEGRATOR_DBG_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE
+       }, {
+               .virtual        = IO_ADDRESS(INTEGRATOR_GPIO_BASE),
+               .pfn            = __phys_to_pfn(INTEGRATOR_GPIO_BASE),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE
+       }, {
+               .virtual        = 0xfca00000,
+               .pfn            = __phys_to_pfn(0xca000000),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE
+       }, {
+               .virtual        = 0xfcb00000,
+               .pfn            = __phys_to_pfn(0xcb000000),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE
+       }
 };
 
 static void __init intcp_map_io(void)
@@ -169,7 +215,7 @@ sic_handle_irq(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
                irq += IRQ_SIC_START;
 
                desc = irq_desc + irq;
-               desc->handle(irq, desc, regs);
+               desc_handle_irq(irq, desc, regs);
        } while (status);
 }
 
@@ -186,8 +232,6 @@ static void __init intcp_init_irq(void)
        for (i = IRQ_PIC_START; i <= IRQ_PIC_END; i++) {
                if (i == 11)
                        i = 22;
-               if (i == IRQ_CP_CPPLDINT)
-                       i++;
                if (i == 29)
                        break;
                set_irq_chip(i, &pic_chip);
@@ -213,8 +257,7 @@ static void __init intcp_init_irq(void)
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
 
-       set_irq_handler(IRQ_CP_CPPLDINT, sic_handle_irq);
-       pic_unmask_irq(IRQ_CP_CPPLDINT);
+       set_irq_chained_handler(IRQ_CP_CPPLDINT, sic_handle_irq);
 }
 
 /*
@@ -418,7 +461,24 @@ static struct clcd_panel vga = {
  */
 static void cp_clcd_enable(struct clcd_fb *fb)
 {
-       cm_control(CM_CTRL_LCDMUXSEL_MASK, CM_CTRL_LCDMUXSEL_VGA);
+       u32 val;
+
+       if (fb->fb.var.bits_per_pixel <= 8)
+               val = CM_CTRL_LCDMUXSEL_VGA_8421BPP;
+       else if (fb->fb.var.bits_per_pixel <= 16)
+               val = CM_CTRL_LCDMUXSEL_VGA_16BPP
+                       | CM_CTRL_LCDEN0 | CM_CTRL_LCDEN1
+                       | CM_CTRL_STATIC1 | CM_CTRL_STATIC2;
+       else
+               val = 0; /* no idea for this, don't trust the docs */
+
+       cm_control(CM_CTRL_LCDMUXSEL_MASK|
+                  CM_CTRL_LCDEN0|
+                  CM_CTRL_LCDEN1|
+                  CM_CTRL_STATIC1|
+                  CM_CTRL_STATIC2|
+                  CM_CTRL_STATIC|
+                  CM_CTRL_n24BITEN, val);
 }
 
 static unsigned long framesize = SZ_1M;
@@ -442,6 +502,14 @@ static int cp_clcd_setup(struct clcd_fb *fb)
        return 0;
 }
 
+static int cp_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
+{
+       return dma_mmap_writecombine(&fb->dev->dev, vma,
+                                    fb->fb.screen_base,
+                                    fb->fb.fix.smem_start,
+                                    fb->fb.fix.smem_len);
+}
+
 static void cp_clcd_remove(struct clcd_fb *fb)
 {
        dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
@@ -454,6 +522,7 @@ static struct clcd_board clcd_data = {
        .decode         = clcdfb_decode,
        .enable         = cp_clcd_enable,
        .setup          = cp_clcd_setup,
+       .mmap           = cp_clcd_mmap,
        .remove         = cp_clcd_remove,
 };
 
@@ -496,17 +565,23 @@ static void __init intcp_init(void)
 
 #define TIMER_CTRL_IE  (1 << 5)                        /* Interrupt Enable */
 
-static void __init intcp_init_time(void)
+static void __init intcp_timer_init(void)
 {
        integrator_time_init(1000000 / HZ, TIMER_CTRL_IE);
 }
 
+static struct sys_timer cp_timer = {
+       .init           = intcp_timer_init,
+       .offset         = integrator_gettimeoffset,
+};
+
 MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
-       MAINTAINER("ARM Ltd/Deep Blue Solutions Ltd")
-       BOOT_MEM(0x00000000, 0x16000000, 0xf1600000)
-       BOOT_PARAMS(0x00000100)
-       MAPIO(intcp_map_io)
-       INITIRQ(intcp_init_irq)
-       INITTIME(intcp_init_time)
-       INIT_MACHINE(intcp_init)
+       /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
+       .phys_io        = 0x16000000,
+       .io_pg_offst    = ((0xf1600000) >> 18) & 0xfffc,
+       .boot_params    = 0x00000100,
+       .map_io         = intcp_map_io,
+       .init_irq       = intcp_init_irq,
+       .timer          = &cp_timer,
+       .init_machine   = intcp_init,
 MACHINE_END