/*************************************************************************
* Chip specific mappings shared by all IXP2000 systems
*************************************************************************/
-static struct map_desc ixp2000_small_io_desc[] __initdata = {
+static struct map_desc ixp2000_io_desc[] __initdata = {
{
- .virtual = IXP2000_GLOBAL_REG_VIRT_BASE,
- .physical = IXP2000_GLOBAL_REG_PHYS_BASE,
- .length = IXP2000_GLOBAL_REG_SIZE,
- .type = MT_DEVICE
- }, {
- .virtual = IXP2000_GPIO_VIRT_BASE,
- .physical = IXP2000_GPIO_PHYS_BASE,
- .length = IXP2000_GPIO_SIZE,
- .type = MT_DEVICE
- }, {
- .virtual = IXP2000_TIMER_VIRT_BASE,
- .physical = IXP2000_TIMER_PHYS_BASE,
- .length = IXP2000_TIMER_SIZE,
- .type = MT_DEVICE
- }, {
- .virtual = IXP2000_UART_VIRT_BASE,
- .physical = IXP2000_UART_PHYS_BASE,
- .length = IXP2000_UART_SIZE,
- .type = MT_DEVICE
- }, {
- .virtual = IXP2000_SLOWPORT_CSR_VIRT_BASE,
- .physical = IXP2000_SLOWPORT_CSR_PHYS_BASE,
- .length = IXP2000_SLOWPORT_CSR_SIZE,
+ .virtual = IXP2000_CAP_VIRT_BASE,
+ .physical = IXP2000_CAP_PHYS_BASE,
+ .length = IXP2000_CAP_SIZE,
.type = MT_DEVICE
}, {
.virtual = IXP2000_INTCTL_VIRT_BASE,
.physical = IXP2000_PCI_CREG_PHYS_BASE,
.length = IXP2000_PCI_CREG_SIZE,
.type = MT_DEVICE
- }
-};
-
-static struct map_desc ixp2000_large_io_desc[] __initdata = {
- {
+ }, {
.virtual = IXP2000_PCI_CSR_VIRT_BASE,
.physical = IXP2000_PCI_CSR_PHYS_BASE,
.length = IXP2000_PCI_CSR_SIZE,
void __init ixp2000_map_io(void)
{
- iotable_init(ixp2000_small_io_desc, ARRAY_SIZE(ixp2000_small_io_desc));
- iotable_init(ixp2000_large_io_desc, ARRAY_SIZE(ixp2000_large_io_desc));
+ extern unsigned int processor_id;
+
+ /*
+ * On IXP2400 CPUs we need to use MT_IXP2000_DEVICE for
+ * tweaking the PMDs so XCB=101. On IXP2800s we use the normal
+ * PMD flags.
+ */
+ if ((processor_id & 0xfffffff0) == 0x69054190) {
+ int i;
+
+ printk(KERN_INFO "Enabling IXP2400 erratum #66 workaround\n");
+
+ for(i=0;i<ARRAY_SIZE(ixp2000_io_desc);i++)
+ ixp2000_io_desc[i].type = MT_IXP2000_DEVICE;
+ }
+
+ iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc));
early_serial_setup(&ixp2000_serial_port);
/* Set slowport to 8-bit mode. */
ticks_per_jiffy = (tick_rate + HZ/2) / HZ;
ticks_per_usec = tick_rate / 1000000;
- ixp2000_reg_write(IXP2000_T1_CLD, ticks_per_jiffy);
+ ixp2000_reg_write(IXP2000_T1_CLD, ticks_per_jiffy - 1);
ixp2000_reg_write(IXP2000_T1_CTL, (1 << 7));
/*
*/
ixp2000_reg_write(IXP2000_T4_CLD, -1);
ixp2000_reg_write(IXP2000_T4_CTL, (1 << 7));
- next_jiffy_time = 0xffffffff - ticks_per_jiffy;
+ next_jiffy_time = 0xffffffff;
/* register for interrupt */
setup_irq(IRQ_IXP2000_TIMER1, &ixp2000_timer_irq);
set_irq_chained_handler(IRQ_IXP2000_GPIO, ixp2000_GPIO_irq_handler);
/*
- * Enable PCI irq
+ * Enable PCI irqs. The actual PCI[AB] decoding is done in
+ * entry-macro.S, so we don't need a chained handler for the
+ * PCI interrupt source.
*/
ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << IRQ_IXP2000_PCI));
for (irq = IRQ_IXP2000_PCIA; irq <= IRQ_IXP2000_PCIB; irq++) {