*
* Code common to Intel IXDP2401 and IXDP2801 platforms
*
- * Original Author: Andrzej Mialwoski <andrzej.mialwoski@intel.com>
+ * Original Author: Andrzej Mialkowski <andrzej.mialkowski@intel.com>
* Maintainer: Deepak Saxena <dsaxena@plexity.net>
*
* Copyright (C) 2002-2003 Intel Corp.
* option) any later version.
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <linux/bitops.h>
#include <linux/pci.h>
-#include <linux/interrupt.h>
-#include <linux/mm.h>
-#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/serial.h>
#include <linux/tty.h>
#include <linux/serial_core.h>
-#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/serial_8250.h>
#include <asm/io.h>
#include <asm/irq.h>
*************************************************************************/
static void ixdp2x01_irq_mask(unsigned int irq)
{
- *IXDP2X01_INT_MASK_SET_REG = IXP2000_BOARD_IRQ_MASK(irq);
+ ixp2000_reg_wrb(IXDP2X01_INT_MASK_SET_REG,
+ IXP2000_BOARD_IRQ_MASK(irq));
}
static void ixdp2x01_irq_unmask(unsigned int irq)
{
- *IXDP2X01_INT_MASK_CLR_REG = IXP2000_BOARD_IRQ_MASK(irq);
+ ixp2000_reg_write(IXDP2X01_INT_MASK_CLR_REG,
+ IXP2000_BOARD_IRQ_MASK(irq));
}
static u32 valid_irq_mask;
-static void ixdp2x01_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
+static void ixdp2x01_irq_handler(unsigned int irq, struct irq_desc *desc)
{
u32 ex_interrupt;
int i;
for (i = 0; i < IXP2000_BOARD_IRQS; i++) {
if (ex_interrupt & (1 << i)) {
- struct irqdesc *cpld_desc;
+ struct irq_desc *cpld_desc;
int cpld_irq = IXP2000_BOARD_IRQ(0) + i;
cpld_desc = irq_desc + cpld_irq;
- cpld_desc->handle(cpld_irq, cpld_desc, regs);
+ desc_handle_irq(cpld_irq, cpld_desc);
}
}
desc->chip->unmask(irq);
}
-static struct irqchip ixdp2x01_irq_chip = {
+static struct irq_chip ixdp2x01_irq_chip = {
.mask = ixdp2x01_irq_mask,
.ack = ixdp2x01_irq_mask,
.unmask = ixdp2x01_irq_unmask
valid_irq_mask = IXDP2801_VALID_IRQ_MASK;
/* Mask all interrupts from CPLD, disable simulation */
- *IXDP2X01_INT_MASK_SET_REG = 0xffffffff;
- *IXDP2X01_INT_SIM_REG = 0;
+ ixp2000_reg_write(IXDP2X01_INT_MASK_SET_REG, 0xffffffff);
+ ixp2000_reg_wrb(IXDP2X01_INT_SIM_REG, 0);
for (irq = NR_IXP2000_IRQS; irq < NR_IXDP2X01_IRQS; irq++) {
if (irq & valid_irq_mask) {
set_irq_chip(irq, &ixdp2x01_irq_chip);
- set_irq_handler(irq, do_level_IRQ);
+ set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
} else {
set_irq_flags(irq, 0);
}
/* Hook into PCI interrupts */
- set_irq_chained_handler(IRQ_IXP2000_PCIB, &ixdp2x01_irq_handler);
+ set_irq_chained_handler(IRQ_IXP2000_PCIB, ixdp2x01_irq_handler);
}
/*************************************************************************
- * IXDP2x01 memory map and serial ports
+ * IXDP2x01 memory map
*************************************************************************/
static struct map_desc ixdp2x01_io_desc __initdata = {
.virtual = IXDP2X01_VIRT_CPLD_BASE,
- .physical = IXDP2X01_PHYS_CPLD_BASE,
+ .pfn = __phys_to_pfn(IXDP2X01_PHYS_CPLD_BASE),
.length = IXDP2X01_CPLD_REGION_SIZE,
.type = MT_DEVICE
};
-static struct uart_port ixdp2x01_serial_ports[2] = {
+static void __init ixdp2x01_map_io(void)
+{
+ ixp2000_map_io();
+ iotable_init(&ixdp2x01_io_desc, 1);
+}
+
+
+/*************************************************************************
+ * IXDP2x01 serial ports
+ *************************************************************************/
+static struct plat_serial8250_port ixdp2x01_serial_port1[] = {
{
- .membase = (char *)(IXDP2X01_UART1_VIRT_BASE),
.mapbase = (unsigned long)IXDP2X01_UART1_PHYS_BASE,
+ .membase = (char *)IXDP2X01_UART1_VIRT_BASE,
.irq = IRQ_IXDP2X01_UART1,
- .flags = UPF_SKIP_TEST,
+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
.iotype = UPIO_MEM32,
.regshift = 2,
.uartclk = IXDP2X01_UART_CLK,
- .line = 1,
- .type = PORT_16550A,
- .fifosize = 16
- }, {
- .membase = (char *)(IXDP2X01_UART2_VIRT_BASE),
+ },
+ { }
+};
+
+static struct resource ixdp2x01_uart_resource1 = {
+ .start = IXDP2X01_UART1_PHYS_BASE,
+ .end = IXDP2X01_UART1_PHYS_BASE + 0xffff,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device ixdp2x01_serial_device1 = {
+ .name = "serial8250",
+ .id = PLAT8250_DEV_PLATFORM1,
+ .dev = {
+ .platform_data = ixdp2x01_serial_port1,
+ },
+ .num_resources = 1,
+ .resource = &ixdp2x01_uart_resource1,
+};
+
+static struct plat_serial8250_port ixdp2x01_serial_port2[] = {
+ {
.mapbase = (unsigned long)IXDP2X01_UART2_PHYS_BASE,
+ .membase = (char *)IXDP2X01_UART2_VIRT_BASE,
.irq = IRQ_IXDP2X01_UART2,
- .flags = UPF_SKIP_TEST,
+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
.iotype = UPIO_MEM32,
.regshift = 2,
.uartclk = IXDP2X01_UART_CLK,
- .line = 2,
- .type = PORT_16550A,
- .fifosize = 16
},
+ { }
};
-static void __init ixdp2x01_map_io(void)
-{
- ixp2000_map_io();
+static struct resource ixdp2x01_uart_resource2 = {
+ .start = IXDP2X01_UART2_PHYS_BASE,
+ .end = IXDP2X01_UART2_PHYS_BASE + 0xffff,
+ .flags = IORESOURCE_MEM,
+};
- iotable_init(&ixdp2x01_io_desc, 1);
+static struct platform_device ixdp2x01_serial_device2 = {
+ .name = "serial8250",
+ .id = PLAT8250_DEV_PLATFORM2,
+ .dev = {
+ .platform_data = ixdp2x01_serial_port2,
+ },
+ .num_resources = 1,
+ .resource = &ixdp2x01_uart_resource2,
+};
- early_serial_setup(&ixdp2x01_serial_ports[0]);
- early_serial_setup(&ixdp2x01_serial_ports[1]);
+static void ixdp2x01_uart_init(void)
+{
+ platform_device_register(&ixdp2x01_serial_device1);
+ platform_device_register(&ixdp2x01_serial_device2);
}
__setup("ixdp2x01_clock=", ixdp2x01_clock_setup);
-static void __init ixdp2x01_init_time(void)
+static void __init ixdp2x01_timer_init(void)
{
if (!ixdp2x01_clock)
ixdp2x01_clock = 50000000;
ixp2000_init_time(ixdp2x01_clock);
}
+static struct sys_timer ixdp2x01_timer = {
+ .init = ixdp2x01_timer_init,
+ .offset = ixp2000_gettimeoffset,
+};
+
/*************************************************************************
* IXDP2x01 PCI
*************************************************************************/
{
ixp2000_reg_write(IXP2000_PCI_ADDR_EXT, 0x00000000);
ixp2000_pci_preinit();
+ pcibios_setup("firmware");
}
#define DEVPIN(dev, pin) ((pin) | ((dev) << 3))
{
sys->mem_offset = 0xe0000000;
- if (machine_is_ixdp2801())
+ if (machine_is_ixdp2801() || machine_is_ixdp28x5())
sys->mem_offset -= ((*IXP2000_PCI_ADDR_EXT & 0xE000) << 16);
return ixp2000_pci_setup(nr, sys);
int __init ixdp2x01_pci_init(void)
{
+ if (machine_is_ixdp2401() || machine_is_ixdp2801() ||\
+ machine_is_ixdp28x5())
+ pci_common_init(&ixdp2x01_pci);
- pci_common_init(&ixdp2x01_pci);
return 0;
}
static unsigned long ixdp2x01_flash_bank_setup(unsigned long ofs)
{
- *IXDP2X01_CPLD_FLASH_REG =
- ((ofs >> IXDP2X01_FLASH_WINDOW_BITS) | IXDP2X01_CPLD_FLASH_INTERN);
+ ixp2000_reg_wrb(IXDP2X01_CPLD_FLASH_REG,
+ ((ofs >> IXDP2X01_FLASH_WINDOW_BITS) | IXDP2X01_CPLD_FLASH_INTERN));
return (ofs & IXDP2X01_FLASH_WINDOW_MASK);
}
.resource = &ixdp2x01_flash_resource,
};
+static struct ixp2000_i2c_pins ixdp2x01_i2c_gpio_pins = {
+ .sda_pin = IXDP2X01_GPIO_SDA,
+ .scl_pin = IXDP2X01_GPIO_SCL,
+};
+
+static struct platform_device ixdp2x01_i2c_controller = {
+ .name = "IXP2000-I2C",
+ .id = 0,
+ .dev = {
+ .platform_data = &ixdp2x01_i2c_gpio_pins,
+ },
+ .num_resources = 0
+};
+
static struct platform_device *ixdp2x01_devices[] __initdata = {
- &ixdp2x01_flash
+ &ixdp2x01_flash,
+ &ixdp2x01_i2c_controller
};
static void __init ixdp2x01_init_machine(void)
{
- *IXDP2X01_CPLD_FLASH_REG =
- (IXDP2X01_CPLD_FLASH_BANK_MASK | IXDP2X01_CPLD_FLASH_INTERN);
+ ixp2000_reg_wrb(IXDP2X01_CPLD_FLASH_REG,
+ (IXDP2X01_CPLD_FLASH_BANK_MASK | IXDP2X01_CPLD_FLASH_INTERN));
ixdp2x01_flash_data.nr_banks =
((*IXDP2X01_CPLD_FLASH_REG & IXDP2X01_CPLD_FLASH_BANK_MASK) + 1);
platform_add_devices(ixdp2x01_devices, ARRAY_SIZE(ixdp2x01_devices));
+ ixp2000_uart_init();
+ ixdp2x01_uart_init();
}
#ifdef CONFIG_ARCH_IXDP2401
MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform")
- MAINTAINER("MontaVista Software, Inc.")
- BOOT_MEM(0x00000000, IXP2000_UART_PHYS_BASE, IXP2000_UART_VIRT_BASE)
- BOOT_PARAMS(0x00000100)
- MAPIO(ixdp2x01_map_io)
- INITIRQ(ixdp2x01_init_irq)
- INITTIME(ixdp2x01_init_time)
- INIT_MACHINE(ixdp2x01_init_machine)
+ /* Maintainer: MontaVista Software, Inc. */
+ .phys_io = IXP2000_UART_PHYS_BASE,
+ .io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc,
+ .boot_params = 0x00000100,
+ .map_io = ixdp2x01_map_io,
+ .init_irq = ixdp2x01_init_irq,
+ .timer = &ixdp2x01_timer,
+ .init_machine = ixdp2x01_init_machine,
MACHINE_END
#endif
#ifdef CONFIG_ARCH_IXDP2801
MACHINE_START(IXDP2801, "Intel IXDP2801 Development Platform")
- MAINTAINER("MontaVista Software, Inc.")
- BOOT_MEM(0x00000000, IXP2000_UART_PHYS_BASE, IXP2000_UART_VIRT_BASE)
- BOOT_PARAMS(0x00000100)
- MAPIO(ixdp2x01_map_io)
- INITIRQ(ixdp2x01_init_irq)
- INITTIME(ixdp2x01_init_time)
- INIT_MACHINE(ixdp2x01_init_machine)
+ /* Maintainer: MontaVista Software, Inc. */
+ .phys_io = IXP2000_UART_PHYS_BASE,
+ .io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc,
+ .boot_params = 0x00000100,
+ .map_io = ixdp2x01_map_io,
+ .init_irq = ixdp2x01_init_irq,
+ .timer = &ixdp2x01_timer,
+ .init_machine = ixdp2x01_init_machine,
+MACHINE_END
+
+/*
+ * IXDP28x5 is basically an IXDP2801 with a different CPU but Intel
+ * changed the machine ID in the bootloader
+ */
+MACHINE_START(IXDP28X5, "Intel IXDP2805/2855 Development Platform")
+ /* Maintainer: MontaVista Software, Inc. */
+ .phys_io = IXP2000_UART_PHYS_BASE,
+ .io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc,
+ .boot_params = 0x00000100,
+ .map_io = ixdp2x01_map_io,
+ .init_irq = ixdp2x01_init_irq,
+ .timer = &ixdp2x01_timer,
+ .init_machine = ixdp2x01_init_machine,
MACHINE_END
#endif