* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
* will break. On P2, the timer count rate is 6.5 MHz after programming PTV
* with 0. This divides the 13MHz input by 2, and is undocumented.
*/
-#ifdef CONFIG_MACH_OMAP_PERSEUS2
+#if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE)
/* REVISIT: This ifdef construct should be replaced by a query to clock
* framework to see if timer base frequency is 12.0, 13.0 or 19.2 MHz.
*/
* Latency during the interrupt is calculated using timer1.
* Both timer0 and timer1 are counting at 6MHz (P2 6.5MHz).
*/
-static irqreturn_t omap_mpu_timer_interrupt(int irq, void *dev_id,
- struct pt_regs *regs)
+static irqreturn_t omap_mpu_timer_interrupt(int irq, void *dev_id)
{
unsigned long now, latency;
now = 0 - omap_mpu_timer_read(0);
latency = MPU_TICKS_PER_SEC / HZ - omap_mpu_timer_read(1);
omap_mpu_timer_last = now - latency;
- timer_tick(regs);
+ timer_tick();
write_sequnlock(&xtime_lock);
return IRQ_HANDLED;
static struct irqaction omap_mpu_timer_irq = {
.name = "mpu timer",
- .flags = SA_INTERRUPT | SA_TIMER,
+ .flags = IRQF_DISABLED | IRQF_TIMER,
.handler = omap_mpu_timer_interrupt,
};
static unsigned long omap_mpu_timer1_overflows;
-static irqreturn_t omap_mpu_timer1_interrupt(int irq, void *dev_id,
- struct pt_regs *regs)
+static irqreturn_t omap_mpu_timer1_interrupt(int irq, void *dev_id)
{
omap_mpu_timer1_overflows++;
return IRQ_HANDLED;
static struct irqaction omap_mpu_timer1_irq = {
.name = "mpu timer1 overflow",
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.handler = omap_mpu_timer1_interrupt,
};