{
unsigned int i;
- vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0);
+ vic_init(VA_VIC_BASE, ~(1 << 31));
- set_irq_chained_handler(IRQ_VICSOURCE31, sic_handle_irq);
+ set_irq_handler(IRQ_VICSOURCE31, sic_handle_irq);
+ enable_irq(IRQ_VICSOURCE31);
/* Do second interrupt controller */
writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);