fedora core 6 1.2949 + vserver 2.2.0

[linux-2.6.git] / arch / arm / mm / proc-arm922.S

diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 13e65cb..ffb751b 100644 (file)
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -4,6 +4,7 @@
  *  Copyright (C) 1999,2000 ARM Limited
  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
  *  Copyright (C) 2001 Altera Corporation
+ *  hacked for non-paged-MM by Hyok S. Choi, 2003.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -26,12 +27,11 @@
  *  CONFIG_CPU_ARM922_CPU_IDLE -> nohlt
  */
 #include <linux/linkage.h>
-#include <linux/config.h>
 #include <linux/init.h>
 #include <asm/assembler.h>
+#include <asm/elf.h>
+#include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
-#include <asm/hardware.h>
 #include <asm/page.h>
 #include <asm/ptrace.h>
 #include "proc-macros.S"
@@ -99,7 +99,9 @@ ENTRY(cpu_arm922_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
        mcr     p15, 0, ip, c7, c10, 4          @ drain WB
+#ifdef CONFIG_MMU
        mcr     p15, 0, ip, c8, c7, 0           @ invalidate I & D TLBs
+#endif
        mrc     p15, 0, ip, c1, c0, 0           @ ctrl register
        bic     ip, ip, #0x000f                 @ ............wcam
        bic     ip, ip, #0x1100                 @ ...i...s........
@@ -321,6 +323,7 @@ ENTRY(cpu_arm922_dcache_clean_area)
  */
        .align  5
 ENTRY(cpu_arm922_switch_mm)
+#ifdef CONFIG_MMU
        mov     ip, #0
 #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
        mcr     p15, 0, ip, c7, c6, 0           @ invalidate D cache
@@ -341,15 +344,17 @@ ENTRY(cpu_arm922_switch_mm)
        mcr     p15, 0, ip, c7, c10, 4          @ drain WB
        mcr     p15, 0, r0, c2, c0, 0           @ load page table pointer
        mcr     p15, 0, ip, c8, c7, 0           @ invalidate I & D TLBs
+#endif
        mov     pc, lr
 
 /*
- * cpu_arm922_set_pte(ptep, pte)
+ * cpu_arm922_set_pte_ext(ptep, pte, ext)
  *
  * Set a PTE and flush it out
  */
        .align  5
-ENTRY(cpu_arm922_set_pte)
+ENTRY(cpu_arm922_set_pte_ext)
+#ifdef CONFIG_MMU
        str     r1, [r0], #-2048                @ linux version
 
        eor     r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
@@ -376,6 +381,7 @@ ENTRY(cpu_arm922_set_pte)
        mov     r0, r0
        mcr     p15, 0, r0, c7, c10, 1          @ clean D entry
        mcr     p15, 0, r0, c7, c10, 4          @ drain WB
+#endif /* CONFIG_MMU */
        mov     pc, lr
 
        __INIT
@@ -385,34 +391,27 @@ __arm922_setup:
        mov     r0, #0
        mcr     p15, 0, r0, c7, c7              @ invalidate I,D caches on v4
        mcr     p15, 0, r0, c7, c10, 4          @ drain write buffer on v4
+#ifdef CONFIG_MMU
        mcr     p15, 0, r0, c8, c7              @ invalidate I,D TLBs on v4
-       mcr     p15, 0, r4, c2, c0              @ load page table pointer
-       mov     r0, #0x1f                       @ Domains 0, 1 = client
-       mcr     p15, 0, r0, c3, c0              @ load domain access register
-       mrc     p15, 0, r0, c1, c0              @ get control register v4
-/*
- * Clear out 'unwanted' bits (then put them in if we need them)
- */
-                                               @   VI ZFRS BLDP WCAM
-       bic     r0, r0, #0x0e00
-       bic     r0, r0, #0x0002
-       bic     r0, r0, #0x000c
-       bic     r0, r0, #0x1000                 @ ...0 000. .... 000.
-/*
- * Turn on what we want
- */
-       orr     r0, r0, #0x0031
-       orr     r0, r0, #0x2100                 @ ..1. ...1 ..11 ...1
-
-#ifndef CONFIG_CPU_DCACHE_DISABLE
-       orr     r0, r0, #0x0004                 @ .... .... .... .1..
-#endif
-#ifndef CONFIG_CPU_ICACHE_DISABLE
-       orr     r0, r0, #0x1000                 @ ...1 .... .... ....
 #endif
+       adr     r5, arm922_crval
+       ldmia   r5, {r5, r6}
+       mrc     p15, 0, r0, c1, c0              @ get control register v4
+       bic     r0, r0, r5
+       orr     r0, r0, r6
        mov     pc, lr
        .size   __arm922_setup, . - __arm922_setup
 
+       /*
+        *  R
+        * .RVI ZFRS BLDP WCAM
+        * ..11 0001 ..11 0101
+        * 
+        */
+       .type   arm922_crval, #object
+arm922_crval:
+       crval   clear=0x00003f3f, mmuset=0x00003135, ucset=0x00001130
+
        __INITDATA
 
 /*
@@ -428,7 +427,7 @@ arm922_processor_functions:
        .word   cpu_arm922_do_idle
        .word   cpu_arm922_dcache_clean_area
        .word   cpu_arm922_switch_mm
-       .word   cpu_arm922_set_pte
+       .word   cpu_arm922_set_pte_ext
        .size   arm922_processor_functions, . - arm922_processor_functions
 
        .section ".rodata"
@@ -445,30 +444,27 @@ cpu_elf_name:
 
        .type   cpu_arm922_name, #object
 cpu_arm922_name:
-       .ascii  "ARM922T"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
-       .ascii  "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
-       .ascii  "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
-       .ascii  "(wt)"
-#else
-       .ascii  "(wb)"
-#endif
-#endif
-       .ascii  "\0"
+       .asciz  "ARM922T"
        .size   cpu_arm922_name, . - cpu_arm922_name
 
        .align
 
-       .section ".proc.info", #alloc, #execinstr
+       .section ".proc.info.init", #alloc, #execinstr
 
        .type   __arm922_proc_info,#object
 __arm922_proc_info:
        .long   0x41009220
        .long   0xff00fff0
-       .long   0x00000c1e                      @ mmuflags
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_BUFFERABLE | \
+               PMD_SECT_CACHEABLE | \
+               PMD_BIT4 | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_BIT4 | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __arm922_setup
        .long   cpu_arch_name
        .long   cpu_elf_name