Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-static inline unsigned long readRegister(const unsigned int nReg)
+extern __inline__
+unsigned int readRegister(const unsigned int nReg)
{
/* Note: The CPU thinks it has dealt with the current instruction.
As a result the program counter has been advanced to the next
for this in this routine. LDF/STF instructions with Rn = PC
depend on the PC being correct, as they use PC+8 in their
address calculations. */
- unsigned long *userRegisters = GET_USERREG();
+ unsigned int *userRegisters = GET_USERREG();
unsigned int val = userRegisters[nReg];
if (REG_PC == nReg)
val -= 4;
return val;
}
-static inline void
-writeRegister(const unsigned int nReg, const unsigned long val)
+extern __inline__
+void writeRegister(const unsigned int nReg, const unsigned int val)
{
- unsigned long *userRegisters = GET_USERREG();
+ unsigned int *userRegisters = GET_USERREG();
userRegisters[nReg] = val;
}
-static inline unsigned long readCPSR(void)
+extern __inline__
+unsigned int readCPSR(void)
{
return (readRegister(REG_CPSR));
}
-static inline void writeCPSR(const unsigned long val)
+extern __inline__
+void writeCPSR(const unsigned int val)
{
writeRegister(REG_CPSR, val);
}
-static inline unsigned long readConditionCodes(void)
+extern __inline__
+unsigned int readConditionCodes(void)
{
#ifdef __FPEM_TEST__
return (0);
#endif
}
-static inline void writeConditionCodes(const unsigned long val)
+extern __inline__
+void writeConditionCodes(const unsigned int val)
{
- unsigned long *userRegisters = GET_USERREG();
- unsigned long rval;
+ unsigned int *userRegisters = GET_USERREG();
+ unsigned int rval;
/*
* Operate directly on userRegisters since
* the CPSR may be the PC register itself.
rval = userRegisters[REG_CPSR] & ~CC_MASK;
userRegisters[REG_CPSR] = rval | (val & CC_MASK);
}
+
+extern __inline__
+unsigned int readMemoryInt(unsigned int *pMem)
+{
+ return *pMem;
+}