* Mikael Pettersson : PM converted to driver model.
*/
+#include <linux/config.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sysdev.h>
#include <linux/cpu.h>
#include <linux/module.h>
-#include <linux/dmi.h>
#include <asm/atomic.h>
#include <asm/smp.h>
#include <asm/arch_hooks.h>
#include <asm/hpet.h>
#include <asm/i8253.h>
-#include <asm/nmi.h>
#include <mach_apic.h>
-#include <mach_apicdef.h>
#include <mach_ipi.h>
#include "io_ports.h"
* Knob to control our willingness to enable the local APIC.
*/
int enable_local_apic __initdata = 0; /* -1=force-disable, +1=force-enable */
-int prefer_apic __initdata = 0; /* when enable_local_apic == 0 prefer APIC but don't force against
- BIOS wishes */
-int apic_disabled_by_dmi __initdata;
/*
* Debug level
static void apic_pm_activate(void);
-static int modern_apic(void)
-{
- unsigned int lvr, version;
- /* AMD systems use old APIC versions, so check the CPU */
- if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
- boot_cpu_data.x86 >= 0xf)
- return 1;
- lvr = apic_read(APIC_LVR);
- version = GET_APIC_VERSION(lvr);
- return version >= 0x14;
-}
-
/*
* 'what should we do if we get a hw irq event on an illegal vector'.
* each architecture has to answer this themselves.
}
/* Using APIC to generate smp_local_timer_interrupt? */
-int using_apic_timer __read_mostly = 0;
+int using_apic_timer = 0;
static int enabled_via_apicbase;
int get_physical_broadcast(void)
{
- if (modern_apic())
+ unsigned int lvr, version;
+ lvr = apic_read(APIC_LVR);
+ version = GET_APIC_VERSION(lvr);
+ if (!APIC_INTEGRATED(version) || version >= 0x14)
return 0xff;
else
return 0xf;
maxlvt = get_maxlvt();
/*
- * Masking an LVT entry can trigger a local APIC error
+ * Masking an LVT entry on a P6 can trigger a local APIC error
* if the vector is zero. Mask LVTERR first to prevent this.
*/
if (maxlvt >= 3) {
void __init sync_Arb_IDs(void)
{
- /* Unsupported on P4 - see Intel Dev. Manual Vol. 3, Ch. 8.6.1
- And not needed on AMD */
- if (modern_apic())
+ /* Unsupported on P4 - see Intel Dev. Manual Vol. 3, Ch. 8.6.1 */
+ unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
+ if (ver >= 0x14) /* P4 or higher */
return;
/*
* Wait for idle.
void __devinit setup_local_APIC(void)
{
unsigned long oldvalue, value, ver, maxlvt;
- int i, j;
/* Pound the ESR really hard over the head with a big hammer - mbligh */
if (esr_disable) {
value &= ~APIC_TPRI_MASK;
apic_write_around(APIC_TASKPRI, value);
- /*
- * After a crash, we no longer service the interrupts and a pending
- * interrupt from previous kernel might still have ISR bit set.
- *
- * Most probably by now CPU has serviced that pending interrupt and
- * it might not have done the ack_APIC_irq() because it thought,
- * interrupt came from i8259 as ExtInt. LAPIC did not get EOI so it
- * does not clear the ISR bit and cpu thinks it has already serivced
- * the interrupt. Hence a vector might get locked. It was noticed
- * for timer irq (vector 0x31). Issue an extra EOI to clear ISR.
- */
- for (i = APIC_ISR_NR - 1; i >= 0; i--) {
- value = apic_read(APIC_ISR + i*0x10);
- for (j = 31; j >= 0; j--) {
- if (value & (1<<j))
- ack_APIC_irq();
- }
- }
-
/*
* Now that we are all set up, enable the APIC
*/
static int __init apic_set_verbosity(char *str)
{
- if (*str == '=')
- ++str;
- if (*str == 0)
- prefer_apic = 1;
if (strcmp("debug", str) == 0)
apic_verbosity = APIC_DEBUG;
else if (strcmp("verbose", str) == 0)
apic_verbosity = APIC_VERBOSE;
- return 1;
+ else
+ printk(KERN_WARNING "APIC Verbosity level %s not recognised"
+ " use apic=verbose or apic=debug\n", str);
+
+ return 0;
}
-__setup("apic", apic_set_verbosity);
+__setup("apic=", apic_set_verbosity);
static int __init detect_init_APIC (void)
{
* APIC only if "lapic" specified.
*/
if (enable_local_apic <= 0) {
- if (!apic_disabled_by_dmi)
- printk("Local APIC disabled by BIOS -- "
- "you can enable it with \"lapic\"\n");
+ printk("Local APIC disabled by BIOS -- "
+ "you can enable it with \"lapic\"\n");
return -1;
}
/*
unsigned long v;
v = apic_read(APIC_LVTT);
- /*
- * When an illegal vector value (0-15) is written to an LVT
- * entry and delivery mode is Fixed, the APIC may signal an
- * illegal vector error, with out regard to whether the mask
- * bit is set or whether an interrupt is actually seen on input.
- *
- * Boot sequence might call this function when the LVTT has
- * '0' vector value. So make sure vector field is set to
- * valid value.
- */
- v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR);
- apic_write_around(APIC_LVTT, v);
+ apic_write_around(APIC_LVTT, v | APIC_LVT_MASKED);
}
}
irq_exit();
}
-#ifdef CONFIG_X86_APIC_AUTO
-
-/* Some heuristics to decide when to enable the APICs */
-
-static __init int dmi_enable_apic(void)
-{
- int year;
- int apic;
- char *vendor;
-
- /* If the machine has more than one CPU try to use APIC because it'll
- be running the SMP kernel with APIC soon anyways.
- This won't cover dual core, but they are handled by the date check
- below. */
- if (dmi_cpus > 1)
- return 1;
-
- year = dmi_get_year(DMI_BIOS_DATE);
- vendor = dmi_get_system_info(DMI_BIOS_VENDOR);
- apic = 0;
-
- /* All Intel BIOS since 1998 assumed APIC on. Don't include 1998 itself
- because we're not sure for that. */
- if (vendor && !strncmp(vendor, "Intel", 5))
- apic = 1;
- /* Use APIC for anything since 2001 */
- else if (year >= 2001)
- apic = 1;
-
-#ifdef CONFIG_ACPI
- /* When ACPI is disabled also default to APIC off on very new systems (>= 2004)
- which typically don't have working mptables anymore */
- if (acpi_noirq && year >= 2004)
- apic = 0;
-#endif
-
- if (!apic)
- apic_disabled_by_dmi = 1;
-
- return apic;
-}
-
-void __init dmi_check_apic(void)
-{
- if (enable_local_apic != 0 || prefer_apic)
- return;
- if (!dmi_enable_apic()) {
- clear_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability);
- nr_ioapics = 0;
- enable_local_apic = -1;
- printk(KERN_INFO "IO/L-APIC disabled because your old system seems to be old\n");
- printk(KERN_INFO "overwrite with \"apic\"\n");
- return;
- }
- printk(KERN_INFO "IO/L-APIC allowed because system is MP or new enough\n");
-}
-#endif
-
/*
* This initializes the IO-APIC and APIC hardware if this is
* a UP kernel.
connect_bsp_APIC();
- /*
- * Hack: In case of kdump, after a crash, kernel might be booting
- * on a cpu with non-zero lapic id. But boot_cpu_physical_apicid
- * might be zero if read from MP tables. Get it from LAPIC.
- */
-#ifdef CONFIG_CRASH_DUMP
- boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
-#endif
phys_cpu_present_map = physid_mask_of_physid(boot_cpu_physical_apicid);
setup_local_APIC();
git://git.onelab.eu / linux-2.6.git / blobdiff