void
ia64_patch_imm64 (u64 insn_addr, u64 val)
{
- ia64_patch(insn_addr,
- 0x01fffefe000, ( ((val & 0x8000000000000000) >> 27) /* bit 63 -> 36 */
- | ((val & 0x0000000000200000) << 0) /* bit 21 -> 21 */
- | ((val & 0x00000000001f0000) << 6) /* bit 16 -> 22 */
- | ((val & 0x000000000000ff80) << 20) /* bit 7 -> 27 */
- | ((val & 0x000000000000007f) << 13) /* bit 0 -> 13 */));
- ia64_patch(insn_addr - 1, 0x1ffffffffff, val >> 22);
+ /* The assembler may generate offset pointing to either slot 1
+ or slot 2 for a long (2-slot) instruction, occupying slots 1
+ and 2. */
+ insn_addr &= -16UL;
+ ia64_patch(insn_addr + 2,
+ 0x01fffefe000UL, ( ((val & 0x8000000000000000UL) >> 27) /* bit 63 -> 36 */
+ | ((val & 0x0000000000200000UL) << 0) /* bit 21 -> 21 */
+ | ((val & 0x00000000001f0000UL) << 6) /* bit 16 -> 22 */
+ | ((val & 0x000000000000ff80UL) << 20) /* bit 7 -> 27 */
+ | ((val & 0x000000000000007fUL) << 13) /* bit 0 -> 13 */));
+ ia64_patch(insn_addr + 1, 0x1ffffffffffUL, val >> 22);
}
void
ia64_patch_imm60 (u64 insn_addr, u64 val)
{
- ia64_patch(insn_addr,
- 0x011ffffe000, ( ((val & 0x0800000000000000) >> 23) /* bit 59 -> 36 */
- | ((val & 0x00000000000fffff) << 13) /* bit 0 -> 13 */));
- ia64_patch(insn_addr - 1, 0x1fffffffffc, val >> 18);
+ /* The assembler may generate offset pointing to either slot 1
+ or slot 2 for a long (2-slot) instruction, occupying slots 1
+ and 2. */
+ insn_addr &= -16UL;
+ ia64_patch(insn_addr + 2,
+ 0x011ffffe000UL, ( ((val & 0x0800000000000000UL) >> 23) /* bit 59 -> 36 */
+ | ((val & 0x00000000000fffffUL) << 13) /* bit 0 -> 13 */));
+ ia64_patch(insn_addr + 1, 0x1fffffffffcUL, val >> 18);
}
/*
ia64_srlz_i();
}
-void
+void __init
ia64_patch_mckinley_e9 (unsigned long start, unsigned long end)
{
static int first_time = 1;
while (offp < (s32 *) end) {
wp = (u64 *) ia64_imva((char *) offp + *offp);
- wp[0] = 0x0000000100000000; /* nop.m 0; nop.i 0; nop.i 0 */
- wp[1] = 0x0004000000000200;
- wp[2] = 0x0000000100000011; /* nop.m 0; nop.i 0; br.ret.sptk.many b6 */
- wp[3] = 0x0084006880000200;
+ wp[0] = 0x0000000100000000UL; /* nop.m 0; nop.i 0; nop.i 0 */
+ wp[1] = 0x0004000000000200UL;
+ wp[2] = 0x0000000100000011UL; /* nop.m 0; nop.i 0; br.ret.sptk.many b6 */
+ wp[3] = 0x0084006880000200UL;
ia64_fc(wp); ia64_fc(wp + 2);
++offp;
}
ia64_srlz_i();
}
-static void
+static void __init
patch_fsyscall_table (unsigned long start, unsigned long end)
{
extern unsigned long fsyscall_table[NR_syscalls];
ia64_srlz_i();
}
-static void
+static void __init
patch_brl_fsys_bubble_down (unsigned long start, unsigned long end)
{
extern char fsys_bubble_down[];
ia64_srlz_i();
}
-void
+#ifdef CONFIG_XEN_IA64_VDSO_PARAVIRT
+extern char __start_gate_running_on_xen_patchlist[];
+extern char __end_gate_running_on_xen_patchlist[];
+
+void __init
+patch_running_on_xen(unsigned long start, unsigned long end)
+{
+ extern int running_on_xen;
+ s32 *offp = (s32 *)start;
+ u64 ip;
+
+ while (offp < (s32 *)end) {
+ ip = (u64)ia64_imva((char *)offp + *offp);
+ ia64_patch_imm64(ip, (u64)&running_on_xen);
+ ia64_fc((void *)ip);
+ ++offp;
+ }
+ ia64_sync_i();
+ ia64_srlz_i();
+}
+
+static void __init
+patch_brl_symaddr(unsigned long start, unsigned long end,
+ unsigned long symaddr)
+{
+ s32 *offp = (s32 *)start;
+ u64 ip;
+
+ while (offp < (s32 *)end) {
+ ip = (u64)offp + *offp;
+ ia64_patch_imm60((u64)ia64_imva((void *)ip),
+ (u64)(symaddr - (ip & -16)) / 16);
+ ia64_fc((void *)ip);
+ ++offp;
+ }
+ ia64_sync_i();
+ ia64_srlz_i();
+}
+
+#define EXTERN_PATCHLIST(name) \
+ extern char __start_gate_brl_##name##_patchlist[]; \
+ extern char __end_gate_brl_##name##_patchlist[]; \
+ extern char name[]
+
+#define PATCH_BRL_SYMADDR(name) \
+ patch_brl_symaddr((unsigned long)__start_gate_brl_##name##_patchlist, \
+ (unsigned long)__end_gate_brl_##name##_patchlist, \
+ (unsigned long)name)
+
+static void __init
+patch_brl_in_vdso(void)
+{
+ EXTERN_PATCHLIST(xen_rsm_be_i);
+ EXTERN_PATCHLIST(xen_get_psr);
+ EXTERN_PATCHLIST(xen_ssm_i_0);
+ EXTERN_PATCHLIST(xen_ssm_i_1);
+
+ PATCH_BRL_SYMADDR(xen_rsm_be_i);
+ PATCH_BRL_SYMADDR(xen_get_psr);
+ PATCH_BRL_SYMADDR(xen_ssm_i_0);
+ PATCH_BRL_SYMADDR(xen_ssm_i_1);
+}
+#else
+#define patch_running_on_xen(start, end) do { } while (0)
+#define patch_brl_in_vdso() do { } while (0)
+#endif
+
+void __init
ia64_patch_gate (void)
{
# define START(name) ((unsigned long) __start_gate_##name##_patchlist)
patch_fsyscall_table(START(fsyscall), END(fsyscall));
patch_brl_fsys_bubble_down(START(brl_fsys_bubble_down), END(brl_fsys_bubble_down));
+#ifdef CONFIG_XEN
+ patch_running_on_xen(START(running_on_xen), END(running_on_xen));
+ patch_brl_in_vdso();
+#endif
ia64_patch_vtop(START(vtop), END(vtop));
ia64_patch_mckinley_e9(START(mckinley_e9), END(mckinley_e9));
}